JPS5936636U - synthesizer receiver - Google Patents

synthesizer receiver

Info

Publication number
JPS5936636U
JPS5936636U JP13141982U JP13141982U JPS5936636U JP S5936636 U JPS5936636 U JP S5936636U JP 13141982 U JP13141982 U JP 13141982U JP 13141982 U JP13141982 U JP 13141982U JP S5936636 U JPS5936636 U JP S5936636U
Authority
JP
Japan
Prior art keywords
absence
synthesizer receiver
signal
storage means
intermediate frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13141982U
Other languages
Japanese (ja)
Other versions
JPS6345076Y2 (en
Inventor
弘 古賀
Original Assignee
松下電器産業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 松下電器産業株式会社 filed Critical 松下電器産業株式会社
Priority to JP13141982U priority Critical patent/JPS5936636U/en
Publication of JPS5936636U publication Critical patent/JPS5936636U/en
Application granted granted Critical
Publication of JPS6345076Y2 publication Critical patent/JPS6345076Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
  • Control Of Amplification And Gain Control (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例におけるシンセサイザ受信器
の回路ブロック図、第２図は表示器の図形表示部のパタ
ーン例を示す説明図である。 １・・・フロントエンド、２・・・第１の中間周波数増
幅器、３・・・第２の中間周波数増幅器、４・・・レベ
ル検出器、５・・・アナログ・ディジタル変換器、６・
・・マイクロプロセッサ、７・・・表示器。FIG. 1 is a circuit block diagram of a synthesizer receiver according to an embodiment of the present invention, and FIG. 2 is an explanatory diagram showing an example of a pattern of a graphic display section of a display. DESCRIPTION OF SYMBOLS 1... Front end, 2... First intermediate frequency amplifier, 3... Second intermediate frequency amplifier, 4... Level detector, 5... Analog-digital converter, 6...
...Microprocessor, 7...Display unit.

Claims (1)

【実用新案登録請求の範囲】 １　希望受信周波数における受信信号の有無及び複数個
の隣接妨害信号の有無を検出する検出手段と、この検出
手段の結果を保持する記憶手段と、この記憶手段の記憶
内容に基づいて希望信号の有無と妨害信号の有無とを同
時に図形表示する表示手段とを備えたシンセサイザ受信
器。 ２　表示手段は、中間周波数帯域幅の切換状態を希望信
号の有無及び妨害信号の有無と同時に図形表示する機能
を有する実用新案登録請求の範囲第１項記載のシンセサ
イザ受信器。 ３　記憶手段は、その記憶内容に基づいて中間周波数帯
域幅を切換える機能を有する実用新案登録請求の範囲第
１項または第２項記載のシンセサイザ受信器。[Claims for Utility Model Registration] 1. Detection means for detecting the presence or absence of a received signal at a desired reception frequency and the presence or absence of a plurality of adjacent interfering signals, a storage means for retaining the results of this detection means, and a memory of this storage means. A synthesizer receiver comprising display means for simultaneously graphically displaying the presence or absence of a desired signal and the presence or absence of an interfering signal based on the contents. 2. The synthesizer receiver according to claim 1, wherein the display means has a function of graphically displaying the switching state of the intermediate frequency bandwidth at the same time as the presence or absence of a desired signal and the presence or absence of an interfering signal. 3. The synthesizer receiver according to claim 1 or 2, wherein the storage means has a function of switching the intermediate frequency bandwidth based on the stored contents.
JP13141982U 1982-08-30 1982-08-30 synthesizer receiver Granted JPS5936636U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13141982U JPS5936636U (en) 1982-08-30 1982-08-30 synthesizer receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13141982U JPS5936636U (en) 1982-08-30 1982-08-30 synthesizer receiver

Publications (2)

Publication Number Publication Date
JPS5936636U true JPS5936636U (en) 1984-03-07
JPS6345076Y2 JPS6345076Y2 (en) 1988-11-22

Family

ID=30297110

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13141982U Granted JPS5936636U (en) 1982-08-30 1982-08-30 synthesizer receiver

Country Status (1)

Country Link
JP (1) JPS5936636U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6135452U (en) * 1984-07-31 1986-03-04 シャープ株式会社 Radio receiver reception status display device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5942664B2 (en) * 2012-07-23 2016-06-29 株式会社Ｊｖｃケンウッド Wireless device and spectrum display method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5384223U (en) * 1976-12-14 1978-07-12
JPS55124321A (en) * 1979-03-20 1980-09-25 Matsushita Electric Ind Co Ltd Signal display unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5384223U (en) * 1976-12-14 1978-07-12
JPS55124321A (en) * 1979-03-20 1980-09-25 Matsushita Electric Ind Co Ltd Signal display unit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6135452U (en) * 1984-07-31 1986-03-04 シャープ株式会社 Radio receiver reception status display device

Also Published As

Publication number Publication date
JPS6345076Y2 (en) 1988-11-22

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