JPS5927341A - State change detecting device - Google Patents

State change detecting device

Info

Publication number
JPS5927341A
JPS5927341A JP13563982A JP13563982A JPS5927341A JP S5927341 A JPS5927341 A JP S5927341A JP 13563982 A JP13563982 A JP 13563982A JP 13563982 A JP13563982 A JP 13563982A JP S5927341 A JPS5927341 A JP S5927341A
Authority
JP
Japan
Prior art keywords
signal
old
information
storage device
stored
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13563982A
Other languages
Japanese (ja)
Inventor
Kimio Ogata
緒方 公夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13563982A priority Critical patent/JPS5927341A/en
Publication of JPS5927341A publication Critical patent/JPS5927341A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Small-Scale Networks (AREA)
  • Selective Calling Equipment (AREA)

Abstract

PURPOSE:To use in common a storage device of an input side, and to eliminate the limitation by the number of information destinations, by storing an informed external signal and the proceeding external signal, comparing the new and old signals by an indication of a detecting signal indication device, and detecting its variation. CONSTITUTION:An external signal is stored in a storage device 2 under the control of a multi-data transmitting device 3 through an input device 5. Information stored in the device 2 is transferred to a storage device 6 of each information destination in a prescribed period through the device 3. Information stored in the device 6 is stored successively in an old signal storage device 7. The new information stored in the device 6 and the old information stored in the device 7 are fetched in accordance with a place designated by a detecting signal indication device 9, comparison of the new and old information is executed by a signal variation detecting device 8, and a state variation is detected. In this way, even if a signal generating source of an input side exists at one point, the variation of an external signal can be detected individually by many information destinations.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は多重データ伝送装置を用いた計算機システムに
おいて外部信号の変化を検出する状態変化検出装置に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a state change detection device for detecting changes in external signals in a computer system using a multiplex data transmission device.

〔発明の技術的背景とその間境点〕[Technical background of the invention and its boundary points]

従来の状態変化検出装置の一例を第1図5二示す。 An example of a conventional state change detection device is shown in FIG.

第1図において、外部信号の変化は外部信号変化検出装
置1で検出され、その検出信号は通知先(すなわち信号
を伝送すべき計I!4.機)ごとに設けられた記憶装置
2の中に記憶される。
In FIG. 1, a change in an external signal is detected by an external signal change detection device 1, and the detected signal is stored in a storage device 2 provided for each notification destination (i.e., the total number of devices to which the signal is to be transmitted). is memorized.

こt+、らの検出信号に多重データ伝送袋&3を介して
各通知先に伝送され、通知先からの情報受取信号により
、または伝送装置の伝送完了時点でクリヤされ、これに
よって検出装置1で検出された状態変化信号Fi順次通
知先へ伝送される。
These detection signals are transmitted to each notification destination via the multiplex data transmission bag &3, and are cleared by the information reception signal from the notification destination or when the transmission is completed by the transmission device, and thereby detected by the detection device 1. The state change signals Fi are sequentially transmitted to the notification destination.

しかしながらこの場合は通知先ごとに記憶製置を設ける
必要があるので通知先の数が多くなると、記憶装置2の
数が増大し、装置上の制約から通知先の数が制限さね、
るという問題がある。
However, in this case, it is necessary to provide a storage device for each notification destination, so as the number of notification destinations increases, the number of storage devices 2 increases, and the number of notification destinations is limited due to device constraints.
There is a problem that

〔発明の目的〕[Purpose of the invention]

本発明は多重データ伝送装置を用いた計算機システムg
二おいて、外部信号の変化を伝送装置で伝送された後で
通知先ととl二検出[7,これぽユよって入力側の記憶
装置を共用にでき、通知先の数の制限を生ずることのな
い合理的な状態変化検出装置を提供することを目的とし
ている。
The present invention provides a computer system g using a multiplex data transmission device.
2) After the change in external signal is transmitted by the transmission device, the notification destination is detected. The purpose of the present invention is to provide a rational state change detection device that does not require

〔発明の概要〕[Summary of the invention]

本発明け、多重データ伝送装置を用いた計曽機システム
において、伝送装置に結合さtた各計算機ごとに七ね、
それ伝送された現任の信号を記憶する信号記憶4に置と
、前回の何句を記憶する旧信号記悔装[針と、上記新旧
の信号を比較E2.てその変化を検出する信号変化検出
装置と、上記信号変化検出装ff1cl二検出すべき信
号を指示する検出信号指示装置を設け、伝送された外部
信号から谷計算機ごとにそれぞれ必要とする信号の状態
変化を検出する状態変化検出装置である。
According to the present invention, in a computer system using a multiplex data transmission device, for each computer connected to the transmission device, seven
It is placed in the signal memory 4 that stores the current signal that was transmitted, and the old signal memory device that stores the previous number of phrases, and compares the old and new signals E2. A signal change detection device detects the change in the signal change detection device, and a detection signal instruction device instructs the signal to be detected by the signal change detection device ff1cl2. This is a state change detection device that detects changes.

〔発明の実施例〕[Embodiments of the invention]

本発明の一実施例を第2図に示す。 An embodiment of the present invention is shown in FIG.

第21ン1において外部信号は入力装置5を介し、て所
定の周期で記憶装置2に61.憶される。この記憶動作
は多重データ伝送装置3のコントロール部によってなさ
れる。
At the 21st line 1, the external signal is sent to the storage device 2 via the input device 5 at a predetermined period. be remembered. This storage operation is performed by the control section of the multiplex data transmission device 3.

記憶装置2に記憶された情報は、多重データ伝送装置4
+’3を介して、所定の周期で各通知先の記憶装置6に
仏縁される。
The information stored in the storage device 2 is transmitted to the multiplex data transmission device 4
+'3, the information is stored in the storage device 6 of each notification destination at a predetermined period.

記憶装置6に記憶された情#Ci順次旧信号記憶装置7
に記憶される。
Information #Ci stored in the storage device 6 Sequential old signal storage device 7
is memorized.

記憶装置6に記憶された新情報と旧信号記憶装置7に記
憶されている旧情報は検出信号指示装置9の指定する場
所■二応じて取出され、イi−@変化検出装置8によっ
て新旧比較が行なわれ、状態変化が検出される。
The new information stored in the storage device 6 and the old information stored in the old signal storage device 7 are taken out according to the location specified by the detection signal indicating device 9, and the new and old information are compared by the change detection device 8. is performed and a state change is detected.

上記検出場所の指示は種々のビット構成で行なうことが
できるので、指定場所を変えるととl二よって各通知先
で各個に必要とする状態変化を検出することが可能とな
る。
Since the above-mentioned detection location can be indicated using various bit configurations, changing the designated location makes it possible to detect the required state change individually at each notification destination.

〔発明の効果〕〔Effect of the invention〕

以上説明し7たように本発明によれば、多重データ伝送
装置を用いたit 8機システムにおいて、外部信号の
変化をデータ伝送の後で各通知先ごとに検出し、これに
よって入力側の信号発生源が一ケ所でも、多数の通知先
で外部信号の変化を各個に検出できる合理的な状態変化
検出装置が得られる。
As explained above, according to the present invention, in an IT 8-machine system using multiplex data transmission equipment, changes in external signals are detected for each notification destination after data transmission, and thereby the input side signal Even if there is only one source, a reasonable state change detection device can be obtained that can individually detect changes in external signals at a large number of notification destinations.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の状態変化検出装置の一例を示す系統図、
第2図は本発明の一実施例を示す系統図である。 1 外部信号変化検出装置 2.6 記憶装置 3 多重データ伝送装置4 割算機
     5 外部信号入力装置7 旧信号記憶装置 
8 信号変化検出装置9 相出信号指示装鮪
FIG. 1 is a system diagram showing an example of a conventional state change detection device.
FIG. 2 is a system diagram showing one embodiment of the present invention. 1 External signal change detection device 2.6 Storage device 3 Multiplex data transmission device 4 Divider 5 External signal input device 7 Old signal storage device
8 Signal change detection device 9 Output signal indicating device Tuna

Claims (1)

【特許請求の範囲】[Claims] 外部信号を計譜機に伝達する多重データ伝送装置の各伝
送端に、それぞれ伝送された現在の信号を記憶する信号
記憶装置と、前回の信号を記憶する旧信号記憶装置と、
上記新旧の信号を比較してその変化を検出する信号変化
検出装置と、上記信号変化検出[に検出すべき信号を指
示する検出信号指示装置を備えたことを特徴とする多重
データ伝送式計算機システムl二おける状態変化検出装
置0
At each transmission end of the multiplex data transmission device that transmits the external signal to the musical instrument, a signal storage device that stores the currently transmitted signal, and an old signal storage device that stores the previous signal;
A multiplex data transmission type computer system comprising: a signal change detection device that compares the old and new signals and detects a change; and a detection signal instruction device that instructs the signal change detection device to detect a signal to be detected. State change detection device 0 in l2
JP13563982A 1982-08-05 1982-08-05 State change detecting device Pending JPS5927341A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13563982A JPS5927341A (en) 1982-08-05 1982-08-05 State change detecting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13563982A JPS5927341A (en) 1982-08-05 1982-08-05 State change detecting device

Publications (1)

Publication Number Publication Date
JPS5927341A true JPS5927341A (en) 1984-02-13

Family

ID=15156506

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13563982A Pending JPS5927341A (en) 1982-08-05 1982-08-05 State change detecting device

Country Status (1)

Country Link
JP (1) JPS5927341A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61188655A (en) * 1985-02-15 1986-08-22 Meidensha Electric Mfg Co Ltd Circuit for detecting change in data from a large number of channels

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61188655A (en) * 1985-02-15 1986-08-22 Meidensha Electric Mfg Co Ltd Circuit for detecting change in data from a large number of channels

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