JPS592455A - Time division multiplex transmitting system - Google Patents

Abstract

PURPOSE:To eliminate the time delay, by using a time slot in one frame for loading data of a reserved channel together with a conventional channel, in a statistical time division multiplex transmission system. CONSTITUTION:Suppose that the channel #1 is reserved, the microprocessor 2-1 receives a corresponding data and the data is written in the 2nd data buffer section 5. Further, the data corresponding to remaining channels #2-#n are written in the 1st data buffer section 4 via microprocessors 2-2-2-n corresponded respectively. Each data written on a memory 3 in this way is read out with a time division processing microprocessor 6, after a frame synchronizing signal F is added, and the content of the buffer 5 is fed to a time slot #1, the data on the buffer 4 is fed to a time slot and transmitted as one frame.

Description

Detailed Description of the Invention (5) Technical Field of the Invention The present invention relates to a time division multiplex transmission system, particularly a so-called static time division multiplex transmission system, in which data is transmitted from a reserved channel within one frame. This invention relates to a time division multiplex transmission system in which data is loaded in a mixture of transmission systems in predetermined time slots to prevent undesired time delays from occurring in data from the reserved channels.

(B) Background and problems of the technology Conventionally, as a time division multiplex transmission system, there are two methods for transmitting data using time slots on 7 frames. A static time division transmission system as shown in FIG. 13 is known.

In the former case, if channels #1 to #4 exist, the time slots within one frame divided by the frame synchronization signal F are
As shown in FIG. 5, the allocation is fixedly assigned to each channel. This method has the advantage of being able to transmit data immediately if it occurs in a channel, for example, channel #1, but on the other hand, even if there is no data to be transmitted in channel #1, the time slot for that channel can be used as an empty time slot. This has the disadvantage of being inefficient if the frequency of data generation is small.

In the latter case, as shown in FIG. 1(B), for a channel where there is actually data to be transmitted, the stress of the channel and the transmission data are placed on each time slot and transmitted. Ru. This method has the advantage of being able to efficiently transmit data from more channels, but if each channel issues data at the same time, the data will have to wait in the buffer, causing a time delay. Sometimes.

For example, in the case of a banking system, data is generated relatively irregularly, but there may be a strong demand for transmission on a predetermined channel without the above-mentioned time delay.

(q Purpose and structure of the invention The purpose of the present invention is to solve the above points,
It is an object of the present invention to provide a transmission system that employs a statistical time division multiplex transmission system and is advantageous in eliminating the above-mentioned time delay. Therefore, in the time division multiplexing transmission system of the present invention, when transmitting data from multiple channels by loading it on time division time slots, the time division multiplexing transmission system of the present invention uses time divisions within 17 frames divided by 7 frame synchronization signals. In the static time division multiplexing transmission system in which the address of the channel that transmitted the data to be transmitted in the frame and the data to be transmitted are loaded on the slot, a first data buffer section for storing data in a predetermined time slot; and a second data buffer section for storing data in association with a reserved channel that carries transmission data on a predetermined time slot; A read access is made to the memory corresponding to a time slot within the one frame, and the contents of the second data buffer section are loaded into the predetermined time slot, and the contents of the second data buffer section are loaded onto the first data buffer section. A time-sharing processing processor is provided that performs a process of loading data that currently exists in the remaining time slots, and the time-sharing processing processor accesses the contents of the memory and loads the data that currently exists in the remaining time slots (ffl) in one frame.
J, the data from the reserved channel and the data from the general channel are loaded together. This will be explained below with reference to the drawings.

(End) Embodiment of the Invention FIG. 2 shows an example of a data transmission format used in the present invention, FIG. 3 shows a main part configuration of an embodiment of the present invention, and FIG. 4 shows a time-sharing process shown in FIG. 3. An explanatory diagram illustrating processing performed by a processor is shown.

In the case of the present invention, a user makes a reservation for one or more of a plurality of channels, and data from each reserved channel is loaded onto a fixed time slot as shown in FIG. 1(5). For the remaining channels, a static time division transmission method as shown in FIG. 1(B) is adopted. That is, as in the data format shown in FIG. 2, a time slot such as "#1" shown in the drawing is allocated immediately after the frame synchronization signal F for the reserved channel.

FIG. 3 shows the main part configuration of an embodiment of the present invention, and the reference numeral 1 in the figure indicates a time division processing unit, 2-1, 2-2, . . .
......, 2-n are channel-compatible microprocessors, 3 is a memory, 4 is a first data buffer section, 5 is a second data buffer section, and 6 is a time division processing section. It represents a microprocessor.

Assume now that the above-mentioned reservation has been made for channel #1. In this case, when the microprocessor 2-1 receives data corresponding to channel #1, the microprocessor 2-1 of the selected channel writes the data to the second data buffer unit 5. On the other hand, the data corresponding to the remaining channels are stored in the corresponding microprocessors 2-2, 2-3. . . . , 2-n, and is written onto the first data buffer section 4. The first data buffer unit 4 may have a FiFO configuration.

Each piece of data written on the memory 3 in this manner is read out in correspondence with the time slot by the time-division processing microprocessor 6, and is transmitted in one frame. That is, as shown in Figure WJ4, the microprocessor 6 adds a frame synchronization signal F and then loads the contents of the second data buffer 5 onto the time slot valve 1 as shown in Figure 2 (if the data is Then, the data existing on the first data buffer 4 is placed on the time slot as shown in FIG. 2, and the completed frame is transmitted onto the line.

(g)) As described in detail, according to the present invention, reserved channels can be transmitted without time delay when a static time division multiplex transmission system is adopted. For this,
It is possible to provide flexibility for special channels with good transmission efficiency, and it is possible to provide a data transmission system with a wide range of applications.

[Brief explanation of drawings]

Fig. 1 is an explanatory diagram explaining the prerequisite problem of the present invention, Fig. 2 is an example of a data transmission format used in the present invention, Fig. 3 is a main part configuration of an embodiment of the present invention, and Fig. 4 is An explanatory diagram illustrating processing performed by the time-sharing processing processor illustrated in FIG. 3 is shown. In the figure, 1 is a time-sharing processing unit, 2 is a channel-compatible microprocessor, 3 is a memory cell, 4 is a first data buffer, 5 is a second data buffer, and 6 is a time-sharing processing 1
It represents the microprocessor. Patent applicant Hiroshi Mori (1 other person), agent patent attorney of Fujitsu Ltd.

Claims (1)

[Claims] When data from multiple channels is loaded and transmitted on time-division time slots, the channel that sent the data transmitted in the frame on the time slot within one frame divided by a frame synchronization signal. In the static time division multiplexing transmission method in which the address of the address and the data to be transmitted are loaded, a predetermined first data buffer unit stores data from each of the plurality of general channels. a memory having a second data memory (rough 1 part) for storing data in association with a reserved channel carrying transmission data on a time slot, and reading into the memory corresponding to a time slot within the one frame; access and the above 2nd
The contents of the 77th part of the data .
A time-sharing processing processor is provided that performs processing to load data that currently exists on the section onto the remaining time slots, and the time-sharing processing processor utilizes the time slots within one frame while accessing the contents of the memory. A time division multiplex transmission system characterized in that data from the reserved channel and data from the general channel are carried together.