JPS5922361A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5922361A
JPS5922361A JP57131392A JP13139282A JPS5922361A JP S5922361 A JPS5922361 A JP S5922361A JP 57131392 A JP57131392 A JP 57131392A JP 13139282 A JP13139282 A JP 13139282A JP S5922361 A JPS5922361 A JP S5922361A
Authority
JP
Japan
Prior art keywords
indium
tin
film
polycrystalline silicon
liquid crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57131392A
Other languages
Japanese (ja)
Other versions
JPH0425700B2 (en
Inventor
Takeo Yamada
山田 彪夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP57131392A priority Critical patent/JPS5922361A/en
Publication of JPS5922361A publication Critical patent/JPS5922361A/en
Publication of JPH0425700B2 publication Critical patent/JPH0425700B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • H01L29/456Ohmic electrodes on silicon
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03GELECTROGRAPHY; ELECTROPHOTOGRAPHY; MAGNETOGRAPHY
    • G03G21/00Arrangements not provided for by groups G03G13/00 - G03G19/00, e.g. cleaning, elimination of residual charge
    • G03G21/04Preventing copies being made of an original
    • G03G21/046Preventing copies being made of an original by discriminating a special original, e.g. a bank note

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Liquid Crystal (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To enable a complete ohmic contact between polycrystalline silicon and a conductive transparent electrode by holding a thin-film in indium, tin or an indium-tin alloy similar to the conductive transparent electrode between them. CONSTITUTION:A contact hole is bored to a silicon oxide film 14 on a drain region formed while coating the surface of a polycrystalline silicon thin-film 13, and a drain electrode extracting window is formed. The indium-tin thin-film in approximately 10-100Angstrom is sputtered by using a target in the indium-tin alloy, and an indium oxide film containing tin oxide is sputtered continuously in approximately 1,000Angstrom . An electrode for driving a liquid crystal of a desired pattern is obtained through photolithography technique. The polycrystalline silicon 13 of the drain region is in contact with the transparent electrode 16 through the indium-tin thin-film 15 at that time. The polycrystalline silicon 13 and the transparent electrode 16 are brought to a complete ohmic conductive state through the indium-tin thin-film by heating the whole at 200-500 deg.C. Lastly, the liquid crystal is oriented to the whole surface of a glass plate 12, and one panel board of a liquid crystal display unit is completed.

Description

【発明の詳細な説明】 本発明は、多結晶シリコン又はアモルファスシリコン及
び導電性透明電極を構成部材とする半導体装置に関し、
詳しくは上記両部相間のオーミックコンタクトを取る方
法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device comprising polycrystalline silicon or amorphous silicon and a conductive transparent electrode as constituent members.
More specifically, the present invention relates to a method of establishing ohmic contact between the above-mentioned two parts.

近年平板型液晶ディスプレーは腕時計、電卓、玩具を始
めとして自動車、計測器、情報機器端末へと応用分野が
拡大されつつあり、特に最近においてはORTに替る安
価な平面ディスプレーとして薄膜トランジスターのアク
ティブマトリクスによって液晶を駆動する方式が検討さ
れている。
In recent years, the field of application of flat-panel liquid crystal displays has been expanding from wristwatches, calculators, and toys to automobiles, measuring instruments, and information equipment terminals.In particular, active matrices of thin-film transistors have recently been used as inexpensive flat-panel displays to replace ORT. Methods for driving liquid crystals are being considered.

これは透明基板上にスイッチング用辿膜トランジスター
回路をマトリクス状に形成し、この基板と他の透明ガラ
ス板間に液晶を封入した画像表示用のディスプレーパネ
ルである。
This is a display panel for displaying images in which switching film transistor circuits are formed in a matrix on a transparent substrate, and liquid crystal is sealed between this substrate and another transparent glass plate.

アクティブマトリックスによる液晶表示装置の画素の構
成の一例を第1図に示した。スイッチングトランジスタ
ー1のゲーート電極はゲートライン4に、ソース電極は
ソースライン5にそれぞれ接続され、ドレイン電極は液
晶乙の駆動電極及び、コンデンサー2の一方の電極に接
続されている。
An example of the structure of a pixel of a liquid crystal display device using an active matrix is shown in FIG. The gate electrode of the switching transistor 1 is connected to the gate line 4, the source electrode is connected to the source line 5, and the drain electrode is connected to the drive electrode of the liquid crystal 2 and one electrode of the capacitor 2.

又薄膜トランジスターを用いガラス板上にアクティブマ
トリックスを構成した場合の一画素の構成例を示したも
のが第2図の平面図である。
Further, the plan view of FIG. 2 shows an example of the configuration of one pixel when an active matrix is constructed on a glass plate using thin film transistors.

6は薄膜トランジスターのドレイン、チャンネルソース
を形成する多結晶シリコンで蘂り、ゲート電極はゲート
ライン7に接続され、又ソース電極はソースライン8に
接続されている。又、液晶駆動電極11は図かられかる
ように薄膜トランジスターのドレインの多結晶シリコン
を延在して設けられれば製造工程が簡単となる。しかる
に光透過型の液晶表示装置の場合、液晶駆動電極11は
、導電性を有する透明11極でなければならないが、薄
膜トランジスター6の材料として用いる多結晶シリコン
は、1000オングストローム程度に薄くしても光を余
り通さずさらに、干渉色により着色もされるため駆動電
極として用いることはできない。現在導電性の透明物質
としては、酸化スズ又は酸化インジウム、あるいは工’
I!O膜と詳される前記酸化スズをわずか含有する酸化
インジウムを用いるのが液晶を用いた表示装置の一般的
な方法であって、安定性、導電性、光の透過性も非常に
良く、透明電極として理想的である。
6 is made of polycrystalline silicon forming the drain and channel source of the thin film transistor, the gate electrode is connected to the gate line 7, and the source electrode is connected to the source line 8. Further, if the liquid crystal drive electrode 11 is provided by extending the polycrystalline silicon of the drain of the thin film transistor as shown in the figure, the manufacturing process will be simplified. However, in the case of a light-transmissive liquid crystal display device, the liquid crystal drive electrode 11 must have 11 conductive transparent electrodes, but the polycrystalline silicon used as the material for the thin film transistor 6 can be thinned to about 1000 angstroms. It cannot be used as a drive electrode because it does not pass much light and is colored by interference color. Currently, conductive transparent materials include tin oxide, indium oxide, and
I! A common method for display devices using liquid crystals is to use indium oxide containing a small amount of tin oxide, known as O film, which has excellent stability, conductivity, and light transmittance, and is transparent. Ideal as an electrode.

ところが第2図に示されるように、透明電極11と多結
晶シリコン6とは電気的にオーミックコンタクトを取ら
ねばならないが、ドレイン電極上の絶縁層にコンタクト
ホール9を開孔し多結晶シリコン6ど透明電極11を直
接接触させても、電気的接触が取り朔く液晶表示装置と
しては実用が不可能であった。
However, as shown in FIG. 2, although it is necessary to make electrical ohmic contact between the transparent electrode 11 and the polycrystalline silicon 6, a contact hole 9 is opened in the insulating layer on the drain electrode to connect the polycrystalline silicon 6 and the like. Even if the transparent electrodes 11 were brought into direct contact, it was impossible to put it into practical use as a liquid crystal display device due to insufficient electrical contact.

これは多結晶シリコン膜上に形成される極めて薄いナチ
ュラルオキサイドの影響とも、あるいはインジウムがア
クセプターとして働きDL−Nジャンクションを形成す
るからだとも言われている。
This is said to be due to the extremely thin natural oxide formed on the polycrystalline silicon film, or because indium acts as an acceptor and forms a DL-N junction.

このため一般的には多結晶シリコンと透明導電膜との界
面にアルミニュームを挾む方法も考えられているがやは
りアルミニューム自体酸化され易くアルミニュームと透
明導電極とのオーミックコンタクトが取れ難いという欠
点を有している。
For this reason, a method of sandwiching aluminum between the polycrystalline silicon and the transparent conductive film is generally considered, but aluminum itself is easily oxidized and it is difficult to establish ohmic contact between the aluminum and the transparent conductive electrode. It has drawbacks.

本発明は以上の点に鑑みてなされたものであって多結晶
シリコンと導電性透明電極との間に導電性透明電極に類
似したインジウム、又はスズ、あるいはインジウム−ス
ズ合金の薄膜を挾むことにより両者の間に完全なオーミ
ックコンタクトを可能とするものである。
The present invention has been made in view of the above points, and involves sandwiching a thin film of indium, tin, or indium-tin alloy similar to a conductive transparent electrode between polycrystalline silicon and a conductive transparent electrode. This enables perfect ohmic contact between the two.

以下本発明を図面によって詳細に説明する。The present invention will be explained in detail below with reference to the drawings.

第3図は薄膜トランジスターを用いたアクティブマ) 
IJソックス晶表示装置の本発明による製造工程を説明
するものであって、特に薄膜トランジスターのドレイン
と、液晶駆動用透明電極とのコンタクト領域について、
その製造工程の一例をその工程順に示した断面図である
Figure 3 is an active material using thin film transistors)
This is to explain the manufacturing process of the IJ sock crystal display device according to the present invention, especially regarding the contact area between the drain of the thin film transistor and the transparent electrode for driving the liquid crystal.
FIG. 3 is a cross-sectional view showing an example of the manufacturing process in the order of the steps.

第3図(α)ではガラス板12の表面−Fに多結晶シリ
コン薄膜13を形成し、薄膜トランジスターのドレイン
、チャンネル、ソース領域とすべき部分以外をエツチン
グ除去した時の断面を示したものである。薄膜トランジ
スターのドレイン及びソース領域には高濃度の不純物が
拡散される。次に第3図(b)に示される様に多結晶ン
リコン薄膜16の表面をおおってシリコン酸化膜14を
形成する。
FIG. 3 (α) shows a cross section when a polycrystalline silicon thin film 13 is formed on the surface -F of the glass plate 12, and the areas other than those to be used as the drain, channel, and source regions of the thin film transistor are removed by etching. be. Highly concentrated impurities are diffused into the drain and source regions of the thin film transistor. Next, as shown in FIG. 3(b), a silicon oxide film 14 is formed to cover the surface of the polycrystalline silicon thin film 16.

このシリコン酸化膜は多結晶シリコン13の表面を熱酸
化して得たものでも、又気相生長法によって得たもので
も良い。さらにはシリコン酸化膜ではなく他の絶縁膜、
例えばシリコン窒化膜、アルミナ膜等でも良い。次にド
レイン領域」二のシリコン酸([414にコンタクトホ
ールを開孔し、ドレイン電極取り出し窓を作る。次に第
3図(c)の如くインジウム−スズ合金のターゲットを
用いて10X〜1ooX程度のインジウム−スズ薄膜を
スパッタリングし連続して酸化スズを含有する重化イン
ジウム膜を約1oooXスパツタリングする。
This silicon oxide film may be obtained by thermally oxidizing the surface of polycrystalline silicon 13, or may be obtained by vapor phase growth. Furthermore, other insulating films instead of silicon oxide films,
For example, a silicon nitride film, an alumina film, etc. may be used. Next, a contact hole is made in the silicon acid (414) in the drain region to form a window for taking out the drain electrode.Next, as shown in Figure 3(c), an indium-tin alloy target is used to make a An indium-tin thin film of approximately 1 mm is sputtered, followed by sputtering of a heavy indium film containing tin oxide of approximately 100 mm.

次にフォ) IJソゲラフイー技術により所望のパター
ンの液晶駆動用電極・を得る。
Next, f) Obtain a liquid crystal driving electrode with a desired pattern using IJ sogelafy technology.

この時の基板の断面構造は第3図(d)に示される如く
、ドレイン領域の多結晶シリコン13はインジウム−ス
ズ薄膜15を介して透明電極16と接触している。この
様な構成によってこれを2 ’00”0〜500℃に加
熱することにより多結晶シリコン13と透明電極16と
はインジウム−スズ薄膜を介して完全なオーミック導通
状態となる。
The cross-sectional structure of the substrate at this time is shown in FIG. 3(d), where the polycrystalline silicon 13 in the drain region is in contact with the transparent electrode 16 via the indium-tin thin film 15. With such a configuration, by heating the polycrystalline silicon 13 to 500 DEG C., the polycrystalline silicon 13 and the transparent electrode 16 are brought into complete ohmic conduction via the indium-tin thin film.

インジウム−スズ薄膜をコンタクトホール部のみフォト
リソグラフィー技術を用いて残ず場−合はインジウ★−
スズ膜を前記膜厚よりさらに厚く形成することが可能と
なる−が工程数が増加する。
If the indium-tin thin film is left only in the contact hole using photolithography, the indium tin film will be removed.
This makes it possible to form the tin film even thicker than the above film thickness, but the number of steps increases.

本実施例にて採用したインジウム−スズ薄膜の膜厚でも
充分オーミックコンタクトが取れ、さらに透明電極の透
過率にも殆んど影響を与えてぃなし1゜ 最後にガラス板表面全体に液晶の配向処理を行なって、
液晶表示装置の一方のパネル板が完成する。次に他の実
施例として前記実施例のインジウム−スズ薄膜の形成方
法の別個として、酸化スズを含有する酸化インジウム−
ゲットのみを用いて、先ず酸素を全く含まないアルゴン
雰囲気中にてスパッタリングを短時間行ない多結晶シリ
コン表面にインジウム−スズ薄膜を10X〜1ooX程
度形成したのぢスパッタチャンバー内全酸素ガス圧7 
X I Cl’ torrl、アルゴンガス圧を5 X
 10−3torr、ニM節して工TO膜を連続スパッ
タリングする方法である。この方式では前記実施例に較
ペターゲットが一種類ですむという利点がある。
Even with the thickness of the indium-tin thin film adopted in this example, sufficient ohmic contact can be achieved, and it also has almost no effect on the transmittance of the transparent electrode.1゜Finally, the liquid crystal was aligned over the entire surface of the glass plate. After processing,
One panel board of the liquid crystal display device is completed. Next, as another example, as a separate method of forming an indium-tin thin film according to the above example, an indium oxide film containing tin oxide
First, sputtering was performed for a short time in an argon atmosphere containing no oxygen using only a target to form an indium-tin thin film of about 10X to 1OOX on the polycrystalline silicon surface.The total oxygen gas pressure in the sputtering chamber was 7.
X I Cl' torrl, 5 X argon gas pressure
This is a method in which the TO film is continuously sputtered at 10-3 torr and 2M steps. This method has the advantage that only one type of comparison target is required in the above embodiment.

なおインジウム−スズ薄膜及び工To膜はフォトリソグ
ラフィー技術にてドライエツチングあるいは塩層、硝酸
混合液にて同時にエツチングが可能である。
Incidentally, the indium-tin thin film and the To film can be dry-etched using photolithography technology, or they can be etched simultaneously using a salt layer and a nitric acid mixture.

この様に本発明によれば、多結晶シリコンと透明電極の
11.11にインジウム−スズ薄膜を介することにより
、簡単に両者のオーミックコンタクトを低抵抗で可能と
するものであって、しがもインジウム−スズ簿膜の介在
による表示装置の特性への影響は全くなく、さらに工程
も従来方法に較べて簡略化出来その効果は大きい。
As described above, according to the present invention, by interposing the indium-tin thin film between the polycrystalline silicon and the transparent electrode 11, 11, it is possible to easily establish ohmic contact between the two with low resistance. The interposition of the indium-tin film has no effect on the characteristics of the display device, and the process can be simplified compared to the conventional method, which is highly effective.

本発明での薄膜トランジスターの材料としては多結晶シ
リコンのみでなく、アモルファスンリコン、セレレ化ノ
lドミウムであっても良い。
The material for the thin film transistor in the present invention is not limited to polycrystalline silicon, but may also be amorphous silicon or nordium celery.

なお、上記実施例において用いたインジウム−スズ合金
薄膜以外にインジウム又はスズを介して透明導電膜を形
成しても上記実施例と同程度の効果が得られている。
Note that, in addition to the indium-tin alloy thin film used in the above embodiment, a transparent conductive film may be formed using indium or tin to obtain the same effect as in the above embodiment.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はアクティブマトリックス液晶表示装置の1つの
画素の構成例を示したものであり、第2図は従来におけ
る薄膜トランジスターを用いたアクティブマトリックス
液晶表示装置の1つの画素のパネル上での構成の一例を
示した平面図である。 第6図(a)〜(d)は本発明によりアクティブマトリ
ックスを製造する方法の一例を工程順に示した断面図で
ある。 1.6・・・・・・薄膜トランジスター2・・・・・・
コンデンサー 3・・・・・・液晶 4.7・・・・・・ゲートライン 5.8・・・・・ソースライン 9.10・・・・・・コンタクトホール11・・・・・
・液晶駆動用透明電極 12・・・・・・ガラス板 13・・・・・・多結晶ンリコン 14・・・・・・酸化ンリコン 15・・・・・・インジウム−スズ薄膜16・・・・・
・導電性透明電極 以  上 出願人  株式会社諏訪精工舎 代理人  弁理士 最」二  務 第3図
Figure 1 shows an example of the configuration of one pixel of an active matrix liquid crystal display device, and Figure 2 shows the configuration of one pixel on a panel of a conventional active matrix liquid crystal display device using thin film transistors. It is a top view showing an example. FIGS. 6(a) to 6(d) are cross-sectional views showing an example of a method for manufacturing an active matrix according to the present invention in the order of steps. 1.6... Thin film transistor 2...
Capacitor 3...Liquid crystal 4.7...Gate line 5.8...Source line 9.10...Contact hole 11...
・Transparent electrode for driving liquid crystal 12... Glass plate 13... Polycrystalline silicon 14... Polycrystalline silicon oxide 15... Indium-tin thin film 16...・
・Conductive transparent electrodes and above Applicant Suwa Seikosha Co., Ltd. Agent Patent attorney Sai'2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 少なくとも多結晶シリコン又はアモルファスシリコン及
び導電性透明N、極を構成部材とする半導体装置におい
て、該導電性透明電極はインジウム又はスズ、あるいは
インジウム−スズ合金の薄膜層のいずれかを介して形成
されていることを特徴とする半導体装置。
In a semiconductor device comprising at least polycrystalline silicon or amorphous silicon and a conductive transparent electrode, the conductive transparent electrode is formed through a thin film layer of indium or tin, or an indium-tin alloy. A semiconductor device characterized by:
JP57131392A 1982-07-28 1982-07-28 Semiconductor device Granted JPS5922361A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57131392A JPS5922361A (en) 1982-07-28 1982-07-28 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57131392A JPS5922361A (en) 1982-07-28 1982-07-28 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5922361A true JPS5922361A (en) 1984-02-04
JPH0425700B2 JPH0425700B2 (en) 1992-05-01

Family

ID=15056888

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57131392A Granted JPS5922361A (en) 1982-07-28 1982-07-28 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5922361A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS613471A (en) * 1984-06-15 1986-01-09 Kanegafuchi Chem Ind Co Ltd Semiconductor device
JPS61135164A (en) * 1984-12-06 1986-06-23 Canon Inc Thin-film transistor element
US5650664A (en) * 1992-02-28 1997-07-22 Canon Kabushiki Kaisha Connector effecting an improved electrical connection and a semiconductor apparatus using such connector
DE102014224232A1 (en) 2013-11-29 2015-06-03 Hitachi Automotive Systems, Ltd. cylinder device
JP2016068448A (en) * 2014-09-30 2016-05-09 住友重機械工業株式会社 Vertical injection molding machine
JP2019127636A (en) * 2018-01-26 2019-08-01 日本製鉄株式会社 Mooring chain steel and mooring chain

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS613471A (en) * 1984-06-15 1986-01-09 Kanegafuchi Chem Ind Co Ltd Semiconductor device
JPS61135164A (en) * 1984-12-06 1986-06-23 Canon Inc Thin-film transistor element
JPH0550865B2 (en) * 1984-12-06 1993-07-30 Canon Kk
US5650664A (en) * 1992-02-28 1997-07-22 Canon Kabushiki Kaisha Connector effecting an improved electrical connection and a semiconductor apparatus using such connector
DE102014224232A1 (en) 2013-11-29 2015-06-03 Hitachi Automotive Systems, Ltd. cylinder device
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