JPS59125177U

JPS59125177U - Framing code detection circuit

Info

Publication number: JPS59125177U
Application number: JP1983016109U
Authority: JP
Inventors: 御園生　勇
Original assignee: 日本放送協会
Priority date: 1983-02-08
Filing date: 1983-02-08
Publication date: 1984-08-23
Also published as: JPH0535661Y2

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は文字放送用データパケットの構成例を示す信号
波形図、第２図は８ビツト構成のフレーミングコード検
出時における参照フレーミングコードとデータパケット
との一致ビット数の変化の態様を示す線図、＠３図は本
考案フレーミングコード検出回路の構成例を示すブロッ
ク線図、第４図は同じくその構成例における各部信号波
形を示す波形図である。ＤＰ・・・データパケット、ＨＤ・・・ヘッダ部、ＤＤ
・・・”ｙ−夕部、ＣＲ””クロックランイン、ＦＣ・
・・フレーミングコード、Ｓｌ／ＩＮ・・・ザービス識
別／割込み符号、ＤＩＩ、ＤＩ２・・・データ識別符号
、１・・・フレーミングコードゲートパルス発生回路、
２・・・フレーミングコードゲ、−ト回路、３・・・８
ビツト・シフトレジスタ、４・・・フレーミングコード
一致検出回路、５・・・イニシャルフレーミングコード
検出回路。Fig. 1 is a signal waveform diagram showing an example of the structure of a teletext data packet, and Fig. 2 is a diagram showing how the number of matching bits between a reference framing code and a data packet changes when an 8-bit framing code is detected. , @3 is a block diagram showing a configuration example of the framing code detection circuit of the present invention, and FIG. 4 is a waveform diagram showing signal waveforms at various parts in the same configuration example. DP...Data packet, HD...Header section, DD
..."Y-Yube, CR""Clock run in, FC・
...Framing code, Sl/IN...Service identification/interrupt code, DII, DI2...Data identification code, 1...Framing code gate pulse generation circuit,
2...Framing code game, -to circuit, 3...8
Bit shift register, 4...Framing code match detection circuit, 5...Initial framing code detection circuit.

Claims

[Scope of utility model registration request]

A framing code detection circuit that sequentially compares a data packet with a reference framing code to detect an 8-bit framing code in the data packet, gates a clock run-in preceding the framing code in the data packet. a gating circuit for sequentially comparing the gated data packet with the reference framing code to detect an 8-bit code with at least a 6-bit match; A framing code detection circuit comprising: an initial framing code detection circuit that extracts only the 8-bit code first detected from a data packet as the framing code.