JPS5872786U - Input level and power supply voltage reduction status display circuit - Google Patents
Input level and power supply voltage reduction status display circuitInfo
- Publication number
- JPS5872786U JPS5872786U JP16847781U JP16847781U JPS5872786U JP S5872786 U JPS5872786 U JP S5872786U JP 16847781 U JP16847781 U JP 16847781U JP 16847781 U JP16847781 U JP 16847781U JP S5872786 U JPS5872786 U JP S5872786U
- Authority
- JP
- Japan
- Prior art keywords
- display circuit
- power supply
- supply voltage
- transistor
- input level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Amplifiers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来例を示す図、第2図は本考案の一実施例を
示す図である。
3・・・・・・増幅器、4・・・・・・表示回路、Tr
l、Tr2・・・・・・トランジスタ、D・・・・・・
ツェナーダイオード。FIG. 1 is a diagram showing a conventional example, and FIG. 2 is a diagram showing an embodiment of the present invention. 3...Amplifier, 4...Display circuit, Tr
l, Tr2...Transistor, D...
zener diode.
Claims (1)
続された表示回路と、該表示回路と電源間に接続された
トランジスタと、該トランジスタのベース側に接続され
たツェナーダイオードとを備え、 電源電圧が充分に高い場合には前記トランジスタを導通
させ、前記表示回路を駆動状態となし、以って前記表示
回路にて入力信号のレベルを表示し、 電源電圧が減少した場合には前記ツェナーダイオードに
て前記トランジスタを非導電となし、以って前記表示回
路を非駆動状態となすようにしたことを特徴とする入力
レベル兼電源電圧減少状態表示回路。[Claims for Utility Model Registration] An amplifier to which an input signal is applied, a display circuit connected to the output end of the amplifier, a transistor connected between the display circuit and a power supply, and a transistor connected to the base side of the transistor. and a Zener diode which is connected to the power source, and when the power supply voltage is sufficiently high, the transistor is made conductive and the display circuit is driven, so that the level of the input signal is displayed on the display circuit, and the power supply voltage is 2. An input level and power supply voltage decrease state display circuit, characterized in that when the voltage decreases, the transistor is made non-conductive by the Zener diode, thereby placing the display circuit in a non-driving state.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16847781U JPS5872786U (en) | 1981-11-11 | 1981-11-11 | Input level and power supply voltage reduction status display circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16847781U JPS5872786U (en) | 1981-11-11 | 1981-11-11 | Input level and power supply voltage reduction status display circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5872786U true JPS5872786U (en) | 1983-05-17 |
Family
ID=29960526
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16847781U Pending JPS5872786U (en) | 1981-11-11 | 1981-11-11 | Input level and power supply voltage reduction status display circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5872786U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0336583U (en) * | 1989-08-22 | 1991-04-09 |
-
1981
- 1981-11-11 JP JP16847781U patent/JPS5872786U/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0336583U (en) * | 1989-08-22 | 1991-04-09 |
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