JPS5855978A - Picture display - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image display device, and more particularly to control of modifying displayed graphics.

In conventional image display devices, when performing internal modification such as filling the inside of a closed-loop figure with a specific color or applying a diagonal line pattern, the modification control is complicated and there is no method that can be easily performed. In view of the above, it is an object of the present invention to provide an image display device that allows internal modification of closed-loop figures and the like easily and quickly.

Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 shows an example of the configuration of an image display device of the present invention, in which the CPU is a central processing unit that controls the drive of each part, and supplies address control signals to each part via an address bus ABt-. Data signals are exchanged with each section via the data bus DB. central processing unit CP
The drive control at U is carried out on the basis of a control signal supplied from an input section III (not shown) and in accordance with the control memory α which is also called up. CRT is a display section.

CB'l'C is a CR'I' control circuit which supplies various control signals to the display section CRT and controls the drive of the display section CRT. The CRT synchronizing signal generated in the CR1 control circuit CIL'l'C is displayed on the display 5 via the Haigo line 8/, 82t-.
Supplied to CRT. 8 is address selector, RFM
is a display memory that stores data to be displayed on the display section CR'f'. The address selector A8 is supplied with an address signal for accessing the display memory RIM'i from the central processing unit 11 CPU.
Same as RT control circuit CRTC (this memo +) RFM
t-to access σ) address signals are supplied via address bus RAB'i. This address selector 8 selects either one of the address signals inputted as described above based on address switching (!! No. A88) supplied from the central processing unit CPU via the signal line S3. It is then taken out and supplied to the display memo 17 RFM via the signal line Btt2.

Next, DM is a modification memory, and a display memo IJ T
Among the image data stored in the LFM, only specific image data is stored. This modification processing device CPU
This modification memory is supplied from DM? to access. IPF/and! One of them is a display memory enable latch and two modification memory enable latch, and these are set/reset switching controlled by the central processing unit CPU. When display memory enable latch FF/ is set, this latch FF/
The display memory TPnL can be accessed from the central processing unit @CPU. Similarly, when the modification memory enable latch Fl'λ is in the set state, a control signal is sent to the modification memory DM via the signal IIB&'1, allowing access to the modification memory DM from the central processing unit CPU. becomes.

Next, SR is a shift register, and display memo 91
The image data read out from within 17M and supplied via signal line S7i is converted into a video signal.

The converted image data is sent to the display section CRT via the signal line 81.
The display section CRT displays an image based on the image data.

Note that CKG is a clock generator that generates a basic clock, and the basic tarok is supplied to the clock control circuit CKC via a signal @89. Clock control circuit C
The KC generates a CPU control clock, a CRT control circuit clock, a video signal load clock, and a video signal shift clock based on the input basic clock, and sends them to the central processing bag via signal lines 870 to 8/Jt- respectively. CP[7, output to CILT control circuit CRTC and shift register βR. Each of the above-mentioned parts is driven based on these clocks.

In the image display device configured as described above, a case will be described in which a diagonal line pattern as shown in the third figure is decorated inside the closed loop figure ABCD as shown in the second figure.

First, t-
When creating the closed y-1 figure ABCD shown in the first figure, the central processing unit CPU activates the display memory enable latch PF/and the modification memory enable latch!
! Set 2 together. Therefore, display memo 17 RF
Both M and the modification memory DM can be accessed, and the closed loop figure ABCD created in the input section rc f)
Image data is stored at predetermined addresses in these memories RFM and DM. At the same time, the display gcRTel”!
, CR"l' Under the control of the control circuit CR'rC, the created closed-loop diagram ABCD is displayed. Next, an input signal such as the diagonal 1It- 1 as shown in Fig. When the processing device CPUK is supplied, a predetermined control operation causes the diagonal iii AtDla AI as shown in the figure below.
DI BC snow + BIC1 will be applied. In this case, only the display memory enable latch FF is held in the set state S, and the modification memory enable latch FF is reset. That is, only the display memo IJ RFM can be accessed by the central processing unit CPU. Therefore,
Created diagonal line AID! , AmD, BC Yuki*1IC
1 image data is stored only in the display memory RFM,
The memory DM stores only the contour data of the closed loop figure ABCD. On the display section CRT, an image is displayed as shown in the figure μ.

Next, an input signal as indicated by the diagonal lines shown in the third diagram is supplied from the input section to the central processing unit CPH.

In the diagonal line shown in Figure 1! BIHks Cm person Ctr D
tCm klR-tei Figure ABCD created as shown
The control operations that are drawn overlapping each other are performed by the central processing unit CP.
Performed by U. At this time, since the contour data of the closed-loop figure ABCD is held in the memory IBM, when creating the diagonal II Am Bt, for example, the intersection point E of this diagonal line and the diagonal line BC drawn in advance (the valley in Figure 3) It can be easily determined whether or not the point intersects with the contour line by detecting the data in this memory ljDM. In addition, these diagonal lines klBlI A4 CI Act j
When creating Dl cm, only the display memory enable and A/2 side FF/ are set, and the created oblique image data is stored only in the display memory RFM.

At this time, an image is displayed on the display section/CRT as shown in the third figure.

In this way, in this embodiment, when internally modifying a closed-loop figure, only the outline of the closed-loop figure is stored in the memory D.
The contour data can be held within M, and internal modification can be performed simply and easily based on this contour data.

In addition, even in a state where the closed loop figures ABCD and abed overlap as shown in Figure 4, each contour block BCD
, abed, aeCf f) If only the image data is stored in the meeting modification memory DM, for example, closed loop 1a
After filling the inside of the bed with red, close loop 1・Cfv
This can be easily done based on the data in the DM.

As explained above, 1. in the present invention, in addition to the display memory, 2. the same address space tl as the display memory.
- Does it have a modification memory? These memories can be accessed selectively or simultaneously, and only specific data such as outline data of closed-loop figures can be stored in the modification memory at all times. When doing so, it is possible to easily detect the outline of a closed-loop figure, and to perform internal modifications easily and easily.

In the above description, the case where /@II is set in the modification memory has been described, but it is of course not limited to this.

[Brief explanation of the drawing]

Is Fig. 1 an example of the image display device of the present invention? Block diagram shown,
Figures 2 to 5 are diagrams for explaining the procedure for applying diagonal lines inside the closed loop figure BCD, and Figure 4 shows a state in which the closed loop figures ABCD and abed overlap.
The figure is: CPU: Central processing unit, AB: Address bus, DB: Data bus, CM: Control memory % CRT: Display section, CRTC: CRT control circuit, A8 - Address selector, RFM - Display memory, RAB - Re7 retrieval address bus, A88... Address switching signal, DM... Modification memory, FF/, FF co-enable latch, 8R - Shift register, CKG-clock generator, CKC...
- Clock control circuit, 81-811... signal line. Patent applicant: Canon Co., Ltd. Figure 1 Figure 2 Figure 4 Figure 6 Figure 3 Figure 5

Claims (1)

[Claims] a display memory that stores image data of a figure to be output and displayed on an image display section; a modification memory that is the same as the display memory; An image display device comprising a switching means that allows access to the display memory and the modification memory simultaneously or selectively.