JPS5851361U - Microcomputer control circuit - Google Patents
Microcomputer control circuitInfo
- Publication number
- JPS5851361U JPS5851361U JP14557381U JP14557381U JPS5851361U JP S5851361 U JPS5851361 U JP S5851361U JP 14557381 U JP14557381 U JP 14557381U JP 14557381 U JP14557381 U JP 14557381U JP S5851361 U JPS5851361 U JP S5851361U
- Authority
- JP
- Japan
- Prior art keywords
- storage section
- address
- control circuit
- microcomputer control
- width
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図ａ〜ｇはウェイトステニドの状態を示すタイミン
グチャート、第２図は本考案の一実施例を示す要部ブロ
ック図である。図において１・・・・・・内部アドレス
バス、２・・・・・・ウェイトアドレス格納レジスタ、
３・・・・・・比較回路、４・・・・・・アドレス一致
信号、５・・・・・・ウェイト回数レジスタ、６′ ・
・・・・・リードサイクル・ライトサイクル延長回路、
７・・・・・・内部リード信号、８・・・・・・内部ラ
イト信号、９・・・・・・外部リード信号、１０・・・
・・・外部ライト信号である。FIGS. 1a to 1g are timing charts showing the state of weight stenosis, and FIG. 2 is a block diagram of main parts showing an embodiment of the present invention. In the figure, 1: internal address bus, 2: wait address storage register,
3... Comparison circuit, 4... Address match signal, 5... Wait number register, 6' ・
...read cycle/write cycle extension circuit,
7...Internal read signal, 8...Internal write signal, 9...External read signal, 10...
...This is an external write signal.
Claims (1)
、前記アドレスにリード信号あるいはライト信号の動作
区間の幅を設定するデータを記憶する第２の記憶部と、
前記第１の記憶部に記憶されているアドレス情報によっ
て指定されるアドレス空間トマイクロコンピュータによ
って指定されたアドレスとの一致を検出する比較回路と
、この比較回路が一致を検出したとき前記第２の記憶部
に設定されたデータによって前記リード信号あるいはラ
イト信号の動作区間の幅を可変せしめる区間延長回路と
を含むことを特徴とするマイクロコンピューク制御回路
。a first storage section that stores address information to be accessed; a second storage section that stores data that sets the width of an operation section of a read signal or a write signal in the address;
a comparison circuit for detecting a match between the address space specified by the address information stored in the first storage section and an address specified by the microcomputer; A microcomputer control circuit comprising: an interval extension circuit for varying the width of the operation interval of the read signal or write signal according to data set in a storage section.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14557381U JPS5851361U (en) | 1981-09-30 | 1981-09-30 | Microcomputer control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14557381U JPS5851361U (en) | 1981-09-30 | 1981-09-30 | Microcomputer control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5851361U true JPS5851361U (en) | 1983-04-07 |
Family
ID=29938500
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14557381U Pending JPS5851361U (en) | 1981-09-30 | 1981-09-30 | Microcomputer control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5851361U (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5429530A (en) * | 1977-08-10 | 1979-03-05 | Oki Electric Ind Co Ltd | Memory control system |
| JPS5528115A (en) * | 1978-08-15 | 1980-02-28 | Fujitsu Ltd | Control system for data processor using different memory areas in access time |
| JPS5617451A (en) * | 1979-07-20 | 1981-02-19 | Sharp Corp | Access controller for memory |
-
1981
- 1981-09-30 JP JP14557381U patent/JPS5851361U/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5429530A (en) * | 1977-08-10 | 1979-03-05 | Oki Electric Ind Co Ltd | Memory control system |
| JPS5528115A (en) * | 1978-08-15 | 1980-02-28 | Fujitsu Ltd | Control system for data processor using different memory areas in access time |
| JPS5617451A (en) * | 1979-07-20 | 1981-02-19 | Sharp Corp | Access controller for memory |
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