JPS58225747A - Digital signal transmitter - Google Patents

Abstract

PURPOSE:To prevent the value of an interpolation output from differing from a real value greatly because of abrupt level variation during the reproduction of a digital-audio signal, by using a received high-order symbol as the high-order symbol of interpolated data when the received symbol is correct. CONSTITUTION:A discriminating circuit 1 discriminates the OR output between pointers PA and PB; when this is at a low level (L), input data WA and WB are correct, so WA and WB are ouputted through a delay circuit 3 and a multiplexer 5. When the OR output is at a high level (H), a pointer PA regarding a high-order symbol WA is checked and when the PA is at the H, the W includes an error, so interpolated data WA' and WB' are outputted from an interpolating circuit 2. When the PA is at the L, the WA and WA' are compared with each other; when WA=WA', it is judged that the interpolated data are not different from real data greatly, and they are used as outputs WA' and WB'. When WA=WA', the WA and a low-order symbol b1 or b2 of specific size are outputted and selected by multiplexers 4 and 5.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital signal transmission device applied to, for example, reproduction of digital audio signals.

When audio signals are digitized, the number of quantization bits used is /1 bit or more, for example /6 bits in the compact disc system, from the viewpoint of S/N and dynamic range. With this compact disc method,
/sample/6-bit audio data is divided into upper symbols consisting of upper g-pits and lower symbols consisting of lower g-bits, and each g-bit symbol is processed for recording and playback. is being carried out.

In this way, since it is converted to a g-bit symbol,
Step 2 - Correction The hardware for encoding and decoding is simplified, the processing time required for encoding and decoding can be shortened, and EFM modulation that converts g bits to /4' bits can be used. In the compact disc system, a reproduction signal optically reproduced from a compact disc is subjected to EFM demodulation and then subjected to error correction processing.

For symbols that cannot be error corrected, mean value interpolation is performed using the preceding correct symbol.

When the cosine is consecutively uncorrectable, both pre-hold and mean value interpolation are used.

In the previously proposed compact disc system, the above-mentioned interpolation is performed when either the high-order symbol or the low-order symbol cannot be error corrected. However, if the higher-order symbol is correct and the lower-order symbol is error-correctable, it is not desirable to discard the higher-order symbol and use interpolated data. That is, when the level of the audio signal changes rapidly, such as the sound of a cymbal, there is a possibility that the interpolated data differs greatly from the true value.

The present invention solves these problems and makes it possible to generate data at a level closer to the original level than the interpolated data instead of data for which error correction is not possible.

An embodiment in which the present invention is applied to a compact disc system will be described below with reference to the drawings.

In FIG. 1, WA represents the upper symbol of the upper g bits, WB represents the lower symbol of the lower g bits, and PA and PB represent pointers associated with these symbols.

Upper single gill WA and WBN: Output from the error correction circuit, the pointer of a symbol with no error is at a low level (L), and the pointer of a symbol whose error cannot be corrected is at a high level (H). .

The symbols WA, W8 and pointers PA, PB are supplied to the determination circuit 1, and the symbols WA, WB are supplied to the interpolation circuit 2 and delay circuit 3 Z'L.

The interpolation circuit 2 performs average Tsukuda interpolation using the preceding and following symbols, and generates an interpolated output consisting of WA/ and wB-. This interpolation output is supplied to the multiplexer 4 via the delay circuit 3, and its higher-order symbol wA7· is supplied to the determination circuit 1.

It was. L-rank symbol wA and lower-order symbol of a predetermined value +
)1, the upper-order symbol wA, and the data consisting of the lower-order symbols b2 of a predetermined candy are supplied to the multiplexer 4 via the delay circuit 3.

This delay circuit 3 is for the purpose of delaying data by the time required for the determination operation in the determination circuit 1.

Any of the three pieces of data supplied to the multiplexer 4 is selected by the output of the determination circuit 1 and supplied to the multiplexer 5. The multiplexer 5 is supplied with input data WA and WB via the delay circuit 3, and one of the data is selected by the output of the determination circuit 1.

The judgment circuit 11d' is composed of a combinational circuit or a microprocessor, and performs the following operations.

First, the OR output of pointers PA and PB is determined. If it is I7, input data WA and WB are correct, and this input data is outputted via delay circuit 3 and multiplexer 5.

When the OR output of the pointer is H, the upper sympo/l-W
The pointer PA for A is examined. This pointer P
If A is H, the higher-order symbol WA cannot be used because it contains an error. Therefore,
Interpolated data WA', WB formed by the interpolation circuit 2
t is the delay circuit 3. The output is taken out via multiplexer 4 and multiplexer 5.

When the pointer PA is 17, a comparison is made between the high-order symbol WA of the input data and the high-order symbol WA〆 of the interpolated data. In the case of (WA-wA/), it is determined that the interpolated data is not significantly different from the real data, and this interpolated data wA'? WB' is used for output and 12.

In the case of (WA≠WA/), the sizes of both are compared. When (WA<WA/), the upper symbol WA of this input data and the lower symbol b of a predetermined size are selected by the multiplexer 4 and the multiplexer 5. This will be explained in detail with reference to FIG.

Figure 2 shows three consecutive input data Wn-, , WnW.
A case is shown in which the lower symbol of Wn among n+1 is an error, the data before and after are correct, and these levels are 300 and /100 in /θ base representation.

The t bits of the upper and lower symbols are respectively (7~
72g) expressed in hexadecimal, the level of 3θ0 is (
WA=/) (means the level of the left side), (WB-1
1/I-). Similarly, the level of //θ0 is (WA
-1I) (means a level of 10,211t), (W
B = 74).

Furthermore, the true level of data Wn is, for example, SO2 (w
A-7, WB-, 2"% 11). In the interpolation circuit 2, interpolated data (WAl-2) (WB'-/gg) with an average value of 70θ of input data wn-+ and wn+1 is formed. .In addition, the correct higher-order symbol of the input data Wn is
Since (WA-/), (WA<WAl).

In this case, the positive j7 upper symbols (WA −/ )
and a predetermined value of lower single 4 guru b1 are selected. This is this.

Finally, the range on the high level side, for example, C/:1g<bl≦
- those included in the range of (5S), - for example (bl=,
25.5-). In the above case, finally, (
WA= / ) (bl=,25!; ) (i.e. 5
The data at level ) is used as output. This level υ is closer to the true level SOO than the interpolated data level 70θ.

In the case of (WAl to WA), when (WA>WAl), the correct upper symbol of the input data is selected by the multiplexer 4 and the multiplexer 5, and the lower symbol b2 of a predetermined size is selected.

To explain the specific details with reference to FIG. 3, as in the case of FIG. -3) is correct. Also, the true level of Wn is gOθ(WA
=3. wB=3j). In interpolation circuit 2, (W
,,=300)(Wn+/100), so 70
Interpolated data of level 0 is formed.

Therefore, ('WA>WA L). As the lower symbol b2, the range on the lower level side (for example, CO<1)
x72g> - For example, (b2
2θ). In this case, the data output from the multiplexer 5 has a level of (wA=3) (bz=0) (that is, 76g).This level is closer to the real level than the level 700 of the interpolated data. be.

As can be understood from the description of the above-mentioned embodiment, according to the present invention, since there is a sudden level change such as the sound of a cymbal, the value of the interpolated output is different from the true value (white). It is possible to prevent a large difference.

It should be noted that the present invention can be applied to the case where the interpolation method is not only the average value interpolation, but also the interpolation method. Furthermore, similar effects can be obtained by applying the present invention to the transmission of digital information signals other than digital audio signals.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.
FIGS. 2 and 3 are route maps used to explain the operation of an embodiment of the present invention. 1......Judgment circuit, 2...
...Interpolation circuit, 4, 5-1. −−−−−−−−
--J Ruteplexa. Agent Masato Sugiura

Claims (1)

[Claims] The sample data of a digital information signal is separated into a high-order symbol consisting of a plurality of upper bits and a lower-order symbol consisting of a plurality of lower bits, and an error-detectable encoding process is performed for each of the upper symbols and lower symbols. On the receiving side, if the higher-order symbol or lower-order symbol contains an error, the error symbol is received by a digital signal transmission device that interpolates the error symbol using the correct symbol before or after it. A digital signal transmission device characterized in that, when the higher-order symbol is correct, the correct upper-order symbol is used as the upper-order symbol of interpolated data.