JPS58218251A - Spectrum spread receiver - Google Patents

Abstract

PURPOSE:To set a threshold level voltage to an optimum value even after synchronous supplement and to increase the probability of the synchronous detection of a desired wave, by controlling automatically the threshold level voltage to the optimum value in a synchronism searching process. CONSTITUTION:A received signal Vi is applied to a correlator 1 and multiplied by a local reference signal from a code generator 6 and the product is supplied through an IF stage 2 to a demodulator 3 to be demodulated. The output of the demodulator 3 is applied to a synchronous detector 4; and a switch 12 is turned on when a code is searched for and a threshold level control circuit 11 is operated by the output signal of a comparator 7 to control a threshold level setter 9. The switch 12 is turned off by a signal generated when a synchronism deciding circuit 10 detects a desired received signal to control automatically the threshold level voltage to the optimum value while holding the level voltage even after synchronous supplement, improving the probability of the synchronous detection of the desired wave.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a spread spectrum receiver, and more specifically, to a structure of a synchronization circuit of a receiver in a spread spectrum communication system.

The spread spectrum communication method transmits a pseudo wave that is i-keyed with the information signal to be transmitted and a pseudo noise code, and the receiving side uses the same code (local part 1) 1 reference code) as the pseudo noise code mentioned above. Synchronizing the code of the modulated wave with the local reference code □Therefore, in a communication method for receiving the above information signal, ζThe spectrum of the transmission signal is spread by the pseudo noise code, resulting in low power density transmission, and It has the advantage of being less susceptible to noise, making it ideal for mobile communications,
It is being considered for use in navigation, radar and measurement, satellite communications, etc.

In spread spectrum communication systems, as mentioned above, it is important to synchronize the pseudo-noise code of the received wave with the local reference code of the receiving device. If it is not maintained, communication will be impossible.

Therefore, the spread spectrum receiver requires a synchronization circuit, that is, a search circuit and a tracking circuit for searching for codes. These search and tracking operations are performed as follows.

After the received signal is converted into an intermediate frequency signal, the local reference code and the received signal are multiplied by a correlator (i.e., inversely modulated and spread modulated), and then applied to a demodulator. However, in the search process, the local reference code is caused to perform an 11:IC phase slip on the received signal.Phase:
・:1.1・.

Even if one received signal is a desired wave or an undesired wave, the output from the equipment is pseudo noise and the demodulated output level is low as long as synchronization cannot be achieved. A large correlation output is obtained when the timing difference between the received signal and the local reference code is within 1/2 chip length. The synchronization detection circuit compares the above demodulated output with a threshold level that determines whether to stop the search or continue the search, and if the threshold level is not exceeded, the search is continued, and if it is exceeded, the search is stopped and the tracking operation is started. Start. That is, the phase slip of the local reference code is stopped, the timing difference is detected more finely, and the clock generator (VCOl or V
Tracking control is performed to reduce the timing difference to zero by controlling the CXO.

In such a synchronous circuit, what is important is to increase the probability of detecting a desired wave if it exists, and to reduce the probability of erroneously detecting an undesired wave.

The following methods are conventionally known to meet such demands. The first method is to keep the output signal of the intermediate frequency amplification stage constant by feeding back the output of the intermediate frequency amplification stage provided between the correlator and the demodulation circuit to the amplifier of the intermediate frequency amplification stage. The second method is to separately install a correlator that obtains a correlation output between a code source different from the pseudo-noise code of the desired signal and the received signal, and detect the amount of noise by despreading. This is a method of controlling the threshold level so that the level of the desired signal when synchronized with the level of the noise can be accurately distinguished. However, the first method has the disadvantage of manually controlling the threshold level, and the second method uses a code generator, correlator, intermediate frequency stage, demodulator, etc. in addition to the original synchronous circuit. There is a drawback that an extra amount must be provided.

Therefore, an object of the present invention is to realize a spread spectrum receiving apparatus in which a synchronization circuit with a high probability of synchronously detecting a desired wave and a low probability of erroneously detecting an undesired wave is implemented using a simple circuit.

In order to achieve the above object, the present invention includes a circuit that automatically controls the synchronization detection circuit of a spread spectrum receiver so that the threshold level of synchronization detection always exceeds the amount of noise. It was constructed using

In the present invention, an extra correlator is used in addition to the original synchronization circuit.

Detects the noise level without providing a code generator,
Since the threshold level of the synchronization detection circuit can be automatically controlled according to the m volume, desired waves can be reliably detected with a low-cost and small-sized device, and erroneous detection of undesired waves can be reduced.

Hereinafter, the present invention will be explained in detail with reference to Examples.

FIG. 1 is a diagram showing the configuration of an embodiment of a spectrum wave number receiving device using a direct sequence method according to the present invention. In the figure, a block 4 indicated by a broken line is a synchronization detection circuit that constitutes the essential part of the present invention. The received signal Vt is multiplied by a code generator 6, . Correlation-
The output of this signal passes through an intermediate frequency stage (comprised of a bandpass filter 11 and a barrel width filter) 2 and then enters a demodulator 3) where it is demodulated. These parts are the same as the conventionally known device as shown in FIG. The synchronization detection circuit 4 detects from a part of the signal of the demodulator,
The synchronization state is checked, and a signal Vt is generated to stop or continue searching the synchronization circuit depending on whether the signal from the demodulator exceeds a threshold level.

During non-synchronization, that is, during code search before synchronization acquisition, the output of the correlator 1 is in a state of pseudo noise containing desired waves, undesired waves, and other deviations, so the input of the synchronization detection circuit 4 is output from circuit 4, v
t serves as a search continuation signal, causing the clock generation circuit 5 and the code generation circuit to operate so that the local reference code slips in phase with respect to the received signal Vz.

In the synchronized state, that is, when the timing difference between the received signal and the local reference code is within 1/2 chip length, the input level of the synchronization detection circuit 4 becomes high, and by exceeding the threshold level, the output Vt from the circuit 4 is searched. This becomes the ji signal to stop and start tracking operation. - The configuration and operation of the synchronization detection circuit 4 are as follows.

When searching for a code, the switch 12 is turned on, and the threshold level control circuit 1 is activated by the output signal of the comparator 7 to control the threshold level setter 9. When the synchronization determination circuit IO generates a signal Vtk% indicating that the desired received signal has been detected, the switch 12
It is configured to turn off. 8 is a voltage setting device for optimally setting the No. 16 detection probability and synchronization error rate. In this case, it may be adjusted manually, or it may be automatically controlled by a signal from the AGC circuit. Good too. The voltage value (bias voltage) ΔV of this voltage setting device 8, id
(Optimal negative register hold level voltage V, .) - (Demodulator output/voltage at the time of search v1.) may be selected. With the above configuration, the amount of noise can be detected in the code search process and the threshold level can be automatically controlled, increasing the probability of synchronized detection of desired waves and erroneously detecting undesired waves. This makes it possible to lower the probability of

FIG. 2 shows in detail the demodulator 3 of the embodiment shown in FIG. 1, and in the figure, the same numbers as in FIG. 1 have the same circuit configurations. Also, the feedback loop to the synchronization tracking section in FIG. 1 is omitted.

The received signal vI is multiplied by a local reference code 6 in a correlator l, passes through an intermediate frequency stage 2, and then passes through two phase comparators 13.13.
' is input. Then, it is compared with the reproduced carrier wave signal outputted from the voltage controlled oscillator 22 and a signal phase-shifted by 90° by the 90° phase shifter 23. The output of the comparator is sent to the integrator circuit 14.
．． 14', and are integrated up to the final code of the local reference code length. Each integral output is an absolute value circuit 15
15', and the orthogonal component outputs are added in a summation circuit 16. The output ■□ passes through the synchronization detection circuit 4 and outputs a signal Vt indicating whether to stop or continue the search, and when the search is to be stopped, the switch 21 is switched from terminal B to A. On the other hand, the output of the integrating circuit 14 is also input to the discriminator 17, and baseband information V summer is obtained in the synchronization acquisition state. The output of the integrating circuit 14' is also connected to the sample hold circuit 18.
When entering the knee, the section from the code ten or so bits before the final code of the local standard code length to about one bit before is sampled and held, and the information signal V! The signal is inputted to a loop filter 20 through a sign-inverting amplifier 19 controlled by . The configuration is such that the voltage controlled oscillator 22 is controlled during synchronization acquisition.

FIG. 3 is a circuit diagram of an embodiment of the synchronization detection circuit 4 in the above embodiment. During the code search, a signal (Vl, +ΔV, ) is applied to the positive input terminal of the comparator 27, and an initial threshold level voltage V is applied to the negative input terminal for comparison. Here the initial threshold level′
The directness of the tortoise pressure V is important, and if a potentiometer 24 (with an endless rotating shaft) is used to adjust this directness, the position of the potentiometer is initially set to the H side. That is, as shown in Figures 4 and 5, ■
, is set high on the negative side. (2) must be set higher than the ridge pressure during the search. It takes too much time to do this, so the -' of the receiver is
It can be determined according to the required performance. In addition, Figures 4 and 5
In the figure, when 几=0Ω, ■ is -1 to -2, several V (Rt
However, the absolute value of 1 is the difference between the noise voltage generated inside the receiver itself and the voltage of atmospheric noise entering the receiver from the antenna. If IV, l becomes less than the above value, the synchronization detection circuit will cause a synchronization error, so it is set so that it will not become less than the above value even if the shaft of the potentiometer is rotated. For example, if Ω = 75, -5,4v → -1,1v → - for the rotation of the potentiometer.
5,4v→-1,IV... It changes in a clean manner. The value of Rt is determined by the environmental conditions in which the receiver is used, for example, when the receiver is used in an area with a lot of noise, Rt1 is made large, and conversely, when it is used in an area with a lot of noise, it is made small. In this way, by initially setting -■ to a large value and controlling it so that it gradually decreases, synchronization errors will not occur due to noise. At the initial stage, 1V,1 is slightly higher than Vma+Δ■, so the output of the comparator 27 is 01,i.

It is compared with the reference voltage Vr@f of the control line 11, and V is generated in the control circuit 11otb''S, the DC motor 25 is driven and the potentiometer 24 is moved to the L side. That is, , the threshold level voltage value 1v, 1 is lowered.Then, the desired wave signal becomes 1
When V, exceeds 1, a TTL level output is generated at the output of the comparator 27, a logic circuit such as a flip-flop is activated, and Vt becomes high level (4.5 to 5 V). 26
is a synchronization judgment circuit consisting of an up/down counter,
When vf becomes high level twice or more, Vt becomes high level, υ, and switch 12 (CMOS analog switch) is turned off. When switch 12 is turned off, DC motor 2
5 is stopped, the value of V is fixed, and this becomes the threshold level voltage. In addition, in the timing determination circuit 10,
In S, only the last code of the local standard code length is high level (TT
This is a set pulse that is set to the L level. The switch 29 is a manual switch and is turned on when the receiver is turned on, the potentiometer 24 is set to a desired position, and the search stage is entered. R1 is a feedback resistance of the error voltage amplifier 28 (l), and if it is desired to shorten the search time, it may be set to a large value.

In the above embodiment, the threshold level voltage is gradually lowered from a high value and the threshold level voltage value is fixed at the stage when synchronization acquisition is performed, so that the synchronization that erroneously detects an undesired wave. The error rate can be kept low. If it is desired to further increase the signal detection probability in this state, the value of Δ■ may be lowered as described above.

In FIGS. 1 and 3, a voltage setter ΔV is provided at the input terminal of the synchronization detection circuit during code search to optimally set the signal detection probability and the synchronization error rate.

is applied, and it is set open at the time of synchronization acquisition, but if it is desired to increase the signal detection probability, the value of IV may be 0.

FIG. 6 shows another embodiment of the present invention, in which the input signal i to the receiver is detected by a detector 100' in front of the correlator 1, and an amplifier 40 (RF amplifier for amplifying the receiving frequency band) , or a frequency-converted intermediate frequency amplifier.

) is fed back to apply AGC. According to this method, the signal entering the correlator 1 is controlled by the AGC regardless of the propagation state, so once the threshold hold level is determined at 4', extremely stable synchronization detection can be realized.

FIG. 7 is a diagram showing the configuration of another embodiment of the spread spectrum receiving device according to the present invention. In this embodiment, the amount of noise at the time of search is detected using the detection method conveniently used in the phase-locked loop of the receiving device. The detection signal is detected by a circuit, and the threshold level of the synchronization detection circuit is automatically controlled based on the detection signal. That is, this was done by focusing on the fact that there is a proportional relationship between the amount of noise entering the synchronization detection circuit and the amount of noise manually entering the detection circuit of the phase-locked loop.

In the figure, parts given the same numbers as in the previous embodiment are parts having the same circuit functions.

Although the present invention has been described above with reference to embodiments, the present invention is not limited to the embodiments. For example, 1,...'1 In the embodiments shown in FIGS. A voltage setting device ΔV for optimally setting the signal probability and synchronization error rate was applied to the input terminal, and it was cut off during synchronization, but if you want to increase the signal detection probability, ΔV , may be set to 0.

Alternatively, an amplifier and a detector may be provided in front of the correlator 1, and an AGC may be provided to control the gain of the amplifier based on the detected output.

In this way, the input signal of the correlator becomes almost constant regardless of the propagation state, so that once the threshold hold level is set in the synchronization detection circuit, stable synchronization detection can be performed.

As explained above, the received signal VI is passed through the correlator l.

1' is input. In the correlator 1, the local reference code PNP of the same code sequence as that on the transmitting side generated from the local reference code generator 6 is multiplied by Vt, and the signal va is sent to the comparator 7 through the intermediate frequency stage 2 and the demodulator 3. is input.

Then, it is compared with the threshold level 'tortoise pressure V', and the synchronization determination circuit 10 performs synchronization determination. If the result of the synchronization determination is that they are synchronized...1 degree, that is, vl is higher than V, the search is stopped and the process shifts to tracking need. Vms.

V, the search continues with the timing of the local reference symbol shifted. On the other hand, in correlator 1', both the PNP and the local reference code are 1/2 pit advanced and 1
A code PNE configured to alternately switch and send local reference codes delayed by /2 bits in synchronization with the reference code.
L and input signal V+ are multiplied together. The output signal is passed through an intermediate frequency stage 2' to an AM (amplitude modulation) detector 3.
It is input to 0. The output of the AM detector 30 is input to two sampling and holding circuits 32 and 32' through a circuit 31 consisting of an integrator and an amplifier, respectively. The output of the sampling hold circuit 32°32' is sent to the adder 33.
The output of the adder 33 is input to the loop filter 34.

Signals ■ and L are trigger signals for the sampling and holding circuit, and when the PNEL input to the correlator 1' is a code that is 1/2 bit ahead of PNP, the easy sampling and holding circuit 32 is activated, and conversely, the PNEL is activated. But PNP is also 1
In the case of a code delayed by /2 bits, the sampling and holding circuit 32' is configured to operate. and,
In the search mode, the switch 35 is on the B side, that is, grounded, and when the transition to the tracking mode occurs, the switch 35 is operated by the output signal of the synchronization determination circuit 10, and the switch is switched from B to A, and the synchronization tracking loop system is activated. The output of adder 33 is fed back to clock generator 5 via VCO 36 and clock tracking logic circuit 37. In the circuit configuration as described above, automatic threshold level control in this embodiment is performed as follows.

First, the output signal Va of the AM detector 30 is proportional to Vsm, and Va = V-, /k...
... (1) Here, we found k: jin, which has a relationship like a constant of proportionality. Therefore, this output signal V- is fed back to the threshold level voltage setter 9 through the controller 38 and the threshold level 8 generator 11.

Here, the block 39 is a voltage setting device for determining that the synchronization determination circuit 10 is synchronized with an optimal signal detection probability,
The value ΔLl is (optimal threshold level value Vo
) (Noise value V input to comparator 7 during search,
) - (input voltage ΔV required to operate comparator 7
, 2). Then, in the synchronization detection circuit, when V+ts exceeds Vts+Δv,l, a TTL level output is generated in the output of the comparator 7, and the synchronization determination circuit 10 determines that synchronization is achieved, and the search is stopped. . Next, control circuit 3
8. A specific circuit of the operating section 11 and the threshold level setting device 9 is shown in FIG. Since the output V- of the AM detector 11 is proportional to the output VM a of the demodulator 3, 40 is V
a=■1. This is an amplifier to make the following. At the time of search, Vms is Vfs, so Va=V□ (#), and Va is input to point P through the buffer circuit 41. At point P, ΔV is applied from the voltage setting device 10.

When and the initial threshold level voltage value V are added, and (2) is not equal to (V a + ΔVt), a voltage is generated at point Q, and the motor 9 is driven.

Potentiometer 9. ' by changing the resistance of V.

'11... = (V a + ΔVt) up to 11 Vs are controlled.

Even if Vt increases or decreases in a state where ■ is controlled to a desired value, synchronization acquisition is completed, and communication is being performed, V is controlled by the ■ - times signal, so the thread The hold level voltage can always be set to the optimum value.

According to the present invention, the threshold level voltage value can be automatically controlled to the optimum value during the synchronization search process, and even after synchronization acquisition, the threshold level voltage value is always adjusted according to the received signal level. It can be automatically controlled to the optimum value. As a result, it is possible to increase the probability of synchronous detection of desired waves and to reduce the probability of erroneously detecting undesired waves.

[Brief explanation of the drawing]

FIG. 1, FIG. 2, FIG. 6, and FIG. 7 are all diagrams showing the configuration of an embodiment of a spread spectrum receiver according to the present invention,
3 is a circuit diagram of an embodiment of the synchronization detection circuit in FIG. 1I and FIG. 2 above, FIG. 4 is a circuit diagram of a potentiometer 1J used in the circuit in FIG. A characteristic diagram for explaining the operation of FIG.
Figure 9 shows the input/output characteristics of the 4th synchronous circuit in Figure 7.
Figure 5 Figure 3 Figure Uketokan η

Claims (1)

[Claims] 1. A carrier wave modulated with a pseudo-noise code and an information signal is used as an input signal, and a local reference code having the same code as the pseudo-noise code is synchronized with the pseudo-noise code of the input signal. In a spread spectrum receiver that selects a desired wave and demodulates the information signal, the synchronization circuit that performs synchronization maintains a synchronized state when the four-period test circuit that detects synchronization and the synchronization detection circuit detect synchronization. and a synchronization tracking circuit, and the synchronization detection circuit includes a threshold level setting circuit that varies depending on a noise signal during code search before synchronization acquisition, and a circuit that compares the threshold level with the demodulated signal. A spread spectrum receiving device characterized by: 2. In the spread spectrum receiver according to claim 1, the threshold level setting circuit comprises:
1. A spread spectrum receiver comprising a circuit that forms a feedback loop that changes depending on the output signal of a synchronization detection circuit, and opens the feedback loop when synchronization is acquired. '3. In the spread spectrum receiver according to claim 2, the threshold level setting circuit applies a DC bias as a threshold level during code search, and disconnects the DC bias during synchronization acquisition. A spread spectrum receiving device characterized in that: 4. The spread spectrum receiver according to claim 1, wherein the circuit for extracting the noise signal is configured to extract the noise signal from a detector in the synchronization tracking circuit. Receiving device. 5. In the spread spectrum receiver according to claim 4, the threshold level setting circuit feeds back to the threshold level control section of the synchronization detection circuit through the control circuit when searching for the output code of the detector. 1. A spread spectrum receiver comprising: a feedback loop; and a circuit that opens the feedback loop during synchronization supplementation.