JPS5839137A - Synchronous detection system - Google Patents

Synchronous detection system

Info

Publication number
JPS5839137A
JPS5839137A JP56136855A JP13685581A JPS5839137A JP S5839137 A JPS5839137 A JP S5839137A JP 56136855 A JP56136855 A JP 56136855A JP 13685581 A JP13685581 A JP 13685581A JP S5839137 A JPS5839137 A JP S5839137A
Authority
JP
Japan
Prior art keywords
circuit
signal
noise
output
band
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56136855A
Other languages
Japanese (ja)
Other versions
JPH0255978B2 (en
Inventor
Tetsuaki Nakanishi
徹明 中西
Michio Sasaki
佐々木 実知夫
Eiichiro Murata
栄一郎 村田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP56136855A priority Critical patent/JPS5839137A/en
Publication of JPS5839137A publication Critical patent/JPS5839137A/en
Publication of JPH0255978B2 publication Critical patent/JPH0255978B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J13/00Code division multiplex systems

Abstract

PURPOSE:To apply the radio machine of a band diffusing communication system to a mobile radio, by taking out noise components of the output of a frequency discriminating circuit to detect synchronism and detecting the AGC level with the input of a tau dither detecting circuit. CONSTITUTION:When the synchronism between codes in the transmission side and the receiving side is established, the output of a frequency discriminating circuit 21 is almost noise components because the signal passing through amplifying circuits 12 and 20 has only noise components almost. Consequently, a signal obtained by amplifying the frequency band at the outside of the sound frequency band in a noise amplifying circuit 26 has a characteristic approximately equal to that for no signal, and the noise is detected in a noise detecting circuit 27 and is applied to a comparing circuit 28. A clock generating circuit 14 adds (or eliminates) clocks in accordance with the output of the comparing circuit 28 to change gradually the phase of the code in the receiving side. Thus, the range of the input voltage which can be controlled by an automatic gain adjusting circuit 25 corresponds to the gain of amplifying circuits 3, 4, 10, and 12, and a wide dynamic range is obtained in comparison with gain components before a mixing circuit for mixing a local oscillation band diffusing signal.

Description

【発明の詳細な説明】 本発明は帯域拡散通信方式無線機等に用いる同期検出方
式に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a synchronization detection method used in spread band communication radio equipment and the like.

従来のこの種の同期検出方式について説明する。A conventional synchronization detection method of this type will be explained.

第1図は、同期検出に、包絡性検波方式を用いた帯域拡
散変調方式受信機を示すもので、空中線1から入力する
帯域拡散変調信号は、帯域沖波回路2で帯域制限を受け
、増幅回路3で増幅された後、混合回路4で局部発振回
路6の出力と混合さ1する。
Fig. 1 shows a spread band modulation receiver that uses an envelope detection method for synchronization detection.The spread band modulation signal input from the antenna 1 is band-limited by the band offshore circuit 2, and then is passed through the amplifier circuit. After being amplified by 3, it is mixed with the output of the local oscillation circuit 6 by a mixing circuit 4.

この信号は増幅回路6と帯域沖波回路7により第1中間
周波数に変換される。この第1中間周波数の信号は混合
回路9により、平衡変調回路16の出力信号と混合され
る。なおその局部発振平衝変調信号は、クロック発生回
路14によシ符号発生回路16が駆動されて、特定の擬
似雑音符号列(以下PN符号と表わす)が作られ、この
信号を局部発振回路17の出力信号に平衡変調回路16
により、平衝変調を施す事により発生されている・混合
回路9は一種の相関器の機能を持っている。
This signal is converted to a first intermediate frequency by an amplifier circuit 6 and a band Okinawa circuit 7. This first intermediate frequency signal is mixed with the output signal of the balanced modulation circuit 16 by the mixing circuit 9. The local oscillation balanced modulation signal is driven by the clock generation circuit 14 to the code generation circuit 16 to generate a specific pseudo-noise code string (hereinafter referred to as PN code), and this signal is sent to the local oscillation circuit 17. A balanced modulation circuit 16 is applied to the output signal of
The mixing circuit 9, which is generated by applying equilibrium modulation, has the function of a kind of correlator.

すなわち、送信側のPN符号と受信側のPN符号の同期
が確立していない場合には、増幅回路10の帯域制限回
路11及び増幅回路12を経た出力信号は、雑音に埋も
れているため、包路線検波回路18では信号が検出され
ず、比較回路19では、非同期信号を出力する。これに
よりクロック発生回路14は符号発生回路15から出力
されるPN符号の位相をずらすよう、クロックの追加(
或いは除去)を行なう。こうして、同期が確立しない場
合は順次PN符号の位相が変化する。
In other words, if the synchronization between the PN code on the transmitting side and the PN code on the receiving side is not established, the output signal that has passed through the band limiting circuit 11 and the amplifying circuit 12 of the amplifier circuit 10 is buried in noise and is therefore not enveloped. The line detection circuit 18 does not detect any signal, and the comparison circuit 19 outputs an asynchronous signal. As a result, the clock generation circuit 14 adds a clock (
or removal). In this way, if synchronization is not established, the phase of the PN code changes sequentially.

次に送信側のPN符号と受信側のPN符号の同期がとれ
た場合は、包絡線検波回路18の出力に検波信号が現れ
、比較回路19を駆動して、クロック発生回路14のク
ロックの追加(或いは除去)動作を停止するよう制御信
号を発生する。一度同期が確立した以後は、タウ・ディ
ザクロック追跡を行ない、増幅回路12の出力に増幅変
調信号が現れるが、これをタウディザ検出回路13にて
、送信及び受信のクロックの位相差情報を検出して、ク
ロック発生回路14のクロック信号を制御することによ
シ同期状態が維持される。
Next, when the PN code on the transmitting side and the PN code on the receiving side are synchronized, a detection signal appears at the output of the envelope detection circuit 18, drives the comparison circuit 19, and adds the clock to the clock generation circuit 14. (or removal) Generates a control signal to stop the operation. Once synchronization is established, tau dither clock tracking is performed, and an amplified modulation signal appears at the output of the amplifier circuit 12. This is detected by the tau dither detection circuit 13, which detects phase difference information between the transmitting and receiving clocks. The synchronized state is maintained by controlling the clock signal of the clock generation circuit 14.

このようにして同期状態に入ると、増幅回路12の出力
には常に第2中間周波数の変調信号が現れるため、これ
を増幅回路20で振幅制限をかけ、周波数弁別回路21
で復調した後増幅回路22を通すと、スピーカ23に復
調信号が出方される。
When the synchronization state is entered in this way, the modulation signal of the second intermediate frequency always appears at the output of the amplifier circuit 12. Therefore, the amplitude of this signal is limited by the amplifier circuit 20, and the frequency discrimination circuit 21
After demodulating the signal, the signal is passed through the amplifier circuit 22 and a demodulated signal is output to the speaker 23.

今、同期保持を行なうためには、タウディザ検出回路1
3では、常に振幅変調信号が検出されねばならず、また
包絡線検波回路18の検波特性から自動利得調整回路8
を混合回路9の直前に挿入し、増幅回路3,6の利得調
整を行なう必要がある。
Now, in order to maintain synchronization, the tau dither detection circuit 1
3, the amplitude modulation signal must always be detected, and based on the detection characteristics of the envelope detection circuit 18, the automatic gain adjustment circuit 8
It is necessary to insert the amplifier circuit immediately before the mixing circuit 9 and adjust the gains of the amplifier circuits 3 and 6.

なお増幅回路12の出力を取って各増幅回路3゜6.1
0.12にAGCをかけた場合は包絡線検波回路18の
出力において、送信側と受信側のPN符号の同期がとれ
た場合ととれない場合のレベル差が現れなくなるだめ同
期検出が行なわれない。
Note that the output of the amplifier circuit 12 is taken and each amplifier circuit 3゜6.1
When AGC is applied to 0.12, the output of the envelope detection circuit 18 no longer shows a level difference between when the PN codes on the transmitting and receiving sides are synchronized and when they are not synchronized, so synchronization detection is not performed. .

従って、自動利得調整回路8により制御できる入力電圧
範囲は、増幅回路3,7の利得分のみとなり、この回路
方式では電界変動の激しい移動無線への適用が難しくな
る。
Therefore, the input voltage range that can be controlled by the automatic gain adjustment circuit 8 is limited to the gain of the amplifier circuits 3 and 7, making it difficult to apply this circuit system to mobile radio where electric field fluctuations are severe.

まだ増幅回路3.6の利得を大きくすると、他の変調方
式例えば、帯域拡散を施さない周波数変調方式との兼用
が利得配分による特性変化などの点から困難になるなど
の問題があった。
However, if the gain of the amplifier circuit 3.6 is increased, there is a problem that it becomes difficult to use it in combination with other modulation methods, such as frequency modulation methods that do not apply band spreading, because of changes in characteristics due to gain distribution.

本発明はこれらの欠点を除去し、たとえば陸上移動無線
等への帯域拡散変調方式の適用を可能ならしめるもので
ある。
The present invention eliminates these drawbacks and makes it possible to apply the spread band modulation method to, for example, land mobile radio.

以下にその実施例と共に説明する。第2図は本発明を適
用した帯域拡散変調方式無線機の一実施例である。同図
において第1図と対応する部分には同符号を付している
This will be explained below along with examples. FIG. 2 shows an embodiment of a spread band modulation radio device to which the present invention is applied. In this figure, parts corresponding to those in FIG. 1 are designated by the same reference numerals.

26は自動利得調整回路で、その出方は増幅回路3.6
,10.12へ制御信号として加えられている。26は
音声周波数帯域外の信号を増幅する雑音増幅回路、27
はその信号を検波する雑音検波回路、28は所定のレベ
ルと検波出力を比較する比較回路で、クロック発生回路
を制御する。
26 is an automatic gain adjustment circuit, and its output is the amplifier circuit 3.6
, 10.12 as a control signal. 26 is a noise amplification circuit that amplifies signals outside the audio frequency band; 27
28 is a noise detection circuit that detects the signal, and 28 is a comparison circuit that compares the detected output with a predetermined level, which controls the clock generation circuit.

次にこの実施例の動作について説明する。第1図と同様
の構成を有する部分はその受信機と同様な動作を行なう
Next, the operation of this embodiment will be explained. The parts having the same configuration as in FIG. 1 perform the same operation as the receiver.

今、送信側と受信側の符号の同期が確立していない場合
は、増幅回路12及び増幅回路2oを通る信号はほとん
ど雑音成分しか持たないだめ、周波数弁別回路21の出
力は、はとんど雑音成分となっている。従って雑音増幅
回路26で、音声周波数帯域外の周波数帯域を増幅して
得られる信号は、はぼ無信号時と同様の特性を持ち、雑
音検波回路27からは雑音が検波されて、比較回路28
に加えられる。この比較回路28は、非同期信号を出力
し、クロック発生回路14に供給する。比較回路28の
出力に応じてクロック発生回路14ではクロックの追加
(或いは除去)を行ない、受信側の符号の位相を徐々に
変化させる。送信側と受信側の同期がとれた状龍では、
増幅回路12に第2中間周波数成分が現れるだめ、周波
数弁別回路21の出力信号には、変調された音声信号が
復調されると同時に、雑音は、抑圧を受けるため、雑音
増幅回路26及び雑音検出回路27の雑音検波出力は低
下する。このとき、比較回路28は、同期検出信号を出
力するため、クロック発生回路14でのクロックの追加
(或いは除去)動作は停止する。
Now, if synchronization of codes on the transmitting side and the receiving side is not established, the signals passing through the amplifier circuit 12 and the amplifier circuit 2o will have almost no noise components, and the output of the frequency discrimination circuit 21 will be It is a noise component. Therefore, the signal obtained by amplifying the frequency band outside the audio frequency band in the noise amplification circuit 26 has characteristics similar to those in the case of no signal, and the noise is detected by the noise detection circuit 27 and the signal obtained by the comparison circuit 28
added to. This comparison circuit 28 outputs an asynchronous signal and supplies it to the clock generation circuit 14. The clock generation circuit 14 adds (or removes) a clock according to the output of the comparison circuit 28, and gradually changes the phase of the code on the receiving side. In a state where the sending and receiving sides are synchronized,
Since the second intermediate frequency component appears in the amplifier circuit 12, the modulated audio signal is demodulated in the output signal of the frequency discrimination circuit 21, and the noise is suppressed at the same time. The noise detection output of the circuit 27 decreases. At this time, since the comparator circuit 28 outputs a synchronization detection signal, the clock addition (or removal) operation in the clock generation circuit 14 is stopped.

なお同期の保持動作、復調出力動作については第1図の
場合と同様である。
Note that the synchronization holding operation and demodulation output operation are the same as in the case of FIG.

この実施例によれば、自動利得調整回路にて制御できる
入力電圧範囲は、増幅回路3.4,10゜12の利得分
となり、第1図の局部発振帯域拡散信号との混合回路以
前の利得分に比べて大きな、ダイナミック・レンジを得
ることができる。またこの実施例は従来の周波数変調方
式と、はぼ同様の回路構成をとるだめ、変調方式を簡単
な切換回路等で切換て、兼用できる等の利点があり帯域
拡散通信運用の際の簡単な連絡回線として、周波数変調
方式を用いることも可能である。
According to this embodiment, the input voltage range that can be controlled by the automatic gain adjustment circuit is the gain of the amplifier circuit 3.4, 10°12, and the gain before the mixing circuit with the local oscillation band spread signal shown in FIG. A relatively large dynamic range can be obtained. In addition, this embodiment has the advantage that it has the same circuit configuration as the conventional frequency modulation method, and can be used in common by switching the modulation method with a simple switching circuit. It is also possible to use a frequency modulation method as the communication line.

なお、上記実施例では直接拡散方式の帯域拡散方式無線
機について述べているが、同様に周波数ホッピング、時
間ホッピング等の他の帯域拡散方式についても容易に適
用できるものである。
Although the above embodiment describes a spread band radio device using a direct sequence method, it can be easily applied to other spread band methods such as frequency hopping and time hopping.

以上の説明から明らかなように、本発明によれば同期の
検出を周波数弁別回路出力の雑音成分を取す出して行な
っているため、受信機のAGCレベル検出をタウ・ディ
ザ検出回路の入力で行なうことが可能となり、受信入力
信号のダイナミックレンジを拡大することから帯域拡散
通信方式無線機の移動無線への適用を可能にする等の利
点を持っている。
As is clear from the above explanation, according to the present invention, synchronization is detected by extracting the noise component of the output of the frequency discriminator circuit, so the AGC level detection of the receiver is performed by using the input of the tau/dither detection circuit. This has advantages such as expanding the dynamic range of the received input signal, making it possible to apply spread band communication type radio equipment to mobile radios.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の受信機のブロック図、第2図は本発明に
よる同期検出方式−を適用した受信機のブロック図であ
る。 1・・・・・・空中線、21・・・・・・周波数弁別回
路、26・・・・・・雑音増幅回路、27・・・・・・
雑音検波回路。
FIG. 1 is a block diagram of a conventional receiver, and FIG. 2 is a block diagram of a receiver to which a synchronization detection method according to the present invention is applied. 1... Antenna, 21... Frequency discrimination circuit, 26... Noise amplification circuit, 27...
Noise detection circuit.

Claims (1)

【特許請求の範囲】[Claims] 帯域拡散変調信号を受信し、この受信信号の印加された
周波数回路の出力のノイズ検波を行ない、ノイズ量が低
下したことを検出して符号の同期化同期検出方式に関す
るものである。
This invention relates to a code synchronization detection method that receives a spread band modulation signal, performs noise detection on the output of a frequency circuit to which the received signal is applied, and detects that the amount of noise has decreased.
JP56136855A 1981-08-31 1981-08-31 Synchronous detection system Granted JPS5839137A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56136855A JPS5839137A (en) 1981-08-31 1981-08-31 Synchronous detection system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56136855A JPS5839137A (en) 1981-08-31 1981-08-31 Synchronous detection system

Publications (2)

Publication Number Publication Date
JPS5839137A true JPS5839137A (en) 1983-03-07
JPH0255978B2 JPH0255978B2 (en) 1990-11-28

Family

ID=15185077

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56136855A Granted JPS5839137A (en) 1981-08-31 1981-08-31 Synchronous detection system

Country Status (1)

Country Link
JP (1) JPS5839137A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6245230A (en) * 1985-08-23 1987-02-27 Nec Home Electronics Ltd Method and apparatus for spread spectrum power line carrier communication
JPH0247940A (en) * 1988-08-09 1990-02-16 Mitsubishi Electric Corp Direct frequency spread synchronizing system
JPH03167928A (en) * 1989-11-28 1991-07-19 Tech Res & Dev Inst Of Japan Def Agency Frequency hopping synchronizing device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS567542A (en) * 1979-06-29 1981-01-26 Nippon Telegr & Teleph Corp <Ntt> Receiver for spectrum diffusion

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS567542A (en) * 1979-06-29 1981-01-26 Nippon Telegr & Teleph Corp <Ntt> Receiver for spectrum diffusion

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6245230A (en) * 1985-08-23 1987-02-27 Nec Home Electronics Ltd Method and apparatus for spread spectrum power line carrier communication
JPH0247940A (en) * 1988-08-09 1990-02-16 Mitsubishi Electric Corp Direct frequency spread synchronizing system
JPH03167928A (en) * 1989-11-28 1991-07-19 Tech Res & Dev Inst Of Japan Def Agency Frequency hopping synchronizing device

Also Published As

Publication number Publication date
JPH0255978B2 (en) 1990-11-28

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