JPS5788508A - Digital signal recording system - Google Patents
Digital signal recording systemInfo
- Publication number
- JPS5788508A JPS5788508A JP55163877A JP16387780A JPS5788508A JP S5788508 A JPS5788508 A JP S5788508A JP 55163877 A JP55163877 A JP 55163877A JP 16387780 A JP16387780 A JP 16387780A JP S5788508 A JPS5788508 A JP S5788508A
- Authority
- JP
- Japan
- Prior art keywords
- data
- parity
- block
- interleaving
- check
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
- G11B27/02—Editing, e.g. varying the order of information signals recorded on, or reproduced from, record carriers
- G11B27/031—Electronic editing of digitised analogue information signals, e.g. audio or video signals
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Detection And Correction Of Errors (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Error Detection And Correction (AREA)
Abstract
PURPOSE:To make effective electronic editing and to perform efficient error correction, by sequentially recording data A/D-converted, blocking them through the use of P, Q parity series, and giving interleaving to the outside of the block. CONSTITUTION:A signal format in one block on tape consists of D1-42 arranging A/D-converted data in one frame unit, check parity frames P1-16 generated for check from the data and similar check parity frames Q1-6, and the Q1- 6, P15, 16 are used as IBC at editing. The said frame consists of a synchronizing signal SYNC, data or partity, and error detection code CRCC. Thus, the length of interleaving of the Q parity is taken as one block or more, for example, >=3 blocks of interleaving for the data on the same track as D1, D19, D37 are given, allowing to reduce the probability of simultaneous error and enable error correction. As to the P parity, it is constituted within the block.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55163877A JPS5788508A (en) | 1980-11-20 | 1980-11-20 | Digital signal recording system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55163877A JPS5788508A (en) | 1980-11-20 | 1980-11-20 | Digital signal recording system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5788508A true JPS5788508A (en) | 1982-06-02 |
JPH0125159B2 JPH0125159B2 (en) | 1989-05-16 |
Family
ID=15782474
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55163877A Granted JPS5788508A (en) | 1980-11-20 | 1980-11-20 | Digital signal recording system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5788508A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5911050A (en) * | 1982-06-29 | 1984-01-20 | Sony Corp | Method and apparatus for digital sound signal processing |
JPS6151669A (en) * | 1984-08-20 | 1986-03-14 | Akai Electric Co Ltd | Interleave circuit in multi-track digital recording and reproducing device |
EP0191410A2 (en) * | 1985-02-08 | 1986-08-20 | Hitachi, Ltd. | Method of transmitting digital data |
JPH04339368A (en) * | 1991-07-12 | 1992-11-26 | Hitachi Ltd | Digital signal record transmission method |
-
1980
- 1980-11-20 JP JP55163877A patent/JPS5788508A/en active Granted
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5911050A (en) * | 1982-06-29 | 1984-01-20 | Sony Corp | Method and apparatus for digital sound signal processing |
JPS6151669A (en) * | 1984-08-20 | 1986-03-14 | Akai Electric Co Ltd | Interleave circuit in multi-track digital recording and reproducing device |
EP0191410A2 (en) * | 1985-02-08 | 1986-08-20 | Hitachi, Ltd. | Method of transmitting digital data |
JPH04339368A (en) * | 1991-07-12 | 1992-11-26 | Hitachi Ltd | Digital signal record transmission method |
Also Published As
Publication number | Publication date |
---|---|
JPH0125159B2 (en) | 1989-05-16 |
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