JPS5746561A - Fsk demodulating circuit - Google Patents

Fsk demodulating circuit

Info

Publication number
JPS5746561A
JPS5746561A JP55123049A JP12304980A JPS5746561A JP S5746561 A JPS5746561 A JP S5746561A JP 55123049 A JP55123049 A JP 55123049A JP 12304980 A JP12304980 A JP 12304980A JP S5746561 A JPS5746561 A JP S5746561A
Authority
JP
Japan
Prior art keywords
signal
circuit
inputted
high speed
clock pulses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55123049A
Other languages
Japanese (ja)
Inventor
Akira Horiguchi
Moichi Hirasawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP55123049A priority Critical patent/JPS5746561A/en
Priority to US06/293,266 priority patent/US4485347A/en
Publication of JPS5746561A publication Critical patent/JPS5746561A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/10Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14Demodulator circuits; Receiver circuits
    • H04L27/156Demodulator circuits; Receiver circuits with demodulation using temporal properties of the received signal, e.g. detecting pulse width
    • H04L27/1563Demodulator circuits; Receiver circuits with demodulation using temporal properties of the received signal, e.g. detecting pulse width using transition or level detection
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/10Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14Demodulator circuits; Receiver circuits
    • H04L27/156Demodulator circuits; Receiver circuits with demodulation using temporal properties of the received signal, e.g. detecting pulse width
    • H04L27/1566Demodulator circuits; Receiver circuits with demodulation using temporal properties of the received signal, e.g. detecting pulse width using synchronous sampling

Abstract

PURPOSE:To demodulate a signal digitally, by sampling the output signal of a digital phase lock loop circuit, to which an FSK modulation signal is inputted, in a high speed to calculate the duty factor. CONSTITUTION:An FSK modulation signal is inputted to a digital phase lock loop circuit (or a monostable multivibrator circuit) 5 after being adjusted to a constant amplitude and having the waveform shaped to a square wave and is converted to a signal 10 having different duty factors for frequencies fL and fH. A digital discriminating circuit 12 samples the signal 10 in a high speed to discriminate the duty factor and consists of a reversible counter or the like which counts up clock pulses when the signal 10 is ''1'' and counts down clock pulses when the signal 10 is ''0''.
JP55123049A 1980-09-04 1980-09-04 Fsk demodulating circuit Pending JPS5746561A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP55123049A JPS5746561A (en) 1980-09-04 1980-09-04 Fsk demodulating circuit
US06/293,266 US4485347A (en) 1980-09-04 1981-08-17 Digital FSK demodulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55123049A JPS5746561A (en) 1980-09-04 1980-09-04 Fsk demodulating circuit

Publications (1)

Publication Number Publication Date
JPS5746561A true JPS5746561A (en) 1982-03-17

Family

ID=14850934

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55123049A Pending JPS5746561A (en) 1980-09-04 1980-09-04 Fsk demodulating circuit

Country Status (1)

Country Link
JP (1) JPS5746561A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5718618A (en) * 1980-07-09 1982-01-30 Taiho Yakuhin Kogyo Kk Antitumor agent

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5718618A (en) * 1980-07-09 1982-01-30 Taiho Yakuhin Kogyo Kk Antitumor agent
JPS6257165B2 (en) * 1980-07-09 1987-11-30 Taiho Pharmaceutical Co Ltd

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