JPS5665569A - Coding system for video signal - Google Patents
Coding system for video signalInfo
- Publication number
- JPS5665569A JPS5665569A JP14084579A JP14084579A JPS5665569A JP S5665569 A JPS5665569 A JP S5665569A JP 14084579 A JP14084579 A JP 14084579A JP 14084579 A JP14084579 A JP 14084579A JP S5665569 A JPS5665569 A JP S5665569A
- Authority
- JP
- Japan
- Prior art keywords
- bit
- output
- code
- video signal
- coding system
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/41—Bandwidth or redundancy reduction
- H04N1/411—Bandwidth or redundancy reduction for the transmission or storage or reproduction of two-tone pictures, e.g. black and white pictures
- H04N1/413—Systems or arrangements allowing the picture to be reproduced without loss or modification of picture-information
- H04N1/419—Systems or arrangements allowing the picture to be reproduced without loss or modification of picture-information in which encoding of the length of a succession of picture-elements of the same value along a scanning line is the only encoding step
Abstract
PURPOSE:To enable the processing in byte unit for fixed memories, by adding 0's to the upper rank of code by the number of bits excessive, when the bit length exceeds 8-bit. CONSTITUTION:The code 8-bit of less is read out and the code bit length is selectively output from output terminals O1-O7 of the fixed memory 13. If the bit length thus loaded is greater than 8-bit, the output of a NOT circuit 18 is zero to make OFF an AND circuit 17 and 0's are output every clock until it reaches 8-bit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14084579A JPS5665569A (en) | 1979-10-31 | 1979-10-31 | Coding system for video signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14084579A JPS5665569A (en) | 1979-10-31 | 1979-10-31 | Coding system for video signal |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5665569A true JPS5665569A (en) | 1981-06-03 |
Family
ID=15278049
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14084579A Pending JPS5665569A (en) | 1979-10-31 | 1979-10-31 | Coding system for video signal |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5665569A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57207479A (en) * | 1981-06-16 | 1982-12-20 | Japan Radio Co Ltd | Encoding circuit |
JPS595780A (en) * | 1982-06-30 | 1984-01-12 | Mitsubishi Electric Corp | Run-length encoding device |
-
1979
- 1979-10-31 JP JP14084579A patent/JPS5665569A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57207479A (en) * | 1981-06-16 | 1982-12-20 | Japan Radio Co Ltd | Encoding circuit |
JPS595780A (en) * | 1982-06-30 | 1984-01-12 | Mitsubishi Electric Corp | Run-length encoding device |
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