JPS56159722A - Electronic computer system - Google Patents

Electronic computer system

Info

Publication number
JPS56159722A
JPS56159722A JP6228480A JP6228480A JPS56159722A JP S56159722 A JPS56159722 A JP S56159722A JP 6228480 A JP6228480 A JP 6228480A JP 6228480 A JP6228480 A JP 6228480A JP S56159722 A JPS56159722 A JP S56159722A
Authority
JP
Japan
Prior art keywords
timepiece
independent
current time
internal
electronic computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6228480A
Other languages
Japanese (ja)
Inventor
Yoshihiro Negoro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP6228480A priority Critical patent/JPS56159722A/en
Publication of JPS56159722A publication Critical patent/JPS56159722A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
    • G06F9/4825—Interrupt from clock, e.g. time of day

Abstract

PURPOSE:To make automatic corrections by providing an independent timepiece which outputs a current time and also by providing a means of matching the time of an internal timepiece with the current time outputted from the independent timepiece. CONSTITUTION:The arithmetic controller 1 of an electronic computer receives as an interruption signal pulses sent from a timepiece module 3 at constant intervals and, on every reception, updates an internal timepiece 21 in a main storage device 2. An independent timepiece 5, on the other hand, outputs a current time from an output terminal 52. Those signals are read into the arithmetic controller 1 via a digital input device 4 in the actuation of a system and set to the internal timepiece 21 as initial time data.
JP6228480A 1980-05-13 1980-05-13 Electronic computer system Pending JPS56159722A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6228480A JPS56159722A (en) 1980-05-13 1980-05-13 Electronic computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6228480A JPS56159722A (en) 1980-05-13 1980-05-13 Electronic computer system

Publications (1)

Publication Number Publication Date
JPS56159722A true JPS56159722A (en) 1981-12-09

Family

ID=13195665

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6228480A Pending JPS56159722A (en) 1980-05-13 1980-05-13 Electronic computer system

Country Status (1)

Country Link
JP (1) JPS56159722A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0295418U (en) * 1989-01-17 1990-07-30

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0295418U (en) * 1989-01-17 1990-07-30

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