JPS53138250A - Output buffer circuit - Google Patents

Output buffer circuit

Info

Publication number
JPS53138250A
JPS53138250A JP5212477A JP5212477A JPS53138250A JP S53138250 A JPS53138250 A JP S53138250A JP 5212477 A JP5212477 A JP 5212477A JP 5212477 A JP5212477 A JP 5212477A JP S53138250 A JPS53138250 A JP S53138250A
Authority
JP
Japan
Prior art keywords
buffer circuit
output buffer
output
tri
simplify
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5212477A
Other languages
Japanese (ja)
Other versions
JPS5631767B2 (en
Inventor
Takeshi Takeya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP5212477A priority Critical patent/JPS53138250A/en
Publication of JPS53138250A publication Critical patent/JPS53138250A/en
Publication of JPS5631767B2 publication Critical patent/JPS5631767B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09425—Multistate logic
    • H03K19/09429—Multistate logic one of the states being the high impedance or floating state

Abstract

PURPOSE:To simplify a control signal generating circuit and to obtain a tri-state data output easily, by enabling an output buffer circuit to prepare for the next operation at the same time of turning the output terminal into a floating state.
JP5212477A 1977-05-09 1977-05-09 Output buffer circuit Granted JPS53138250A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5212477A JPS53138250A (en) 1977-05-09 1977-05-09 Output buffer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5212477A JPS53138250A (en) 1977-05-09 1977-05-09 Output buffer circuit

Publications (2)

Publication Number Publication Date
JPS53138250A true JPS53138250A (en) 1978-12-02
JPS5631767B2 JPS5631767B2 (en) 1981-07-23

Family

ID=12906116

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5212477A Granted JPS53138250A (en) 1977-05-09 1977-05-09 Output buffer circuit

Country Status (1)

Country Link
JP (1) JPS53138250A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0095767A2 (en) * 1982-05-28 1983-12-07 Nec Corporation Output circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0621028U (en) * 1992-05-12 1994-03-18 奥田商事株式会社 Security cameras for automatic teller machines

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0095767A2 (en) * 1982-05-28 1983-12-07 Nec Corporation Output circuit

Also Published As

Publication number Publication date
JPS5631767B2 (en) 1981-07-23

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