JPS56155550A - Multilayer wiring structure and manufacture thereof - Google Patents

Multilayer wiring structure and manufacture thereof

Info

Publication number
JPS56155550A
JPS56155550A JP5781180A JP5781180A JPS56155550A JP S56155550 A JPS56155550 A JP S56155550A JP 5781180 A JP5781180 A JP 5781180A JP 5781180 A JP5781180 A JP 5781180A JP S56155550 A JPS56155550 A JP S56155550A
Authority
JP
Japan
Prior art keywords
wiring
wiring layer
layer
patterning
multilayer wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5781180A
Other languages
Japanese (ja)
Inventor
Tatsu Ito
Tokio Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5781180A priority Critical patent/JPS56155550A/en
Publication of JPS56155550A publication Critical patent/JPS56155550A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To obtain the wiring in high density without generating breaking of wire in the multilayer wiring structure by a method wherein the second wiring layer is stacked on the first wiring layer using a different material from the first layer through an interlayer insulating film. CONSTITUTION:The Al wiring 2 is provided on a substrate 1, the insulating film 3 of SiO2, etc., is stacked and an opening 4 is formed. Ti 7, Al 5 are laminated on the whole surface, and when a resist mask is applied thereon and etching is performed with phosphoric acid, glacial acetic acid, and nitric acid, Ti is not etched and patterning is performed only on Al. Then only Ti is etched with a mixed liquid of ethyl diamine 4 acetic acid, hydrogen peroxide and water using the Al wiring as a mask. By this constitution, the Al wiring layer 2 is not broken when the patterning of the second Al wiring layer 5 is performed, and density of wiring can be improved.
JP5781180A 1980-05-02 1980-05-02 Multilayer wiring structure and manufacture thereof Pending JPS56155550A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5781180A JPS56155550A (en) 1980-05-02 1980-05-02 Multilayer wiring structure and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5781180A JPS56155550A (en) 1980-05-02 1980-05-02 Multilayer wiring structure and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS56155550A true JPS56155550A (en) 1981-12-01

Family

ID=13066300

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5781180A Pending JPS56155550A (en) 1980-05-02 1980-05-02 Multilayer wiring structure and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS56155550A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59148340A (en) * 1983-02-14 1984-08-25 Fujitsu Ltd Semiconductor device and manufacture thereof
JPH03178131A (en) * 1989-12-06 1991-08-02 Nec Corp Semiconductor device
CN101608985A (en) * 2009-07-27 2009-12-23 上海市机械制造工艺研究所有限公司 Coating shows a display packing of etchant and multi-coated coating institutional framework

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49115689A (en) * 1973-03-07 1974-11-05
JPS51132089A (en) * 1975-05-12 1976-11-16 Hitachi Ltd Semiconductor device
JPS5374392A (en) * 1976-12-15 1978-07-01 Hitachi Ltd Multi-layer coat formation method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49115689A (en) * 1973-03-07 1974-11-05
JPS51132089A (en) * 1975-05-12 1976-11-16 Hitachi Ltd Semiconductor device
JPS5374392A (en) * 1976-12-15 1978-07-01 Hitachi Ltd Multi-layer coat formation method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59148340A (en) * 1983-02-14 1984-08-25 Fujitsu Ltd Semiconductor device and manufacture thereof
JPH03178131A (en) * 1989-12-06 1991-08-02 Nec Corp Semiconductor device
CN101608985A (en) * 2009-07-27 2009-12-23 上海市机械制造工艺研究所有限公司 Coating shows a display packing of etchant and multi-coated coating institutional framework

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