JPS56143072A - Hung up release and processing system in multiprocessor processing system - Google Patents

Hung up release and processing system in multiprocessor processing system

Info

Publication number
JPS56143072A
JPS56143072A JP4702080A JP4702080A JPS56143072A JP S56143072 A JPS56143072 A JP S56143072A JP 4702080 A JP4702080 A JP 4702080A JP 4702080 A JP4702080 A JP 4702080A JP S56143072 A JPS56143072 A JP S56143072A
Authority
JP
Japan
Prior art keywords
buses
error
bus
hung
release
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4702080A
Other languages
Japanese (ja)
Other versions
JPS5816493B2 (en
Inventor
Hiroshi Maruoka
Kunikazu Imai
Akihiko Suzuki
Hiroyuki Abiko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panafacom Ltd
Original Assignee
Panafacom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panafacom Ltd filed Critical Panafacom Ltd
Priority to JP55047020A priority Critical patent/JPS5816493B2/en
Publication of JPS56143072A publication Critical patent/JPS56143072A/en
Publication of JPS5816493B2 publication Critical patent/JPS5816493B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17337—Direct connection machines, e.g. completely connected computers, point to point communication networks
    • G06F15/17343—Direct connection machines, e.g. completely connected computers, point to point communication networks wherein the interconnection is dynamically configurable, e.g. having loosely coupled nearest neighbor architecture
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network

Abstract

PURPOSE:To release hung up state, by compulsively terminating on error of a device on a bus at failure detection, by providing a bus failure monitor on the peripheral device bus of a system consisting of a plurality of CPUs and peripheral devices. CONSTITUTION:Buses 2-1-2-m of CPUs 1-1-1-m system and buses 5-1-5-n of peripheral devices 6-1-6-n system are linked via switching devices SW11-SWmn. Bus failure monitors 9-1-9-n are provided corresponding to the buses 5-1-5-n to monitor the contents of the buses. If any failure is detected with the contents of the information line on the buses and the address lines, the monitor controls that the contents of the tag signal line from CPU system to peripheral device system so as not to return, based on the failure detection output and the content of the tag signal line transmitted from the peripheral device system to the CPU system. Thus, an error is terminated at the peripheral device side, and CPU corresponding to it knows the device number of the input/output controller causing the error, and occurrence of the error is informed from the controller 3-1-3-m to other CPUs to release hung up state.
JP55047020A 1980-04-10 1980-04-10 Hang-up release processing method in multiprocessor processing system Expired JPS5816493B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55047020A JPS5816493B2 (en) 1980-04-10 1980-04-10 Hang-up release processing method in multiprocessor processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55047020A JPS5816493B2 (en) 1980-04-10 1980-04-10 Hang-up release processing method in multiprocessor processing system

Publications (2)

Publication Number Publication Date
JPS56143072A true JPS56143072A (en) 1981-11-07
JPS5816493B2 JPS5816493B2 (en) 1983-03-31

Family

ID=12763491

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55047020A Expired JPS5816493B2 (en) 1980-04-10 1980-04-10 Hang-up release processing method in multiprocessor processing system

Country Status (1)

Country Link
JP (1) JPS5816493B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05210540A (en) * 1992-01-31 1993-08-20 Fujitsu Ltd Interruption device
JP2008044157A (en) * 2006-08-11 2008-02-28 Kokuyo Co Ltd Binding implement, extension pipe and file

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10649933B1 (en) * 2019-04-22 2020-05-12 International Business Machines Corporation Select state detection and signal generation

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05210540A (en) * 1992-01-31 1993-08-20 Fujitsu Ltd Interruption device
JP2008044157A (en) * 2006-08-11 2008-02-28 Kokuyo Co Ltd Binding implement, extension pipe and file

Also Published As

Publication number Publication date
JPS5816493B2 (en) 1983-03-31

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