JPS5591285A - Paired control system - Google Patents

Paired control system

Info

Publication number
JPS5591285A
JPS5591285A JP16473678A JP16473678A JPS5591285A JP S5591285 A JPS5591285 A JP S5591285A JP 16473678 A JP16473678 A JP 16473678A JP 16473678 A JP16473678 A JP 16473678A JP S5591285 A JPS5591285 A JP S5591285A
Authority
JP
Japan
Prior art keywords
time difference
memory
counter
address
counters
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16473678A
Other languages
Japanese (ja)
Other versions
JPS5753709B2 (en
Inventor
Takashi Matsumoto
Kazuo Hamasato
Noboru Watanabe
Kiyotaka Kameda
Kozo Murakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP16473678A priority Critical patent/JPS5591285A/en
Publication of JPS5591285A publication Critical patent/JPS5591285A/en
Publication of JPS5753709B2 publication Critical patent/JPS5753709B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Abstract

PURPOSE:To facilitate the alteration for the time difference without increasing the circuit scale but by dividing the counter which designates the address to read out the control memory into two units of switches for the primary and secondary data each. CONSTITUTION:Control memory 3 is provided to give the control to primary and secondary switches 1 and 2. In addition, 1st counter 41 is provided to designate the address to read out the data controlling switch 1 out of memory 3 along with 2nd counter 42 which designates the address to read out the data controlling switch 2 respectively. Thus the reset pulse featuring an optional time difference is applied to the reset input of counters 41 and 42 through reset timing circuit 6 in order to secure the operation for counters 41 and 42 with an optional time difference. Then the same clock is supplied to both counters along with application of the reset pulse with the time difference. As a result, the simple alteration is ensured for the time difference with controls switches 1 and 2 of memory 3 with no increment of the circuit scale.
JP16473678A 1978-12-28 1978-12-28 Paired control system Granted JPS5591285A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16473678A JPS5591285A (en) 1978-12-28 1978-12-28 Paired control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16473678A JPS5591285A (en) 1978-12-28 1978-12-28 Paired control system

Publications (2)

Publication Number Publication Date
JPS5591285A true JPS5591285A (en) 1980-07-10
JPS5753709B2 JPS5753709B2 (en) 1982-11-15

Family

ID=15798918

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16473678A Granted JPS5591285A (en) 1978-12-28 1978-12-28 Paired control system

Country Status (1)

Country Link
JP (1) JPS5591285A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0439713U (en) * 1990-07-31 1992-04-03

Also Published As

Publication number Publication date
JPS5753709B2 (en) 1982-11-15

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