JPS543441A - High-speed arithmetic system - Google Patents

High-speed arithmetic system

Info

Publication number
JPS543441A
JPS543441A JP6794977A JP6794977A JPS543441A JP S543441 A JPS543441 A JP S543441A JP 6794977 A JP6794977 A JP 6794977A JP 6794977 A JP6794977 A JP 6794977A JP S543441 A JPS543441 A JP S543441A
Authority
JP
Japan
Prior art keywords
arithmetic system
speed arithmetic
value
speed
multiplic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6794977A
Other languages
Japanese (ja)
Inventor
Masaki Usu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6794977A priority Critical patent/JPS543441A/en
Publication of JPS543441A publication Critical patent/JPS543441A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
    • G06F7/5324—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel partitioned, i.e. using repetitively a smaller parallel parallel multiplier or using an array of such smaller multipliers

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)

Abstract

PURPOSE:To ensure a high-speed operation by using the multiplic and value and the multiplier value for the address of the fixed memory element.
JP6794977A 1977-06-10 1977-06-10 High-speed arithmetic system Pending JPS543441A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6794977A JPS543441A (en) 1977-06-10 1977-06-10 High-speed arithmetic system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6794977A JPS543441A (en) 1977-06-10 1977-06-10 High-speed arithmetic system

Publications (1)

Publication Number Publication Date
JPS543441A true JPS543441A (en) 1979-01-11

Family

ID=13359696

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6794977A Pending JPS543441A (en) 1977-06-10 1977-06-10 High-speed arithmetic system

Country Status (1)

Country Link
JP (1) JPS543441A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56149642A (en) * 1980-04-21 1981-11-19 Fujitsu Ltd Multiplier
JPS58142411U (en) * 1981-12-09 1983-09-26 田中　元康 Corrosion-resistant bolts and nuts with washer impregnated with corrosion inhibitor
JPS59204880A (en) * 1983-05-10 1984-11-20 キヤノン株式会社 Dot pattern shift apparatus
JPS6136839A (en) * 1984-07-30 1986-02-21 Aisuke Katayama Parallel compensation system for high-speed multiplication with code
JPH05216627A (en) * 1991-08-16 1993-08-27 Internatl Business Mach Corp <Ibm> Multiplier and multiplying method
EP0576262A2 (en) * 1992-06-25 1993-12-29 Canon Kabushiki Kaisha Apparatus for multiplying integers of many figures

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56149642A (en) * 1980-04-21 1981-11-19 Fujitsu Ltd Multiplier
JPS58142411U (en) * 1981-12-09 1983-09-26 田中　元康 Corrosion-resistant bolts and nuts with washer impregnated with corrosion inhibitor
JPS59204880A (en) * 1983-05-10 1984-11-20 キヤノン株式会社 Dot pattern shift apparatus
JPS6136839A (en) * 1984-07-30 1986-02-21 Aisuke Katayama Parallel compensation system for high-speed multiplication with code
JPH05216627A (en) * 1991-08-16 1993-08-27 Internatl Business Mach Corp <Ibm> Multiplier and multiplying method
EP0576262A2 (en) * 1992-06-25 1993-12-29 Canon Kabushiki Kaisha Apparatus for multiplying integers of many figures

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