JPS5528567A - Mfm demodulator circuit - Google Patents

Abstract

PURPOSE: To ensure the good demodulation for the reproduction NRZ(nonreturn to zero) data by giving the phase comparison to the NRZ data received the modified FM modulation via the PLL circuit and with the voltage control oscillation output gated by the pulse which responds to the zero crossover.

CONSTITUTION: The reproduced NRZ data receives the test for both rise and fall through zero crossover detector 5, and the PLL is locked by the gate output of the zero crossover detection pulse produced through gate 10 of the PLL formed by gate 10, phase comparator 7, voltage control oscillator 9 and others and the output of oscillator 9. Thus the clock synchronous with the NRZ data is generated via oscillator 9, 1/2 divider 12, delay circuit 15 and others. While the pulse duration is turned to the zero crossover pulse the phase of which is inverted by 1/2 the NRZ cycle via delay circuit 6, and the high-level part of the NRZ data is detected through gate 14. This detection signal is applied to D-type FF16 which is controlled by the clock synchronous with the NRZ data, and thus the NRZ data is demodulated satisfactorily by FF16.

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