JPS551722A - Memory system for non-priority information in competition of reception processing for asynchronous reception information - Google Patents

Memory system for non-priority information in competition of reception processing for asynchronous reception information

Info

Publication number
JPS551722A
JPS551722A JP7402578A JP7402578A JPS551722A JP S551722 A JPS551722 A JP S551722A JP 7402578 A JP7402578 A JP 7402578A JP 7402578 A JP7402578 A JP 7402578A JP S551722 A JPS551722 A JP S551722A
Authority
JP
Japan
Prior art keywords
priority information
reception
information
processing
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7402578A
Other languages
Japanese (ja)
Inventor
Shigeru Nakamura
Kiyohiro Yamazaki
Masaaki Kurata
Shinichi Tomizawa
Toru Taniguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP7402578A priority Critical patent/JPS551722A/en
Publication of JPS551722A publication Critical patent/JPS551722A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To enable to memorize and read out the information without priority efficiently, in the reception processing competition for asynchronous reception information with a simple constitution, by providing memories only to non-priority information and judging the propriety at memory readout.
CONSTITUTION: The memory 2 can write in and read out non-priority information in the order of input, and the address of write-in and readout is controlled with the address control circuit 3. Further, the priority information rrceived or non- priority information read out from the memory 2 is selectively outputted to the processing circuit 8 via the gate 6, and the judgement circuit 5 controls the selection of the gate 6 depending whether the priority information is under reception or under processing or not. That is, the non-priority information is stored in the memory 2 in the order of input independently of the reception or processing of the priority information, and it is outputted from the memory 2 after readout when the priority information is not under reception or processing. Thus, in the competition of the reception processing for asynchronous reception information with a simple constitution, non-priority information can efficiently be stored and read out.
COPYRIGHT: (C)1980,JPO&Japio
JP7402578A 1978-06-19 1978-06-19 Memory system for non-priority information in competition of reception processing for asynchronous reception information Pending JPS551722A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7402578A JPS551722A (en) 1978-06-19 1978-06-19 Memory system for non-priority information in competition of reception processing for asynchronous reception information

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7402578A JPS551722A (en) 1978-06-19 1978-06-19 Memory system for non-priority information in competition of reception processing for asynchronous reception information

Publications (1)

Publication Number Publication Date
JPS551722A true JPS551722A (en) 1980-01-08

Family

ID=13535164

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7402578A Pending JPS551722A (en) 1978-06-19 1978-06-19 Memory system for non-priority information in competition of reception processing for asynchronous reception information

Country Status (1)

Country Link
JP (1) JPS551722A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04271601A (en) * 1990-10-22 1992-09-28 Hughes Aircraft Co Double-partition polarized wave rotor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04271601A (en) * 1990-10-22 1992-09-28 Hughes Aircraft Co Double-partition polarized wave rotor

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