JPS55157027A - Input and output transfer control unit - Google Patents

Input and output transfer control unit

Info

Publication number
JPS55157027A
JPS55157027A JP6539279A JP6539279A JPS55157027A JP S55157027 A JPS55157027 A JP S55157027A JP 6539279 A JP6539279 A JP 6539279A JP 6539279 A JP6539279 A JP 6539279A JP S55157027 A JPS55157027 A JP S55157027A
Authority
JP
Japan
Prior art keywords
unit
input
output
transfer
transfer control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6539279A
Other languages
Japanese (ja)
Inventor
Masashi Deguchi
Teiji Nishizawa
Sumio Ozawa
Hiroshi Izumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP6539279A priority Critical patent/JPS55157027A/en
Publication of JPS55157027A publication Critical patent/JPS55157027A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To perform high speed of processing speed and the utilizing efficiency increase (substantial extension) of the main memory unit, by enabling the extension of input and output address space and the transfer control of input and output entirely independent of CPU.
CONSTITUTION: An input and output processing unit consists of an input and output transfer control unit (f) performing the extension of the input and output address space and the transfer control of input and output, CPU (a), main memory unit (b), input and output control unit (d), external peripheral unit (f), and memory unit (g) placed in the address space extended. The unit (e) feeds a transfer request signal 11 to the unit (d) with the data α produced, and the unit (d) feeds an input and output transfer request signal 12 to the unit (f) by receiving it. Next, the unit (f) immediately delivers the address (r) designated in advance in the unit (g) independently of the CPUa via a bus 15 and simultaneously feeds a transfer response signal 13 to the unit (d), which delivers the data α of the unit (e) on an input and output transfer exclusive use bus (j). Thus, the data α can be transferred to the input and output address extended at high speed.
COPYRIGHT: (C)1980,JPO&Japio
JP6539279A 1979-05-25 1979-05-25 Input and output transfer control unit Pending JPS55157027A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6539279A JPS55157027A (en) 1979-05-25 1979-05-25 Input and output transfer control unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6539279A JPS55157027A (en) 1979-05-25 1979-05-25 Input and output transfer control unit

Publications (1)

Publication Number Publication Date
JPS55157027A true JPS55157027A (en) 1980-12-06

Family

ID=13285673

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6539279A Pending JPS55157027A (en) 1979-05-25 1979-05-25 Input and output transfer control unit

Country Status (1)

Country Link
JP (1) JPS55157027A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58195265A (en) * 1982-05-10 1983-11-14 Sony Corp Microcomputer
JPS58225422A (en) * 1982-06-25 1983-12-27 Toshiba Corp Data controller
JPS6072052A (en) * 1983-09-29 1985-04-24 Nec Corp Memory access system

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5096148A (en) * 1973-12-24 1975-07-31
JPS5177143A (en) * 1974-12-27 1976-07-03 Tokyo Shibaura Electric Co
JPS52137223A (en) * 1976-05-12 1977-11-16 Hitachi Ltd Address expansion system of channel
JPS5358731A (en) * 1976-11-08 1978-05-26 Mitsubishi Electric Corp Memory address extension method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5096148A (en) * 1973-12-24 1975-07-31
JPS5177143A (en) * 1974-12-27 1976-07-03 Tokyo Shibaura Electric Co
JPS52137223A (en) * 1976-05-12 1977-11-16 Hitachi Ltd Address expansion system of channel
JPS5358731A (en) * 1976-11-08 1978-05-26 Mitsubishi Electric Corp Memory address extension method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58195265A (en) * 1982-05-10 1983-11-14 Sony Corp Microcomputer
JPS58225422A (en) * 1982-06-25 1983-12-27 Toshiba Corp Data controller
JPH0122940B2 (en) * 1982-06-25 1989-04-28 Tokyo Shibaura Electric Co
JPS6072052A (en) * 1983-09-29 1985-04-24 Nec Corp Memory access system

Similar Documents

Publication Publication Date Title
JPS55143635A (en) Input-output controller
JPS52119832A (en) Electroinc calculator of microprogram control system
JPS55157027A (en) Input and output transfer control unit
JPS5223235A (en) Input/output multiprocessor
JPS5398741A (en) High level recording and processing system
JPS5313325A (en) Connection method between information processing unit and peripheral device
JPS53139939A (en) Memory addressing method
JPS526032A (en) Main storage control unit
JPS5563422A (en) Data transfer system
JPS54161854A (en) Input/output control system for information processor
JPS5748141A (en) Address conversion system
JPS55142476A (en) Address conversion system for information processing system
JPS5563423A (en) Data transfer system
JPS51138136A (en) Main memory access controller
JPS53112041A (en) Data processor
JPS5679357A (en) Control unit having hierarchical processor and memory
JPS5638631A (en) Data transfer apparatus
JPS5394836A (en) Data process system
JPS53134334A (en) Prefetch system in information processor having buffer memory
JPS51144137A (en) Input/output data control unit
JPS55135929A (en) Input/output control device
JPS54101235A (en) Operational processor
JPS53103332A (en) Input/output control system for information processor
JPS5487140A (en) Data transfer control system
JPS5572229A (en) Information processing system