JPS55150006A - Control timing system - Google Patents

Control timing system

Info

Publication number
JPS55150006A
JPS55150006A JP5804879A JP5804879A JPS55150006A JP S55150006 A JPS55150006 A JP S55150006A JP 5804879 A JP5804879 A JP 5804879A JP 5804879 A JP5804879 A JP 5804879A JP S55150006 A JPS55150006 A JP S55150006A
Authority
JP
Japan
Prior art keywords
pulse
timing
selecting
controller
control subject
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5804879A
Other languages
Japanese (ja)
Inventor
Atsushi Ogata
Tadashi Kumahara
Katsuji Murai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Japan Atomic Energy Agency
Original Assignee
Hitachi Ltd
Japan Atomic Energy Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Japan Atomic Energy Research Institute filed Critical Hitachi Ltd
Priority to JP5804879A priority Critical patent/JPS55150006A/en
Publication of JPS55150006A publication Critical patent/JPS55150006A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To decrease the number of the transmission circuits and thus secure the signal transmission in the minimum time, by selecting the operation subject block via the timing pulse given from the generalizing controller and also selecting the unit via the timing pulse composed of the operation subject selecting pulse.
CONSTITUTION: Synchronous timing pulse (2) and coded timing pulse (3) to be transmitted serially are produced through timing system 30 and based on clock pulse (1) generated at clock pulse generating circuit 10 and the command given from generalizing controller 20 to be applied to timing systems 11, 12W1N. The application of the identifying pulse of the frames is not required by separating the transmission lines of pulse (2) and pulse (3), and thus only the pulse to identify the control subject block is needed. As a result, each frame can be formed with the minimum pulse, and at the same time the frame space can be minimized. Thus the control subject block selection signal can be transmitted in the minimun time. After receiving pulses (2) and (3), timing system 1i decodes pulse (3) and then transmits timing pulses 1i1W1iM to individual controller (i) to select the control subject unit.
COPYRIGHT: (C)1980,JPO&Japio
JP5804879A 1979-05-14 1979-05-14 Control timing system Pending JPS55150006A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5804879A JPS55150006A (en) 1979-05-14 1979-05-14 Control timing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5804879A JPS55150006A (en) 1979-05-14 1979-05-14 Control timing system

Publications (1)

Publication Number Publication Date
JPS55150006A true JPS55150006A (en) 1980-11-21

Family

ID=13073036

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5804879A Pending JPS55150006A (en) 1979-05-14 1979-05-14 Control timing system

Country Status (1)

Country Link
JP (1) JPS55150006A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59149507A (en) * 1983-01-28 1984-08-27 Toshiba Corp Process output device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59149507A (en) * 1983-01-28 1984-08-27 Toshiba Corp Process output device

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