JPS55115775A - Synchronizing signal generator - Google Patents

Synchronizing signal generator

Info

Publication number
JPS55115775A
JPS55115775A JP2245479A JP2245479A JPS55115775A JP S55115775 A JPS55115775 A JP S55115775A JP 2245479 A JP2245479 A JP 2245479A JP 2245479 A JP2245479 A JP 2245479A JP S55115775 A JPS55115775 A JP S55115775A
Authority
JP
Japan
Prior art keywords
signal
fed
synchronizing signal
phe
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2245479A
Other languages
Japanese (ja)
Other versions
JPS6161308B2 (en
Inventor
Takashi Nakamura
Yoshihiro Morioka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP2245479A priority Critical patent/JPS55115775A/en
Publication of JPS55115775A publication Critical patent/JPS55115775A/en
Publication of JPS6161308B2 publication Critical patent/JPS6161308B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising
    • H04N5/06—Generation of synchronising signals
    • H04N5/067—Arrangements or circuits at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof

Abstract

PURPOSE:To produce the horizontal and vertical synchronizing signal without jitter, by resetting the counter with the control signal when external synchronizing signal is present at the period when the window pulse is fed and with the external synchronizing signal other than the case. CONSTITUTION:In the external synchronism by means of the synchronizing signal generator of various standard system such as NTSC and PAL systems, the reference signal So of the reference signal oscillator 1 is frequency-divided with the counters 2...5 to obtain the horizontal and vertical synchronizing signals SH, SV. The counter 3 is provided with the control circuit 21 for reset pulse and the forming circuit 20 of window pulse, and to the circuit 21, the control signal PHI based on the signal SH and the external synchronizing signal PHE are fed and the window pulse signal PW is fed. Further, if the signal PHE is present at the period when the pulse PW is fed, the counter 3 is reset with the signal PHI and in other case, with the signal PHE. Thus, if the signal PHE is fluctuated with the presence of transmission system, signals SH, SV can be formed without jitter.
JP2245479A 1979-02-27 1979-02-27 Synchronizing signal generator Granted JPS55115775A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2245479A JPS55115775A (en) 1979-02-27 1979-02-27 Synchronizing signal generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2245479A JPS55115775A (en) 1979-02-27 1979-02-27 Synchronizing signal generator

Publications (2)

Publication Number Publication Date
JPS55115775A true JPS55115775A (en) 1980-09-05
JPS6161308B2 JPS6161308B2 (en) 1986-12-25

Family

ID=12083149

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2245479A Granted JPS55115775A (en) 1979-02-27 1979-02-27 Synchronizing signal generator

Country Status (1)

Country Link
JP (1) JPS55115775A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61164387A (en) * 1985-01-16 1986-07-25 Matsushita Electric Ind Co Ltd Video signal processing device
JPS61278277A (en) * 1985-06-04 1986-12-09 Matsushita Electric Ind Co Ltd Synchronizing signal generator
JPS61283276A (en) * 1985-06-10 1986-12-13 Matsushita Electric Ind Co Ltd Synchronizing signal generator
JPS61283277A (en) * 1985-06-10 1986-12-13 Matsushita Electric Ind Co Ltd Synchronizing signal generator
US4769704A (en) * 1985-06-04 1988-09-06 Matsushita Electric Industrial Co., Ltd. Synchronization signal generator
WO1998007272A1 (en) * 1996-08-13 1998-02-19 Fujitsu General Limited Pll circuit for digital display device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61164387A (en) * 1985-01-16 1986-07-25 Matsushita Electric Ind Co Ltd Video signal processing device
JPS61278277A (en) * 1985-06-04 1986-12-09 Matsushita Electric Ind Co Ltd Synchronizing signal generator
US4769704A (en) * 1985-06-04 1988-09-06 Matsushita Electric Industrial Co., Ltd. Synchronization signal generator
JPH053951B2 (en) * 1985-06-04 1993-01-18 Matsushita Electric Ind Co Ltd
JPS61283276A (en) * 1985-06-10 1986-12-13 Matsushita Electric Ind Co Ltd Synchronizing signal generator
JPS61283277A (en) * 1985-06-10 1986-12-13 Matsushita Electric Ind Co Ltd Synchronizing signal generator
WO1998007272A1 (en) * 1996-08-13 1998-02-19 Fujitsu General Limited Pll circuit for digital display device
US6392641B1 (en) 1996-08-13 2002-05-21 Fujitsu Limited PLL circuit for digital display apparatus

Also Published As

Publication number Publication date
JPS6161308B2 (en) 1986-12-25

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