JPS5446421A - Subcarrier signal generating circuit - Google Patents

Subcarrier signal generating circuit

Info

Publication number
JPS5446421A
JPS5446421A JP11376877A JP11376877A JPS5446421A JP S5446421 A JPS5446421 A JP S5446421A JP 11376877 A JP11376877 A JP 11376877A JP 11376877 A JP11376877 A JP 11376877A JP S5446421 A JPS5446421 A JP S5446421A
Authority
JP
Japan
Prior art keywords
phase
burst signal
circuit
output
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11376877A
Other languages
Japanese (ja)
Inventor
Yasuhiro Toyomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Denshi KK
Original Assignee
Hitachi Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Denshi KK filed Critical Hitachi Denshi KK
Priority to JP11376877A priority Critical patent/JPS5446421A/en
Publication of JPS5446421A publication Critical patent/JPS5446421A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To obtain an excellent subcarrier signal with a little jitter by extracting only pulses which correspond to either 1st or 2nd phase of an extracted burst signal and making them phase-synchronize with the burst signal.
CONSTITUTION: Phase comparator circuit 10 discriminates the 1st phase and 2nd phase of an extracted burst signal, and by its output, reset pulse generating circuit 11 generates pulses corresponding to either 1st or 2nd phase. On the other hand, FF8 is set by a horizontal synchronizing signal and reset by a pulse, and gate circuit 9 outputs selectively either burst signal of the 1st or 2nd phase by the output of FF8. Then, oscillation circuit 6 generates subcarrier signals of continuous signals following and synchronizing with the burst signal supplied from the output of circuit 9. Consequently, subcarrier signals can be obtained with a little jitter
COPYRIGHT: (C)1979,JPO&Japio
JP11376877A 1977-09-20 1977-09-20 Subcarrier signal generating circuit Pending JPS5446421A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11376877A JPS5446421A (en) 1977-09-20 1977-09-20 Subcarrier signal generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11376877A JPS5446421A (en) 1977-09-20 1977-09-20 Subcarrier signal generating circuit

Publications (1)

Publication Number Publication Date
JPS5446421A true JPS5446421A (en) 1979-04-12

Family

ID=14620637

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11376877A Pending JPS5446421A (en) 1977-09-20 1977-09-20 Subcarrier signal generating circuit

Country Status (1)

Country Link
JP (1) JPS5446421A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63181079U (en) * 1987-05-15 1988-11-22

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63181079U (en) * 1987-05-15 1988-11-22

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