JPS55105760A - Memory control unit - Google Patents

Memory control unit

Info

Publication number
JPS55105760A
JPS55105760A JP1369779A JP1369779A JPS55105760A JP S55105760 A JPS55105760 A JP S55105760A JP 1369779 A JP1369779 A JP 1369779A JP 1369779 A JP1369779 A JP 1369779A JP S55105760 A JPS55105760 A JP S55105760A
Authority
JP
Japan
Prior art keywords
memory
address
control unit
decoder
memory control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1369779A
Other languages
Japanese (ja)
Inventor
Etsuo Kusumoto
Teiji Nishizawa
Hiroshi Izumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1369779A priority Critical patent/JPS55105760A/en
Publication of JPS55105760A publication Critical patent/JPS55105760A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To extend the memory capacity, by using a plurality of memories in the one memory address area, by commonly using a given memory address area to a plurality of memories.
CONSTITUTION: The decoder 2 outputs the address of the register 4 from the address bus AB, and the figure selecting the memory Mi outputted at the data bus DB is written in the register 4. On the other hand, the decoder 1 detects the address in the memory address area commonly used with the memory group M1WMn and outputs it to the decoder 3.
COPYRIGHT: (C)1980,JPO&Japio
JP1369779A 1979-02-07 1979-02-07 Memory control unit Pending JPS55105760A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1369779A JPS55105760A (en) 1979-02-07 1979-02-07 Memory control unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1369779A JPS55105760A (en) 1979-02-07 1979-02-07 Memory control unit

Publications (1)

Publication Number Publication Date
JPS55105760A true JPS55105760A (en) 1980-08-13

Family

ID=11840379

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1369779A Pending JPS55105760A (en) 1979-02-07 1979-02-07 Memory control unit

Country Status (1)

Country Link
JP (1) JPS55105760A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55164955A (en) * 1979-05-09 1980-12-23 Nec Corp Information processor
JPS5960663A (en) * 1982-09-30 1984-04-06 Fujitsu Ltd Expansion system of address of microprocessor
JPS59208663A (en) * 1983-05-12 1984-11-27 Konami Kogyo Kk Method and apparatus for expanding number of addresses of read-only memory
JPS59208662A (en) * 1983-05-12 1984-11-27 Konami Kogyo Kk Circuit expanding number of addresses of read-only memory
JPS6052540U (en) * 1983-09-14 1985-04-13 株式会社ピ−エフユ− Address decode circuit
JPS60169954A (en) * 1984-02-15 1985-09-03 Fuji Electric Co Ltd Memory access system
JPS60205644A (en) * 1984-03-29 1985-10-17 Ascii Corp Memory address extension system

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55164955A (en) * 1979-05-09 1980-12-23 Nec Corp Information processor
JPS5960663A (en) * 1982-09-30 1984-04-06 Fujitsu Ltd Expansion system of address of microprocessor
JPS59208663A (en) * 1983-05-12 1984-11-27 Konami Kogyo Kk Method and apparatus for expanding number of addresses of read-only memory
JPS59208662A (en) * 1983-05-12 1984-11-27 Konami Kogyo Kk Circuit expanding number of addresses of read-only memory
JPS6052540U (en) * 1983-09-14 1985-04-13 株式会社ピ−エフユ− Address decode circuit
JPS60169954A (en) * 1984-02-15 1985-09-03 Fuji Electric Co Ltd Memory access system
JPS60205644A (en) * 1984-03-29 1985-10-17 Ascii Corp Memory address extension system

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