JPS55112661A - Memory control unit - Google Patents
Memory control unitInfo
- Publication number
- JPS55112661A JPS55112661A JP1991179A JP1991179A JPS55112661A JP S55112661 A JPS55112661 A JP S55112661A JP 1991179 A JP1991179 A JP 1991179A JP 1991179 A JP1991179 A JP 1991179A JP S55112661 A JPS55112661 A JP S55112661A
- Authority
- JP
- Japan
- Prior art keywords
- unit
- address register
- mcu
- cpu
- control unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Executing Machine-Instructions (AREA)
Abstract
PURPOSE: To increase the processing performance, by comparing the output of address register with the output of address register before one step and reading out the instruction to CPU from the memory control unit when each bit except least significant bit is in agreement with each other.
CONSTITUTION: In the data transfer between CPU and memory control unit (MCU), the address register 8 is provided for the unit MCU in addition to the address register 6, and the content of the address register before one step is inputted to the register 8. Further, each bit except the least significant bit is compared 9, and when instruction is read out from the memory unit 12, if the outputs of the unit 9 are in agreement except the least significant bit, since the instruction required is read out from the unit 12 to MCU already, data readout is made from MCU to CPU immediately. Thus, the access time to the memory unit 12 is omitted to increase the processing performance of CPU.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1991179A JPS55112661A (en) | 1979-02-22 | 1979-02-22 | Memory control unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1991179A JPS55112661A (en) | 1979-02-22 | 1979-02-22 | Memory control unit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55112661A true JPS55112661A (en) | 1980-08-30 |
Family
ID=12012388
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1991179A Pending JPS55112661A (en) | 1979-02-22 | 1979-02-22 | Memory control unit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55112661A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59500836A (en) * | 1982-05-10 | 1984-05-10 | エヌ・シ−・ア−ル・コ−ポレ−シヨン | memory addressing system |
JPS63271647A (en) * | 1987-04-30 | 1988-11-09 | Yokogawa Medical Syst Ltd | Memory circuit |
-
1979
- 1979-02-22 JP JP1991179A patent/JPS55112661A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59500836A (en) * | 1982-05-10 | 1984-05-10 | エヌ・シ−・ア−ル・コ−ポレ−シヨン | memory addressing system |
JPS63271647A (en) * | 1987-04-30 | 1988-11-09 | Yokogawa Medical Syst Ltd | Memory circuit |
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