JPS54144128A - Jitter restriction unit for character broadcast receiver - Google Patents
Jitter restriction unit for character broadcast receiverInfo
- Publication number
- JPS54144128A JPS54144128A JP5314278A JP5314278A JPS54144128A JP S54144128 A JPS54144128 A JP S54144128A JP 5314278 A JP5314278 A JP 5314278A JP 5314278 A JP5314278 A JP 5314278A JP S54144128 A JPS54144128 A JP S54144128A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- screen
- signal
- clock pulse
- phase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To restrict the jitter toward transversal direction, by reducing the display start point on the TV screen to be shifted to the transversal direction, through the constitution of the clock pulse related to the horizontal synchronizing signal in phase, in the display period displaying characters and picture on the TV screen.
CONSTITUTION: The informaton such as character and graph inserted at the vertical blanking period of TV video signal is reproduced depending on the clock pulse and it is pictured out on the TV screen. In such a character broadcast receiver, the clock generation circuit 5 which takes the signal from the STX(Start or Text) detection circuit and the color subcarrier reproeucing circuit as input and produces clock pulse (5.37MHz) is constituted with the 8 multiplication circuit 51 and the 1/5 frequency division circuit 52, and the AND gate 53 inputting the STX signal and the reset signal is connected to the circuit 52. Further, the phase of the horizontal synchronizing signal is related to the clock pulse in phase to reduce the shift toward transversal direction of the display start position of the TV screen.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5314278A JPS54144128A (en) | 1978-04-28 | 1978-04-28 | Jitter restriction unit for character broadcast receiver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5314278A JPS54144128A (en) | 1978-04-28 | 1978-04-28 | Jitter restriction unit for character broadcast receiver |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS54144128A true JPS54144128A (en) | 1979-11-10 |
Family
ID=12934570
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5314278A Pending JPS54144128A (en) | 1978-04-28 | 1978-04-28 | Jitter restriction unit for character broadcast receiver |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54144128A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5921182A (en) * | 1982-07-28 | 1984-02-03 | Toshiba Corp | Clock generator for picture display |
JPS63174759U (en) * | 1988-04-28 | 1988-11-14 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5213722A (en) * | 1975-07-23 | 1977-02-02 | Matsushita Electric Ind Co Ltd | Still image receiver |
-
1978
- 1978-04-28 JP JP5314278A patent/JPS54144128A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5213722A (en) * | 1975-07-23 | 1977-02-02 | Matsushita Electric Ind Co Ltd | Still image receiver |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5921182A (en) * | 1982-07-28 | 1984-02-03 | Toshiba Corp | Clock generator for picture display |
JPS63174759U (en) * | 1988-04-28 | 1988-11-14 |
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