JPS5230388A - Semiconductor integrated circuit device constructed with insulating ga te field effect transistor - Google Patents

Semiconductor integrated circuit device constructed with insulating ga te field effect transistor

Info

Publication number
JPS5230388A
JPS5230388A JP10735075A JP10735075A JPS5230388A JP S5230388 A JPS5230388 A JP S5230388A JP 10735075 A JP10735075 A JP 10735075A JP 10735075 A JP10735075 A JP 10735075A JP S5230388 A JPS5230388 A JP S5230388A
Authority
JP
Japan
Prior art keywords
insulating
integrated circuit
field effect
effect transistor
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10735075A
Other languages
Japanese (ja)
Other versions
JPS5851427B2 (en
Inventor
Hirohito Kawagoe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP50107350A priority Critical patent/JPS5851427B2/en
Priority to GB46414/75A priority patent/GB1529717A/en
Priority to FR7535849A priority patent/FR2323233A1/en
Priority to DE2552644A priority patent/DE2552644C2/en
Priority to DE2560425A priority patent/DE2560425C2/de
Priority to CA240,274A priority patent/CA1070436A/en
Priority to IT29594/75A priority patent/IT1049770B/en
Priority to NLAANVRAGE7513708,A priority patent/NL185483C/en
Publication of JPS5230388A publication Critical patent/JPS5230388A/en
Priority to US05/892,178 priority patent/US4235010A/en
Priority to US05/892,202 priority patent/US4183093A/en
Priority to CA327,604A priority patent/CA1079865A/en
Priority to CA327,603A priority patent/CA1070437A/en
Priority to CA327,605A priority patent/CA1079409A/en
Priority to US06/141,574 priority patent/US4365263A/en
Priority to HK356/81A priority patent/HK35681A/en
Priority to MY20/82A priority patent/MY8200020A/en
Publication of JPS5851427B2 publication Critical patent/JPS5851427B2/en
Priority to US06/567,519 priority patent/US4514894A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • G11C17/123—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices comprising cells having several storage transistors connected in series
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823412—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/27—ROM only
    • H10B20/30—ROM only having the source region and the drain region on the same level, e.g. lateral transistors
    • H10B20/38—Doping programmed, e.g. mask ROM
    • H10B20/383—Channel doping programmed

Abstract

PURPOSE: To decrease the occupied area of ROM per unit function in the MOSIC is Si gate enhancement/depression type.
COPYRIGHT: (C)1977,JPO&Japio
JP50107350A 1975-09-04 1975-09-04 Manufacturing method of insulated gate type read-only memory Expired JPS5851427B2 (en)

Priority Applications (17)

Application Number Priority Date Filing Date Title
JP50107350A JPS5851427B2 (en) 1975-09-04 1975-09-04 Manufacturing method of insulated gate type read-only memory
GB46414/75A GB1529717A (en) 1975-09-04 1975-11-10 Semiconductor integrated circuit device composed of insulated gate field-effect transistors
FR7535849A FR2323233A1 (en) 1975-09-04 1975-11-24 INTEGRATED CIRCUIT WITH INSULATED GRILLE FIELD EFFECT TRANSISTORS
DE2552644A DE2552644C2 (en) 1975-09-04 1975-11-24 Integrated semiconductor read-only memory and process for its manufacture
DE2560425A DE2560425C2 (en) 1975-09-04 1975-11-24
CA240,274A CA1070436A (en) 1975-09-04 1975-11-24 Semiconductor integrated circuit device composed of insulated gate field-effect transistors
IT29594/75A IT1049770B (en) 1975-09-04 1975-11-24 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
NLAANVRAGE7513708,A NL185483C (en) 1975-09-04 1975-11-24 METHOD FOR MANUFACTURING A SEMICONDUCTOR UNIT WITH FIELD EFFECT TRANSISTORS WITH INSULATED GATE OF THE DEPLOYMENT AND ENRICHMENT TYPE.
US05/892,202 US4183093A (en) 1975-09-04 1978-03-31 Semiconductor integrated circuit device composed of insulated gate field-effect transistor
US05/892,178 US4235010A (en) 1975-09-04 1978-03-31 Semiconductor integrated circuit device composed of insulated gate field-effect transistor
CA327,604A CA1079865A (en) 1975-09-04 1979-05-15 Semiconductor integrated circuit device composed of insulated gate field-effect transistors
CA327,603A CA1070437A (en) 1975-09-04 1979-05-15 Semiconductor integrated circuit device composed of insulated gate field-effect transistors
CA327,605A CA1079409A (en) 1975-09-04 1979-05-15 Semiconductor integrated circuit device composed of insulated gate field-effect transistors
US06/141,574 US4365263A (en) 1975-09-04 1980-04-18 Semiconductor integrated circuit device composed of insulated gate field-effect transistor
HK356/81A HK35681A (en) 1975-09-04 1981-07-23 Semiconductor integrated circuit device composed of insulated gate field-effect transistors
MY20/82A MY8200020A (en) 1975-09-04 1982-12-30 Semiconductor integrated circuit device composed of insulated gate field effect transistors
US06/567,519 US4514894A (en) 1975-09-04 1984-01-03 Semiconductor integrated circuit device manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50107350A JPS5851427B2 (en) 1975-09-04 1975-09-04 Manufacturing method of insulated gate type read-only memory

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP57137233A Division JPS5831678B2 (en) 1982-08-09 1982-08-09 Read-only memory circuit

Publications (2)

Publication Number Publication Date
JPS5230388A true JPS5230388A (en) 1977-03-08
JPS5851427B2 JPS5851427B2 (en) 1983-11-16

Family

ID=14456816

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50107350A Expired JPS5851427B2 (en) 1975-09-04 1975-09-04 Manufacturing method of insulated gate type read-only memory

Country Status (10)

Country Link
US (3) US4235010A (en)
JP (1) JPS5851427B2 (en)
CA (1) CA1070436A (en)
DE (2) DE2552644C2 (en)
FR (1) FR2323233A1 (en)
GB (1) GB1529717A (en)
HK (1) HK35681A (en)
IT (1) IT1049770B (en)
MY (1) MY8200020A (en)
NL (1) NL185483C (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5647996A (en) * 1979-09-20 1981-04-30 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor memory device
JPS5752943A (en) * 1980-09-12 1982-03-29 Fujitsu Ltd Decoder
US5081052A (en) * 1986-06-25 1992-01-14 Hitachi, Ltd. ROM and process for producing the same

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5851427B2 (en) * 1975-09-04 1983-11-16 株式会社日立製作所 Manufacturing method of insulated gate type read-only memory
US4600933A (en) * 1976-12-14 1986-07-15 Standard Microsystems Corporation Semiconductor integrated circuit structure with selectively modified insulation layer
JPS5519851A (en) * 1978-07-31 1980-02-12 Hitachi Ltd Manufacture of non-volatile memories
US4336647A (en) * 1979-12-21 1982-06-29 Texas Instruments Incorporated Method of making implant programmable N-channel read only memory
JPS56125854A (en) * 1980-03-10 1981-10-02 Nec Corp Integrated circuit
US4476478A (en) * 1980-04-24 1984-10-09 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor read only memory and method of making the same
US4328610A (en) * 1980-04-25 1982-05-11 Burroughs Corporation Method of reducing alpha-particle induced errors in an integrated circuit
DE3108726A1 (en) * 1981-03-07 1982-09-16 Deutsche Itt Industries Gmbh, 7800 Freiburg MONOLITHICALLY INTEGRATED REFERENCE VOLTAGE SOURCE
JPS5830154A (en) * 1981-08-17 1983-02-22 Toshiba Corp Fixed memory semiconductor device and manufacture thereof
US4633572A (en) * 1983-02-22 1987-01-06 General Motors Corporation Programming power paths in an IC by combined depletion and enhancement implants
US4742019A (en) * 1985-10-30 1988-05-03 International Business Machines Corporation Method for forming aligned interconnections between logic stages
US4847517A (en) * 1988-02-16 1989-07-11 Ltv Aerospace & Defense Co. Microwave tube modulator
US5623443A (en) * 1994-03-11 1997-04-22 Waferscale Integration, Inc. Scalable EPROM array with thick and thin non-field oxide gate insulators
US6498376B1 (en) * 1994-06-03 2002-12-24 Seiko Instruments Inc Semiconductor device and manufacturing method thereof
FR2730345B1 (en) * 1995-02-03 1997-04-04 Matra Mhs METHOD FOR MANUFACTURING A DEAD MEMORY IN MOS TECHNOLOGY, AND MEMORY THUS OBTAINED
US5644154A (en) * 1995-03-27 1997-07-01 Microchip Technology Incorporated MOS read-only semiconductor memory with selected source/drain regions spaced away from edges of overlying gate electrode regions and method therefor
US5786607A (en) * 1995-05-29 1998-07-28 Matsushita Electronics Corporation Solid-state image pick-up device and method for manufacturing the same
US5795807A (en) * 1996-12-20 1998-08-18 Advanced Micro Devices Semiconductor device having a group of high performance transistors and method of manufacture thereof
US5952696A (en) * 1997-01-30 1999-09-14 Advanced Micro Devices Complementary metal oxide semiconductor device with selective doping
EP0957521A1 (en) * 1998-05-11 1999-11-17 STMicroelectronics S.r.l. Matrix of memory cells fabricated by means of a self-aligned source process, comprising ROM memory cells, and related manufacturing process
US6703670B1 (en) * 2001-04-03 2004-03-09 National Semiconductor Corporation Depletion-mode transistor that eliminates the need to separately set the threshold voltage of the depletion-mode transistor

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4871976A (en) * 1971-12-28 1973-09-28
US3775191A (en) * 1971-06-28 1973-11-27 Bell Canada Northern Electric Modification of channel regions in insulated gate field effect transistors
JPS4894377A (en) * 1972-03-14 1973-12-05

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3541543A (en) * 1966-07-25 1970-11-17 Texas Instruments Inc Binary decoder
US3618050A (en) 1969-05-07 1971-11-02 Teletype Corp Read-only memory arrays in which a portion of the memory-addressing circuitry is integral to the array
JPS5410836B1 (en) * 1970-06-26 1979-05-10
US4011653A (en) * 1971-08-23 1977-03-15 Tokyo Shibaura Electric Co., Ltd. Method for manufacturing a semiconductor integrated circuit including an insulating gate type semiconductor transistor
US3985591A (en) * 1972-03-10 1976-10-12 Matsushita Electronics Corporation Method of manufacturing parallel gate matrix circuits
GB1357515A (en) * 1972-03-10 1974-06-26 Matsushita Electronics Corp Method for manufacturing an mos integrated circuit
US3873372A (en) * 1973-07-09 1975-03-25 Ibm Method for producing improved transistor devices
US3898105A (en) * 1973-10-25 1975-08-05 Mostek Corp Method for making FET circuits
US3874937A (en) * 1973-10-31 1975-04-01 Gen Instrument Corp Method for manufacturing metal oxide semiconductor integrated circuit of reduced size
DE2356446A1 (en) * 1973-11-12 1975-05-28 Licentia Gmbh Integrated circuit with field effect transistors - for memory cell has enhancement and depletion driver and load metal oxide transistors
JPS50142128A (en) * 1974-05-07 1975-11-15
US3914855A (en) * 1974-05-09 1975-10-28 Bell Telephone Labor Inc Methods for making MOS read-only memories
JPS5851427B2 (en) * 1975-09-04 1983-11-16 株式会社日立製作所 Manufacturing method of insulated gate type read-only memory
US4183093A (en) * 1975-09-04 1980-01-08 Hitachi, Ltd. Semiconductor integrated circuit device composed of insulated gate field-effect transistor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3775191A (en) * 1971-06-28 1973-11-27 Bell Canada Northern Electric Modification of channel regions in insulated gate field effect transistors
JPS4871976A (en) * 1971-12-28 1973-09-28
JPS4894377A (en) * 1972-03-14 1973-12-05

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5647996A (en) * 1979-09-20 1981-04-30 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor memory device
JPS5752943A (en) * 1980-09-12 1982-03-29 Fujitsu Ltd Decoder
JPS636171B2 (en) * 1980-09-12 1988-02-08 Fujitsu Ltd
US5081052A (en) * 1986-06-25 1992-01-14 Hitachi, Ltd. ROM and process for producing the same

Also Published As

Publication number Publication date
FR2323233B1 (en) 1979-04-06
NL7513708A (en) 1977-03-08
FR2323233A1 (en) 1977-04-01
DE2560425C2 (en) 1987-02-19
NL185483C (en) 1990-04-17
NL185483B (en) 1989-11-16
DE2552644A1 (en) 1977-03-17
US4514894A (en) 1985-05-07
US4365263A (en) 1982-12-21
IT1049770B (en) 1981-02-10
HK35681A (en) 1981-07-31
US4235010A (en) 1980-11-25
GB1529717A (en) 1978-10-25
CA1070436A (en) 1980-01-22
JPS5851427B2 (en) 1983-11-16
DE2552644C2 (en) 1983-10-27
MY8200020A (en) 1982-12-31

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