JPH11354761A - Soi substrate and its production - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an SOI substrate having an SOI layer in which Grown-in defect and metal contamination are reduced and a production method. SOLUTION: The method for producing an SOI substrate by bonding a first semiconductor wafer mirror polished at least on the major surface and a second semiconductor wafer 2 comprises a step for forming an oxide film on the major surface of at least one of the first and second semiconductor wafers, a step for making thin the first semiconductor wafer 1 by surface grinding the rear surface after major surfaces of the first and second semiconductor wafers are bonded, a step performing heat-treatment after surface grinding, and a step for making thin the heat-treated semiconductor wafer. An SOI substrate 7 has an SOI layer where micro cavity or an oxide is not present.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an SOI substrate which is bonded between a first semiconductor wafer and a second semiconductor wafer with an oxide film interposed therebetween, and a method for manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, a first semiconductor wafer and a second semiconductor wafer (hereinafter, referred to as single-crystal silicon) made of single-crystal silicon are used.
Wafers), and the first wafer and the second wafer are stacked.
SOI (Silicon on I) formed by bonding wafers
(nsulator) Semiconductor substrates are known.

[0003] As a method of manufacturing such an SOI substrate, first, at least one of a first semiconductor wafer and a second semiconductor wafer whose main surfaces are mirror-polished has an oxide film (SiO _{2) serving as a} dielectric layer. ) Is formed, and the two semiconductor wafers are brought into close contact with each other and subjected to a heat treatment to form an adhesive wafer. Thereafter, unbonded portions around the bonded wafer generated by sagging generated during mirror polishing of the wafer are removed by grinding and etching, and a layer to be a device forming layer is ground to a desired thickness, and then mirror-polished as a finish. It is a substrate.

That is, a bonded semiconductor wafer manufactured by a conventional manufacturing method is, for example, shown in FIGS. 2 (a) to 2 (i).
Are formed in the order shown in FIG.

[0005] As shown in FIG. 2, first, of the first semiconductor wafer 11 and the second semiconductor wafer 12 (FIG.
(A)), an oxide film 13 serving as a dielectric layer is formed on the surface of the first semiconductor wafer 11 (FIG. 2B). afterwards,
First semiconductor wafer 11 and second semiconductor wafer 1
(2) The cleaning of the bonding surface for bonding both is performed. Then, the first and second semiconductor wafers are bonded at room temperature to form a bonded wafer 14 (FIG. 2C). Next, heat treatment (1100 ° C.) is performed on the bonding wafer 14 to strengthen the bonding (FIG. 2D).

As the first and second semiconductor wafers, semiconductor wafers having at least a principal surface mirror-polished are used. During this polishing, sagging occurs around the wafer, so that the first and second semiconductor wafers are polished. When the bonded wafer 14 is formed by bonding both of the semiconductor wafers, the unbonded portion A occurs due to the sag. The first and second
During cleaning or polishing of the bonded wafer to which the semiconductor wafer is bonded, a part of the non-bonded part is peeled off and scattered and becomes a dust generating source, so that the wafer surface is contaminated with particles or a part of the wafer is contaminated. Then, the surface may be damaged during subsequent processing.

For this reason, the bonding wafer 14 is usually used.
Of the first semiconductor wafer 11 from the periphery by 3
Grinding is performed with a width of about mm (FIG. 2E), and then removed by etching (FIG. 2F).

Then, the first wafer 11 of the bonding wafer 14 is ground from the back surface (FIG. 2 (g)) and polished so that the SOI layer has a desired thickness. By this polishing,
The thickness of the active layer is 2 μm or more and the uniformity is ± 1 μm
The SOI substrate 14 is formed on the order of magnitude (FIG. 2H).

Then, for example, the monthly Semiconductor Worl
d PACE processing as described in 1994.4 (Plasma-A
After performing ssisted Chemical Etching), remove the etching residue remaining on the processed surface, or perform touch polishing etc. with a thickness of about 10 nm to reduce the surface roughness,
Ultra-thin SOI substrate 1 having an SOI layer thickness of about 0.1 μm
5 can be formed (FIG. 2 (i)).

The ultra-thin film S formed by the conventional manufacturing method
The SOI layer of the OI substrate 15 is evaluated for crystal defects by an evaluation method as shown in FIG.

FIG. 3A shows an ultra-thin SOI substrate 15 formed by a conventional manufacturing method. Also, 26
Is a crystal defect. This is subjected to dilution selective etching (for example, volume ratio 5 wt% K ₂ Cr ₂ O ₇ : 48 wt% HF: H ₂
The crystal defects are penetrated (see FIG. 3 (2)) with an etching solution of O = 1: 2: 5). By this dilution selective etching, the crystal defects 26 become through pits 27. In addition,
25 is an oxide film, 23 is a second semiconductor wafer on the support side, and 22 is a first semiconductor wafer for forming an SOI layer. After that, the through pit 27 is transferred to the buried oxide film by immersion in a 25 wt% HF solution, whereby the through pit 27 becomes a through pit 28 that has become apparent. This evaluation confirms that the through pit 28 exists in the SOI layer.

This is a crystal defect (Grown-in defect) formed during the growth of a single crystal by the CZ method, and is reported to be a cavity of about 0.1 μm in which an oxide film is formed on the inner wall. At present, it is difficult to make this crystal defect free at the stage of pulling a silicon single crystal by the CZ method.

For this reason, as described in Japanese Patent Application Laid-Open No. 7-66376, there is known a method of performing heat treatment at a high temperature after polishing.

[0014]

However, in the case of an SOI substrate, it is difficult to getter metal to the substrate through a buried oxide film. That is, in forming an SOI substrate, it is important that the SOI layer is not contaminated. However, when the substrate surface is mirror-polished and then subjected to a high-temperature heat treatment in a hydrogen atmosphere, the metal present in the furnace becomes in the SOI layer. Contaminates the penetrating SOI layer. In the case of the SOI substrate, there is a problem that it is difficult to getter the metal contaminant through the buried oxide film as described above.

Further, if the heat treatment is performed in an inert gas atmosphere after the polishing, the mirror surface is roughened by a very small amount of water present in the furnace, so that it is necessary to re-polish, which leads to an increase in the production cost. There was a problem.

Further, the first and second semiconductor wafers have a sag around the wafer due to mirror polishing, and a removal step such as grinding and etching is required to remove an unbonded portion due to the sag. The manufacturing process was complicated.

Accordingly, the present invention provides a method for bonding first and second semiconductor wafers with an SOI layer interposed therebetween, grinding the surface of the active layer of the bonded semiconductor wafers, performing a high-temperature heat treatment, and then performing mirror polishing. To reduce the cost by simplifying the manufacturing process, and reduce the amount of Gr interposed in the SOI layer.
It is an object of the present invention to provide an SOI substrate with reduced own-in defects and metal contamination, and a method for manufacturing the same.

[0018]

According to the first aspect of the present invention, there is provided an SOI substrate formed by bonding a first semiconductor wafer and a second semiconductor wafer each having at least a principal surface mirror-polished. In the manufacturing method, a step of forming a dielectric layer on a main surface of at least one of the first semiconductor wafer and the second semiconductor wafer; and bonding the first and second main surfaces to each other. Thereafter, there is provided a method for manufacturing an SOI substrate having a configuration including a step of performing surface grinding to reduce the thickness of the first semiconductor wafer from the back surface side, a heat treatment step, and a step of further reducing the thickness.

As described above, by performing the heat treatment after the surface grinding, a work distortion layer is formed on the surface by the surface grinding. Further, a dislocation layer is formed by the heat treatment after surface grinding, and the metal remaining in the strained layer or the metal mixed in the furnace during the heat treatment is gettered by the dislocation layer. Can be reduced.

Further, the heat treatment is performed after the unbonded portions generated around the first and second semiconductor wafers when they are bonded are thinned, so that the thinned non-bonded portions are easily supported. Since the semiconductor wafer is bonded to the side semiconductor wafer, generation of particles due to peeling of an unbonded portion can be prevented, generation of scratches due to particles in a subsequent polishing step can be prevented, and the yield of non-defective products can be improved.

Since mirror polishing is performed after the heat treatment, there is no need to worry about surface roughness due to the heat treatment.

According to a second aspect of the present invention, in the first aspect of the present invention, the heat treatment step comprises
This is a method for manufacturing an SOI substrate configured to perform a heat treatment at 0 ° C. or higher and 1380 ° C. or lower.

The silicon single crystal pulled by CZ has a crystal defect (Grown-in defect) formed during the growth of the single crystal, that is, the above-mentioned depth is about 0.1 μm, and the inside is oxidized by the inner wall of the cavity. There are also crystal defects in which the film is formed and other oxygen precipitation nuclei. Here, if heat treatment is performed at 1100 ° C. or more in a non-oxidizing atmosphere, the inner wall oxide film of the cavity of the SOI layer is dissolved, interstitial silicon is supplied by the work strain layer and the dislocation layer, and the work strain layer is formed on the surface. It is possible to fill the cavity which is easier than when there is no dislocation layer,
An OI layer can be obtained.

The third aspect of the present invention is a method for manufacturing an SOI substrate, comprising a step of performing a heat treatment before the plain grinding.

As described above, by performing the heat treatment before the surface grinding, the adhesive strength can be increased, and peeling or the like during the surface grinding can be prevented.

According to a fourth aspect of the present invention, there is provided a semiconductor device comprising: a first semiconductor wafer having at least a principal surface mirror-polished;
The SOI layer formed by bonding the first semiconductor wafer and the second semiconductor wafer to the SOI substrate formed by bonding the first and second semiconductor wafers to each other. The SOI substrate has the following configuration.

As described above, by obtaining an SOI substrate in which the SOI layer is a layer in which microvoids do not exist or a layer in which oxide does not exist, an SOI substrate free of metal contamination can be obtained.

As described above, according to the SOI substrate and the method of manufacturing the same of the present invention, the SOI layer has no crystal defects at low cost by a simple manufacturing process and by reducing the number of manufacturing processes. Good SOI without metal contamination
A substrate can be obtained.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an SOI substrate and a method of manufacturing the same according to the present invention will be described with reference to the cross-sectional views showing the manufacturing steps of FIG.

First, as shown in FIG. 1A, a first semiconductor wafer 1 and a second semiconductor wafer 2 having at least one surface mirror-polished are prepared. In this example, the first
As the semiconductor wafer, a semiconductor wafer having a crystal plane (100), P-type, specific resistance of 5 Ω · cm, and 8 inches was used. still,
For example, by forming a thermal oxide film or a CVD oxide film on the back surface of the second semiconductor wafer 2 and thereafter removing the oxide film, it is possible to prevent back surface scratches and reduce warpage. .

Next, as shown in FIG. 1B, a heat treatment is performed at 500 ° C. or more, for example, 1100 ° C. in an oxidizing atmosphere (an atmosphere containing oxygen or water vapor). By this heat treatment, an oxide film 3 of 100 Å or more, for example, about 2000 Å is formed on the surface of the first semiconductor wafer.

Next, as shown in FIG. 1C, the mirror surfaces of both the first semiconductor wafer 1 and the second semiconductor wafer 2 are cleaned, and the first and second semiconductor wafers are cleaned by this cleaning. After adsorbed moisture and silanol groups are formed on at least one surface of both 1 and 2, they are brought into close contact at room temperature by a method that does not generate voids to form an adhesive wafer 4. In this case, an oxide film may be formed on the surface of the second semiconductor wafer 2 as well. As a material used for the second semiconductor wafer 2, it is also possible to use a material such as quartz, crystal, sapphire, etc. in addition to single crystal silicon and polysilicon. Further, the TTV (maximum deviation of the wafer with respect to the virtual plane) of the semiconductor wafer to be used is preferably small, and for example, a wafer of 1 μm or less is optimal. It should be noted that by processing with a double-side polishing machine, T
Since the TV can be reduced, it is also effective to use a semiconductor wafer polished on both sides.

Next, as shown in FIG. 1 (d), the SOI layer has a thickness of 50 from the back surface of the first semiconductor wafer 1 bonded thereto.
Surface grinding is performed to a degree of μm. By this surface grinding, a work distortion layer 5 is formed on the back surface of the bonded first semiconductor wafer 1. In the case of this example, the SOI layer is 50 μm
However, in consideration of the distortion of the processing due to the surface grinding and the heat treatment temperature in the post-process, etc.
The degree of surface grinding is appropriately set so that the Grown-in defect disappears.

After the surface grinding, SC1 cleaning, HF cleaning,
SC2 cleaning, NaOH cleaning, KOH cleaning, ultrasonic cleaning,
Washing is performed by combining a mixed solution of HF and nitric acid and the like to clean the processed strain layer.

Next, as shown in FIG. 1E, the bonded substrate is placed in an argon atmosphere at 1000 ° C. or higher, for example,
Heat treatment is performed at 1300 ° C. for 1 hour. The gas atmosphere at this time may be an inert gas atmosphere, a reducing gas atmosphere such as hydrogen, or a nitrogen atmosphere such as nitrogen, in addition to the argon gas atmosphere.

The heat treatment increases the adhesive strength. Also,
Since the unbonded portion in the peripheral portion of the bonded wafer 4 is thinned by the surface grinding, the unbonded portion easily adheres to the support-side wafer. For this reason, in the subsequent polishing step, the unbonded portion is peeled off, forming particles, and the generation of scratches on the polished surface caused by the particles is prevented.

Further, since the unbonded portion is easily bonded to the second semiconductor wafer 2 on the supporting side, chamfering and etching for removing the unbonded portion, which have been conventionally required, can be omitted. The process can be simplified and cost can be reduced. In addition, the omission of the chamfering and etching steps can prevent the chamfered portion from being damaged due to particles or the like.

Further, by performing the heat treatment, interstitial silicon is supplied by the strained work layer and the dislocation layer, and the Gronn-in defect existing in the SOI layer disappears.

Further, by performing surface grinding before the heat treatment, a work strain layer 5 is formed on the back surface of the first semiconductor wafer 1, and a dislocation layer not shown is formed by the subsequent heat treatment. Metal contaminants existing in the surface processing strained layer 5 or metal contaminants entering from inside the furnace during heat treatment are gettered by the dislocation layers, and the dislocation layers and the processing strained layers are mirror-polished as described later. Thereby, an SOI layer free of metal contamination can be obtained.

Then, as shown in FIG. 1F, the first semiconductor wafer is polished from the back surface, and the thickness of the SOI layer is 3 ± 1.
A μm thin film SOI substrate is formed.

As described above, since the mirror polishing is performed after the heat treatment step, the problem of surface roughness due to the heat treatment can be avoided, and the thin film SOI substrate 6 having no damage layer on the surface can be formed. In the case of this example, since the peeling of the peripheral unbonded portion is not a problem, it is not necessary to remove the peripheral unbonded portion by grinding and etching. However, as a pre-polishing process, surface grinding, wafer etching, etc. It is also possible to insert a processing step.

Finally, as shown in FIG.
The layers are subjected to PACE processing and touch polishing to form an ultrathin SOI substrate 7 having an SOI layer thickness of 0.1 μm ± 10%. Further, thereafter, by performing sacrificial oxidation, SO 2
The thickness of the I layer can be adjusted.

The S of the SOI substrate 7 thus formed is
When the OI layer was evaluated by the method described above, it was confirmed that crystal defect free and pit free were achieved.

When the metal contamination in the SOI layer was evaluated by another method, the metal contamination in the SOI layer of the ultra-thin SOI substrate manufactured by the method of this example was formed by a usual method. It was confirmed that the level was the same as that of the metal contamination in the SOI layer.

[0045]

As described above, according to the present invention, the first semiconductor wafer having at least the main surface mirror-polished and the second semiconductor wafer are provided.
Forming an oxide film on a main surface of at least one of the first semiconductor wafer and the second semiconductor wafer, the method comprising the steps of: After the first and second main surfaces are brought into close contact with each other, the first semiconductor wafer is provided with a step of performing surface grinding from the back side to reduce the thickness, a heat treatment step, and a step of further reducing the thickness thereafter. This is a method for manufacturing an SOI substrate having the above configuration.

As described above, by performing the heat treatment after the surface grinding, a work distortion layer is formed on the surface by the surface grinding. Further, a dislocation layer is formed by the heat treatment after surface grinding, and the metal remaining in the strained layer or the metal mixed in the furnace during the heat treatment is gettered by the dislocation layer. Can be reduced.

Further, after the first and second semiconductor wafers are bonded to each other, heat treatment is performed after the non-bonded portion formed around the semiconductor wafer is thinned, so that the thinned non-bonded portion is easily supported. Since the semiconductor wafer is bonded to the side semiconductor wafer, generation of particles due to peeling of an unbonded portion can be prevented, generation of scratches due to particles in a subsequent polishing step can be prevented, and the yield of non-defective products can be improved.

Since mirror polishing is performed after the heat treatment, there is no need to worry about surface roughness due to the heat treatment.

Further, by performing the heat treatment step at a temperature of 1,000 ° C. or more and 1380 ° C. or less, the inner wall oxide film of the cavity of the SOI layer dissolves, and the interstitial silicon is supplied by the work-strained layer and the dislocation layer. It is possible to fill the cavity more easily than in the case where there is no processing strain layer and dislocation layer, and it is possible to obtain an SOI layer without crystal defects.

Further, the present invention provides an SOI substrate formed by bonding a first semiconductor wafer and a second semiconductor wafer, each of which has at least a main surface mirror-polished, wherein the first semiconductor wafer and the second semiconductor wafer are bonded to each other. An SOI substrate having a structure in which an SOI layer formed by bonding a wafer is a layer in which microvoids do not exist or a layer in which oxide does not exist.

As described above, by obtaining an SOI substrate in which the SOI layer is a layer in which microvoids do not exist or a layer in which oxide does not exist, an SOI substrate free of metal contamination can be obtained.

According to the SOI substrate and the method of manufacturing the same according to the present invention, the SOI layer is free from crystal defects and free from metal contamination by a simple manufacturing process and by reducing the number of manufacturing processes. A non-defective SOI substrate can be obtained.

[Brief description of the drawings]

FIG. 1 is a process chart showing a method for manufacturing a bonded SOI substrate according to the present invention.

FIG. 2 is a cross-sectional view showing a manufacturing process of an SOI substrate by a conventional bonding method.

FIG. 3 is a cross-sectional view illustrating a method for evaluating crystal defects of an ultra-thin SOI substrate manufactured by a conventional manufacturing method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 1st semiconductor wafer 2 2nd semiconductor wafer 3 Oxide film 4 Adhesion wafer 5 Work distortion layer 6 Thin film SOI substrate 7 Ultra thin film SOI substrate 11 First semiconductor wafer 12 Second semiconductor wafer 13 Oxide film 14 Adhesion wafer 15 Ultra-thin SOI substrate 22 First semiconductor wafer 23 Second semiconductor wafer 25 Oxide film 26 Crystal defect 27 Through pit 28 Through pit A Unbonded portion

Claims (4)

[Claims] 1. A method for manufacturing an SOI substrate formed by bonding a first semiconductor wafer and a second semiconductor wafer, each of which has at least a main surface mirror-polished, wherein the first semiconductor wafer and the second semiconductor wafer are bonded together. Forming a dielectric layer on a surface to be a main surface of at least one of the semiconductor wafers; and adhering the main surfaces of the first and second semiconductor wafers to each other. A method for manufacturing an SOI substrate, comprising: a step of performing surface grinding to form a thin film from the side; a step of performing a heat treatment after the surface grinding; and a step of further forming a thin film thereafter. 2. The heat treatment step after the surface grinding is performed by 100
2. The method for manufacturing an SOI substrate according to claim 1, wherein the method is performed at a temperature of 0 ° C. or more and 1380 ° C. or less. 3. The method for manufacturing an SOI substrate according to claim 1, further comprising a step of performing a heat treatment before said surface grinding. 4. An SOI substrate formed by bonding a first semiconductor wafer and a second semiconductor wafer, each of which has at least a principal surface mirror-polished, wherein the first semiconductor wafer and the second semiconductor wafer are bonded. An SOI substrate characterized in that the formed SOI layer is a layer in which microvoids do not exist or an oxide does not exist.