JPH11196058A - Reception error measurement system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a reception error measurement system by which reception performance of a receiver corresponding to a hierarchizing transmission system is accurately comprehended. SOLUTION: A memory 11 and an output circuit 12 of a reception error measurement device 10 generate TS multiple frame data by a hierarchizing transmission system that allocates prescribed collation data to time slot data. A signal processing unit 20 performs transmission path coding, PSK modulation, frequency conversion and amplification to the TS multiple frame data to output a PSK modulated signal. After this signal is fed to a noise test set 30, where the C/N and the signal level are adjusted, the result is inputted to a measurement object receiver 40. A measurement circuit 15 of the reception error measurement device 10 extracts the data of a specific desired part of the TS multiple frame data received and decoded by the measurement object receiver 40 and collates the extracted data of a part corresponding to the TS multiple frame data of a sender generated from the memory 11 and the output circuit 12 to measure an error amount.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reception error measuring system, and more particularly to a hierarchization method in which a plurality of time slot data are multiplexed and different combinations of PSK modulation schemes and coding rates are allowed in units of time slots. Multiplexed frame data according to the transmission method is transmitted channel coding and PSK
The present invention relates to a reception error measurement system for a receiver that receives and demodulates a modulated transmission signal, decodes the decoded signal, and restores multiplexed frame data according to the original hierarchical transmission scheme.

[0002]

2. Description of the Related Art There is a time division multiplex system as a system for communicating a plurality of independent data at one carrier frequency. The upper part of FIG. 5 shows the configuration of multiplexed frame data on the transmission side. Data 1 to 4 are four independent data. On the transmitting side, the multiplexed frame data is subjected to transmission line coding (adding an error correction code or interleaving to enable error correction on the receiving side) and PSK modulation to generate a transmission signal, and the carrier frequency is set. After conversion, it is transmitted on radio waves. On the receiver side, after receiving the transmission radio wave and creating an intermediate frequency signal, PSK demodulation and decoding of the original multiplexed frame data are performed.
The desired independent data is extracted and used.

In time-division multiplex communication, usually, a plurality of independent data are all transmitted at the same coding rate and the same modulation scheme, and the rate of occurrence of a reception error in multiplexed frame data received and restored by a receiver is equal to the frame rate. It does not change anywhere within. Therefore, time division measurement of the reception error of a multiplex communication, as shown in FIG. 5, merely receives the data D _i of each bit position i of the restored multi-frame data RMD, the multiplex frame data SMD source This is done by collating with the bit data D _i ′ at the same bit position i and counting the number of mismatched bits.

[0004] Independent data may have different uses, such as data that is transmitted in a large amount in a short time even if there is some error, and data that is transmitted almost without error even if it takes time. In digital satellite TV broadcasting, high-quality programs are the former, and normal-quality programs are the latter. Digital satellite T
In V broadcast, 48 time slot data shown in FIG. 6 (one time slot corresponds to one packet of MPEG2)
Are used as transmission units, and a plurality of independent program data are allocated to one to a plurality of continuous time slots, respectively. The TS multiplexed frame data is allowed to have a combination of different modulation schemes and coding rates in units of time slots (however, the same program data has the same modulation scheme and coding rate), and is called a hierarchical transmission scheme. Different combinations of modulation schemes and coding rates mean different C / Ns required for transmission.

The first one byte of each time slot data is a synchronization signal, the next 187 bytes is a main signal, and the following k bytes are later replaced with an error-correcting outer code or time-adjusted for adding a burst signal. Additional data for 8PSK as a combination of modulation scheme and coding rate
(Trellis coded 8PSK) modulation (coding rate 2/3),
QPSK modulation (coding rate 1/2, 2/3, 3/4, 5 /
6, 7/8) and BPSK modulation (coding rate 1/2) are applicable. In a TS multiplex frame, TC8P
Program data is allocated in the order of a larger number of phases, such as SK, QPSK, and BPSK, and in order of a higher coding rate.

[0006] Program data for TC8PSK modulation is allocated in units of one slot.
As for the SK modulation program data, every time n slots are allocated, (mn) pieces of data are used as dummy slots for time adjustment that are not actually transmitted. Similarly, three BPSK modulation program data are set as dummy slots every time one slot is allocated. FIG. 6 shows slots # 1 to # 24.
Up to TC8PSK modulation, slots # 25, # 27,
# 29, # 31, # 33, # 35, # 37, # 39 are Q
For PSK modulation (coding rate 1/2), slots # 41, #
Reference numeral 45 indicates an example for BPSK modulation (coding rate 1/2).

FIG. 7 shows a transmission / reception system using a hierarchical transmission system. On the transmission side, the TS multiplexed frame data is input to an encoder (transmission path encoder) 1 and some of the additional data in each slot is replaced with an outer code error correction code.
A scrambling (energy spreading process), a frame synchronization signal indicating the beginning of a frame, a superframe identification signal indicating the beginning of a superframe composed of eight consecutive frames, and a T indicating a transmission multiplexing configuration in units of one superframe.
MCC (Transmission and Multiplexing Configuration)
Control; transmission multiplex control signal)
12 leading byte replacement, interleaving, inner code error correction addition, BPSK mapping of leading bytes of slots # 1 to # 12 (coding rate 1/2), slot #
In order from 1 (excluding the outer code error correction code in the additional data other than the dummy slot and the dummy slot), PSK mapping for 203 symbols corresponding to each modulation scheme of the main signal and 4 symbols for the burst signal are performed. The BPSK mapping (coding rate 1/2) is repeated, and I and Q symbol streams are output.

[0008] The transmitter 2 orthogonally modulates the carrier with the I and Q symbol streams, and then performs frequency conversion and power amplification.
Transmission is performed from the transmission antenna 3. FIG. 8 shows a configuration example of a transmission frame after PSK modulation in the hierarchical transmission scheme. On the other hand, the receiver 4 catches a transmission radio wave with the reception antenna 5 and performs RF amplification and frequency conversion with the reception circuit 6 to obtain an intermediate frequency signal of the reception signal. Then, the demodulation circuit 7 demodulates the I and Q symbol streams from the intermediate frequency signal by quadrature detection. And a decoder (transmission path decoder) 8
Thus, P is performed in a procedure completely opposite to that of the encoder 1 on the transmitting side.
It performs SK demapping, frame synchronization detection, superframe identification signal detection, TMCC decoding, inner code error correction, deinterleaving, descrambling, and outer code error correction to restore the original TS multiplex frame data.
Then, a desired program data portion is extracted from the TS multiplexed frame data restored with reference to the TMCC information, and the image signal / audio signal is restored.

[0009]

As described above, in the hierarchical transmission system that allows a combination of different modulation systems and coding rates in one carrier frequency, even if the same program data is used,
The transmission quality differs depending on what combination of modulation scheme and coding rate is used for transmission. BPSK modulation (coding rate 1/2) <QPSK modulation (coding rate 1 /
2) <QPSK modulation (coding rate 2/3) <·· <QPS
The reception error amount increases in the order of K modulation (coding rate 7/8) <TC8PSK modulation (coding rate 2/3). It is also known that even with the same combination of modulation scheme and coding rate, the reception error amount tends to increase in the first slot immediately after the combination of modulation scheme and coding rate changes from the immediately preceding slot. In addition, it is known that the reception error amount tends to increase in the first frame immediately after the transmission multiplex configuration has changed from the immediately preceding superframe.

However, by using the same method as the conventional reception error measurement system shown in FIG. 5, the transmitted TS multiplexed frame data and the received TS multiplexed frame data are collated mechanically on a bit basis, so that a hierarchical transmission system is obtained. When the reception error amount of the corresponding receiver is measured, the existence of a combination of different modulation schemes and coding rates in the TS multiplexed frame data is ignored, and the significance of the measured error amount becomes unclear. That is, even if the measured error amount is large, it cannot be said that the reception performance of the BPSK-modulated (coding rate 1/2) program data is poor, and even if the measured error amount is small, the TC8PSK modulation ( Coding rate 2/3)
The received performance of the received program data is not good. Furthermore, the presence or absence of an increase in reception errors in the first slot immediately after the combination of the modulation scheme and the coding rate changes from the immediately preceding slot, and the first frame immediately after the transmission multiplex configuration changes from the immediately preceding superframe. The presence or absence of an increase in reception errors cannot be accurately grasped.

An object of the present invention is to provide a reception error measurement system capable of accurately grasping the reception performance of a receiver compatible with the hierarchical transmission system.

[0012]

In the reception error measuring system according to the first aspect of the present invention, a plurality of time slot data are multiplexed, and different combinations of the PSK modulation method and the coding rate are used for each time slot. A receiver configured to receive, demodulate and decode a transmission signal in which multiplexed frame data according to an allowed hierarchical transmission scheme is transmission path coded and PSK-modulated, and to restore the original multiplexed frame data according to the hierarchical transmission scheme. A multiplexed frame data generating means for generating multiplexed frame data according to a hierarchical transmission scheme in which predetermined matching data is allocated to time slot data.
12) and multiplex frame data by channel coding and PS
Signal processing means (20, 30) for K-modulating and inputting to the receiver under test (40); and the receiver under test (40)
Data of a desired specific portion is extracted from the multiplexed frame data restored in step (1), and the multiplexed frame data generating means (1)
Measuring means (13, 1) for measuring the error amount by comparing with the corresponding part of the multiplexed frame data generated in (1, 12).
5).

According to the first aspect, the multiplexed frame data generated by the multiplexed frame data generating means (11, 12) is subjected to transmission path coding and PSK by the signal processing means (20, 30).
The signal is modulated and input to the receiver under measurement (40). Data of a desired specific portion is extracted from the multiplexed frame data restored by the receiver under measurement (40), and the corresponding portion of the multiplexed frame data generated by the multiplexed frame data generating means (11, 12) and a bit unit are extracted. And measure the error amount.

In the hierarchical transmission system, the transmission quality of each independent data is allowed to differ, and each independent data unit is actually used by the receiver. on the other hand,
Even if the data are independent of each other, the transmission quality is the same if the combination of the modulation scheme and the coding rate is the same.
Therefore, if the reception error amount is measured for each combination of the modulation scheme and the coding rate, it becomes possible to measure the reception performance in accordance with the actual use situation of the receiver. Each time slot data constituting the multiplex frame data is a minimum unit in which a modulation scheme and a coding rate are determined. Therefore, when it is desired to know the reception performance of data transmitted by a combination of a certain modulation scheme and a coding rate, for example, the corresponding 1
By measuring the error amount for all or a part of one time slot, or measuring the error amount for all or a part of each time slot over a plurality of time slots, the desired reception can be accurately performed. The performance can be grasped.

Further, even with the same combination of the modulation scheme and the coding rate, the reception error amount is likely to increase in the first slot immediately after the combination of the modulation scheme and the coding rate changes from the immediately preceding slot. The reception error amount is likely to increase in the first slot of the first frame immediately after the transmission multiplex configuration changes from the superframe. Therefore, for example, all or some data of the first slot immediately after the change of the combination of the modulation scheme and the coding rate is extracted from the immediately preceding slot to measure the reception error amount, or the transmission multiplexing is performed from the immediately preceding superframe. By extracting all or part of the data corresponding to the combination of the desired modulation method and coding rate in the first frame immediately after the change in the configuration and measuring the reception error amount, the error can be reduced in the part where the error tends to increase. It is possible to accurately determine whether the amount has increased more than expected.

In the reception error measuring system according to the second aspect of the present invention, in the system according to the first aspect, the desired specific portion is located in one or a plurality of slots corresponding to a combination of a desired PSK modulation method and a coding rate. It is characterized in that it is part or all of the data to be passed. As a result, the reception error amount can be measured for each combination of the modulation scheme and the coding rate, so that it is possible to accurately measure the reception performance according to the actual use situation of the receiver.

In the reception error measuring system according to the third aspect of the present invention, in the system according to the first aspect, the desired specific portion is obtained immediately after the combination of the PSK modulation method and the coding rate changes in the multiplexed frame data. It is characterized in that it is part or all of slot data. Thus, immediately after the combination of the PSK modulation scheme and the coding rate changes in the multiplexed frame data in which the reception error amount is likely to be large, it is possible to accurately grasp whether or not the reception error amount has increased more than expected. it can.

In the reception error measuring system according to the fourth aspect of the present invention, a plurality of time slot data are multiplexed, and hierarchical transmission in which a combination of different PSK modulation schemes and coding rates is allowed for each time slot. Error for a receiver that receives, demodulates, and decodes a transmission signal in which multiplexed frame data according to the transmission line coding and PSK modulation is applied, and restores the multiplexed frame data according to the original hierarchical transmission method. A multiplexing system for generating multiplexed frame data in which a transmission multiplexing structure is changed in the middle of a multiplexed frame data according to a hierarchical transmission system in which predetermined matching data is allocated to a main signal of time slot data. Frame data generation means (1
1, 12), signal processing means (20, 30) for channel-coding and PSK-modulating the multiplexed frame data to be input to the receiver under test (40), and the receiver under test (4)
A desired specific portion is extracted from the multiplexed frame data immediately after the change of the transmission multiplex configuration restored in step 0), and is compared with the corresponding portion of the multiplexed frame data generated by the multiplexed frame data generating means (11, 12). Measuring means (13, 15) for measuring the error amount by using the control means.

Thus, immediately after the change of the transmission multiplex configuration in which the reception error amount tends to increase, it is possible to accurately grasp whether the reception error amount has not increased more than expected. The desired specific portion may be all or a part of the first slot of the first multiplex frame data immediately after the change of the transmission multiplex configuration, or a desired portion of the first multiplex frame data immediately after the change of the transmission multiplex configuration. All or a part of the data of one slot corresponding to the combination of the modulation scheme and the coding rate, or all or part of the data over a plurality of slots corresponding to the combination of the desired modulation scheme and the coding rate may be used.

In the first to fourth aspects, the signal processing means includes:
One or both of the C / N and the signal level of a PSK modulated signal obtained by transmission line encoding and PSK modulation of multiplexed frame data may be made adjustable.

[0021]

Next, an embodiment of the present invention will be described with reference to FIG. FIG. 1 shows a schematic configuration of a reception error measurement system intended for a digital satellite TV broadcast receiver using a hierarchical transmission system. Numeral 10 repeatedly generates TS multiplexed frame data SMD for 32 frames, extracts data of a desired specific part from the TS multiplexed frame data RMD input from the receiver under measurement, and generates TS multiplexed frame data generated by itself. , A receiving error measuring device for measuring a receiving error amount by comparing with a corresponding portion, and a signal processing device 20 for inputting TS multiplexed frame data and performing transmission line coding, PSK modulation, frequency conversion, and Output the modulation signal. Reference numeral 30 denotes a noise test set, which adds a variable level white noise to the PSK modulated signal, or varies the level of the PSK modulated signal after adding the white noise, and
After arbitrarily adjusting / N and the signal level, the signal is output as a measurement signal.

Numeral 40 denotes a receiver to be measured. The measuring signal input to the antenna terminal via the noise test set 30 is RF-amplified by the receiving circuit 41 and converted into an intermediate frequency signal. Detection and PSK demodulation are performed to obtain I and Q symbol stream data. And
The transmission line is decoded by the decoder 43 to restore the original TS multiplex frame data. The restored TS multiplexed frame data RMD is output to the reception error measuring device 10. The restored TS multiplexed frame data RMD does not completely match the TS multiplexed frame data SMD generated by the reception error measuring device 10 due to an operation error of the receiving circuit 41, the demodulation circuit 42, and the decoder 43 of the receiver under measurement 40. . The restored TS multiplexed frame data RMD is delayed by a certain time from the TS multiplexed frame data SMD generated by the reception error measuring device 10.

In the reception error measuring apparatus 10, a memory 11 stores two sets of TS multiplexed frame data of 32 frames each (two sets are distinguished by DT1 and DT2; see FIG. 2). This is an output circuit that cyclically reads out 32 sets of TS multiplexed frame data of a set selected by the measurer from the memory 10 and outputs the data to the signal processing device 2 as SMD. Each set of TS multiplexed frame data stored in the memory 11 has substantially the same configuration as that shown in FIG. 6, but k-byte additional data from the 187th byte of each slot data includes outer code error correction. Signs are included.
The first byte of slots # 1 to # 12 has been replaced with a frame synchronization signal, TMCC, and superframe identification signal. The TS multiplexed frame data for 32 frames of each set is divided into eight to form four superframes. All four superframes SF11 to SF14 of the first set DT1 have the same transmission multiplex configuration shown in FIG. 3, and slots # 1 to # 24 of each TS multiplex frame data are used for TC8PSK modulation (coding rate 2 /
3), slots # 25 to # 32 are for QPSK modulation (coding rate 3/4), slots # 33 to # 40 are for QPSK modulation (coding rate 1/2), and slots # 41 to # 48 are BP
It is for SK modulation (coding rate 1/2).

The number "15" is assigned as measurement data to the main signal data of all time slots except the dummy slot of the superframe SF11 in units of 1 byte. The number "25" is allocated as measurement data to the main signal data of all the time slots except the dummy slot of the superframe SF12 in byte units. The number "35" is assigned as measurement data to the main signal data of all the time slots except the dummy slot of the superframe SF13 in byte units. The number "45" is assigned as measurement data to the main signal data of all the time slots except the dummy slot of the superframe SF14 in byte units.

4 of the second set DT2 stored in the memory 11
Of the two superframes SF21 to SF24, the first two have the same transmission multiplex configuration as in FIG. 3, but the last two have the transmission multiplex configuration shown in FIG. Slots # 1 to # 20 are for TC8PSK modulation (coding rate 2/3), and slots # 21 to # 40 are QP
For SK modulation (coding rate ２), slots # 41 to # 4
8 is for BPSK modulation (coding rate 1/2).

The number "15" is assigned as measurement data to the main signal data of all the time slots except the dummy slot of the superframe SF21 in byte units. The number "25" is assigned as measurement data to the main signal data of all the time slots except the dummy slot of the superframe SF22 in byte units. The number "35" is assigned as measurement data to the main signal data of all the time slots except the dummy slot of the superframe SF23 in byte units. The number "45" is assigned as measurement data to the main signal data of all time slots except the dummy slot of the superframe SF24 in byte units.

Numeral 13 inputs the restored TS multiplexed frame data from the receiver under test 40 (having the configuration shown in FIG. 3 or 4), reads the value of the main signal data in each time slot, and changes the value. By detecting the timing, the start timing of the superframe is detected for each superframe, and a detection signal (including a signal for distinguishing which superframe is included) is output. Reference numeral 14 denotes an operation panel.
It specifies whether to use the S multiplex frame data for the measurement, or specifies a portion of the TS multiplex frame data restored by the receiver under measurement 40 for which the measurement of the reception error amount is desired (superframe number, spur frame The position of the frame in the frame, the position of the slot in the frame, the whole or part of the slot, etc. can be appropriately designated), and the measurement cycle is designated.

Reference numeral 15 denotes a measurement circuit which stores a specific portion of the TS multiplexed frame data restored by the receiver under measurement 40, for which the measurement of the reception error amount is desired, in accordance with the conditions specified on the operation panel 14. 11 is checked on a bit-by-bit basis with a corresponding part of the TS multiplexed frame data, and whether or not a bit error has occurred is detected. For each measurement cycle, the total number of bits, the number of error bits, the number of error bits / total Calculate the number of bits. Reference numeral 16 denotes a display for displaying the content measured by the measurement circuit 15.

The signal processing device 20 comprises an encoder (transmission path coding circuit) 21 and a transmitter 22. The encoder 21 receives a signal from the receiving error measuring device 10 during measurement.
When the S-multiplexed frame data SMD is input, scrambling is performed except for the first byte of each slot, and further, interleaving, inner code error correction addition, and BPSK (coding rate 1/2) mapping of the first byte of slots # 1 to # 12 are performed. , From slot # 1 (excluding the outer code error correction code and dummy slot in the additional data of each slot), PSK mapping for 203 symbols corresponding to each modulation scheme of the main signal and 4 symbols for burst signal. Is repeated to generate I and Q symbol streams. After orthogonally modulating the carrier with the I and Q symbol streams, the transmitter 22 performs frequency conversion to a predetermined RF frequency and amplifies to output a PSK modulated signal (see FIG. 8).

In the noise test set 30, reference numeral 31 denotes a white noise generator for generating white noise WN;
Is a level adjuster that varies the level of the white noise WN, 33 is an adder that adds the PSK modulated signal and the white noise WN, and 34 is a level that varies the level of the output signal of the adder 33 and outputs it as a measurement signal. It is a regulator. By adjusting the level adjuster 32, the C of the measurement signal
/ N can be set to a desired measurement condition, and the level of the measurement signal can be set to a desired measurement condition by adjusting the level adjuster 34. The measurement signal output from the noise test set 30 is
Is output to

Next, the operation of the measurement system shown in FIG. 1 will be described. The C / N of the measurement signal is adjusted by adjusting the level adjusters 32 and 34 of the noise test set 30 in advance.
And the level are adjusted to the desired measurement conditions. (1) Target: QPSK (coding rate 1/2) modulation part when the transmission multiplexing configuration does not change in the middle Specify the first set DT1 on the operation panel 14, and specify the superframe number and the superframe as the target range. No frame position is specified (all frames of all superframes are targeted), and the slot position is # 3
3, # 35, # 37, and # 39 are specified, and all or some of the slots are specified as all. Also, an appropriate measurement period T is specified.

When a measurement start operation is performed on the operation panel 14,
The output circuit 12 cyclically reads out the TS multiplexed frame data of 32 frames of the first set DT1 from the memory 11,
The signal is output to the signal processing device 20 as an SMD. The signal processing device 20 performs channel coding, PSK modulation, frequency conversion and amplification, and outputs the result to the noise test set 30. The measurement signal adjusted to the desired C / N and signal level by the noise test set 30 is input to the antenna terminal of the receiver under measurement 40, and the reception circuit 41 performs RF amplification and conversion to an intermediate frequency signal. You. Then, the I and Q symbol streams are demodulated by the demodulation circuit 42 from the intermediate frequency signal by quadrature detection. Further, the decoder 43 performs PSK demapping, frame synchronization detection, superframe identification signal detection, TMCC decoding, inner code error correction, deinterleaving, descrambling, and outer code error correction.
The original TS multiplex frame data is restored and output to the reception error measuring device 10 as RMD, for example, in byte units.

When receiving the TS multiplexed frame data RMD, the timing detection circuit 13 of the reception error measuring device 10 detects the start timing of the superframe for each superframe from the numerical value assigned as the main signal of each slot, and detects the detection signal ( (Including a signal for identifying which superframe is used) is output to the measurement circuit 15.
Based on the detection signal input from the timing detection circuit 13, the measurement circuit 15 performs the superframes SF11, SF12, SF13, and SF of the TS multiplexed frame data RMD.
14, SF11, SF12, SF13, SF14, SF
Recognize the current position (super frame position, frame position in super frame, slot position in frame, byte position in slot) for each of 11,.
188 from the second byte of 33, # 35, # 37, and # 39
Bytes up to the first byte and the first
In the TS multiplexed frame data for 32 frames of the set DT1, the corresponding data at the same position (the superframe position, the frame position in the superframe, the slot position in the frame, and the byte position in the slot are all the same) and bit units , The number of error bits N _E that did not match
All the bit numbers _NT that have been collated with are counted from zero. Then, when T has passed, BER = N _E
/ N _T is calculated, and the display 16 displays N _E , N _T , and BER. When one measurement is completed, the same processing is repeated again for the next T period. Thereby, QP
The reception error amount when data transmitted by a combination of SK modulation and a coding rate of 1/2 is received can be determined.

(2) Target: QPSK (coding rate 3/4) modulation part when the transmission multiplex configuration does not change in the middle Specify the first set DT1 on the operation panel 14 and set the superframe number and superframe as the target range. The frame position in the frame is not specified (all frames of all superframes are targeted), and the slot position is # 25.
To # 27, # 29 to # 31, and all or some of the slots are all specified. Also, an appropriate measurement period T is specified.

When the measurement is started, the measuring circuit 15 receives a signal based on the detection signal input from the timing detecting circuit 13,
Each super frame S of the TS multiplex frame data RMD
F11, SF12, SF13, SF14, SF11, S
Recognize the current position (superframe position, frame position in superframe, slot position in frame, byte position in slot) for F12, SF13, SF14, SF11,. Slots # 25 to # 27, # 29
The second to 188th bytes of # 31 to # 31 are extracted, and among the TS multiplexed frame data of 32 frames of the first set DT1 stored in the memory 11, the corresponding same position (superframe position, frame position, slot position in the frame, byte position in the slot matches the data and bits of all the same), all the bit number N _T of checking the error bit number N _E became mismatched respectively, from zero Count. And T
After that, BER = N _E / N _T is calculated, and the display 16 displays N _E , N _T , and BER. When one measurement is completed, the same processing is repeated again for the next T period. As a result, QPSK modulation, coding rate 3
The amount of reception error when data transmitted by the combination of / 4 is received can be determined.

(3) Target: TC8PSK (coding rate 2/3) modulation part when the transmission multiplex configuration does not change in the middle Specify the first set DT1 on the operation panel 14 and set the superframe number and superframe as the target range. The frame position in the frame is not specified (all frames of all super frames are targeted), and the slot positions are # 1 to # 1.
# 24 is specified, and all or a part of the slot specifies all. Also, an appropriate time T is designated as the measurement cycle.

When the measurement is started, the measuring circuit 15 receives the detection signal from the timing detecting circuit 13 based on the detection signal.
Each super frame S of the TS multiplex frame data RMD
F11, SF12, SF13, SF14, SF11, S
Recognize the current position (superframe position, frame position in superframe, slot position in frame, byte position in slot) for F12, SF13, SF14, SF11,. From the second byte to the 188th byte of each of the slots # 1 to # 24, the corresponding same position (superframe) of the 32 frames of the TS multiplexed frame data of the first set DT1 stored in the memory 11 Position, frame position in superframe, slot position in frame, byte position in slot are all the same)
, And all the bit numbers _NT that have been collated with the number of error bits N _E that did not match are counted from zero. Then, when T has elapsed, BER = N _E / N _T is calculated, and N _E ,
Display _NT , BER. After one measurement,
Again, the same processing is repeated for the next T period.
Thereby, the reception error amount when data transmitted by the combination of the TC8PSK modulation and the coding rate of 2/3 is received can be determined.

(4) Target: BPSK (coding rate 1/2) modulation part in the case where the transmission multiplex configuration does not change in the middle Specify the first set DT1 on the operation panel 14 and set the superframe number and superframe as the target range. The frame position in the frame is not specified (all frames of all superframes are targeted), and the slot position is # 4
1, # 45 is specified, and all or a part of the slot specifies the whole. Also, an appropriate time T is designated as the measurement cycle.

When the measurement is started, the measuring circuit 15 next determines each of the super frames SF11, SF12, SF13, SF14, SF14 of the TS multiplexed frame data RMD based on the detection signal input from the timing detecting circuit 13.
11, SF12, SF13, SF14, SF11, ...
, The current position (super frame position, frame position in super frame, slot position in frame, byte position in slot) is recognized, and operation panel 1
Slots # 41 and # 4 specified as measurement targets in Step 4
5 of the first set DT1 stored in the memory 11 and corresponding to the same position (superframe position, frame position in the superframe) , slot position in the frame, byte position in the slot matches the data and bits of all the same), each of the number of all bits N _T of checking the error bit number N _E became mismatch counts from zero To go. Then, when T has elapsed, BER = N _E / N _T is calculated, and the display 1
6 displays N _E , N _T , and BER. When one measurement is completed, the same processing is repeated again for the next T period. Thereby, BPSK modulation, coding rate 1/2
The reception error amount when receiving the data transmitted by the combination of.

In this way, the amount of reception error can be measured for each combination of the PSK modulation method and the coding rate. In the hierarchical transmission scheme, the transmission quality of each independent data is allowed to differ, and each independent data unit is actually used by the receiver. On the other hand, even if the data is independent of each other, the transmission quality is the same if the combination of the modulation scheme and the coding rate is the same. Therefore, if the reception error amount is measured for each combination of the modulation scheme and the coding rate, it becomes possible to measure the reception performance in accordance with the actual use situation of the receiver.

Note that, even with the same combination of the modulation scheme and the coding rate, the reception error amount tends to increase in the first slot immediately after the combination of the modulation scheme and the coding rate changes from the immediately preceding slot. Therefore, it is desirable to measure separately. (5) Target: First slot portion immediately after switching to TC8PSK (coding rate 2/3) modulation when the transmission multiplex configuration does not change in the middle Specify the first set DT1 on the operation panel 14 and set the target range The superframe number and the frame position in the superframe are not specified (all frames of all superframes are targeted), the slot position is specified as # 1, and all or part of the slot is partially specified. Is specified. Also, an appropriate time T is designated as the measurement cycle.

When the measurement is started, the measuring circuit 15 receives the detection signal from the timing detecting circuit 13 based on the detection signal.
Each super frame S of the TS multiplex frame data RMD
F11, SF12, SF13, SF14, SF11, S
Recognize the current position (superframe position, frame position in superframe, slot position in frame, byte position in slot) for F12, SF13, SF14, SF11,. 18 from the second byte of slot # 1
Up to the 8th byte, the same corresponding position (superframe position, frame position in superframe, slot position in frame) in the TS multiplexed frame data of 32 frames of the first set DT1 stored in the memory 11 is extracted. , The byte positions in the slot are all the same) and the number of error bits N that are not matched
Every bit number _NT that has been collated with _E is counted from zero. Then, when T has passed, BER = N
_E / N _T is calculated, and the display 16 displays N _E , N _T , and BER. When one measurement is completed, the same processing is repeated again for the next T period. Thereby, B
TC8P from coding rate 1/2 combination by PSK modulation
It is possible to determine whether or not the reception error amount is large at the head of the first slot immediately after the change to the combination of the coding rate of 2/3 in the SK modulation.

Similarly, if the slot position # 25 and a part of the slot are specified as measurement targets, QPSK
(Coding rate 2/3) The reception error amount is known for the first part of the first slot immediately after the change to the modulation, and if the slot position # 33 and a part of the slot are specified as measurement targets, QPSK (code The reception error amount is known for the first part of the first slot immediately after the change to the modulation rate 1/2) modulation. If the slot position # 41 and a part of the slot are specified as measurement targets, BPSK (coding rate (1/2) The reception error amount can be determined for the head of the first slot immediately after the change to the modulation.

Next, a case where the transmission multiplex configuration changes in the middle will be described. When the transmission multiplex configuration changes on the way, the reception error amount tends to increase immediately after the change, particularly in the first superframe or the first frame. Therefore, it is desirable to measure this point separately. (6) Target: T immediately after the transmission multiplex configuration changes on the way
C8PSK (coding rate 2/3) modulation portion The second set DT2 is specified on the operation panel 14, the superframe number SF23 is specified as the target range, and no frame position is specified in the superframe (all eight frames). Is targeted), and the slot position is #
1 to # 20 are specified (only slot position # 1 may be specified), and all or some of the slots are specified (all may be specified). Also, an appropriate time T is designated as the measurement cycle.

When a measurement start operation is performed on the operation panel 14,
The output circuit 12 cyclically reads the TS multiplexed frame data of the second set DT1 from the memory 11 and outputs it to the signal processing device 20 as SMD. The signal processing device 20 performs channel coding, PSK modulation, frequency conversion, and amplification. The PSK modulated signal output from the signal processing device 20 is input to the target receiver 40 as a measurement signal after the C / N and the signal level are adjusted by the noise test set 30. The receiver under test 40 outputs the restored TS multiplexed frame data RMD to the reception error measuring device 10.

Upon receiving the TS multiplexed frame data RMD, the timing detection circuit 13 detects the start timing of the superframe for each superframe from the numerical value assigned as the main signal of each slot, and detects the detection signal (which superframe is used). (Including a signal for identification) is output to the measurement circuit 15. Based on the detection signal input from the timing detection circuit 13, the measurement circuit 15 determines each superframe SF 21, S
F22, SF23, SF24, SF21, SF22, S
The current position (superframe position, frame position in superframe, slot position in frame, byte position in slot) is recognized for F23, SF24, SF21,. From the second byte to the 188th byte of each of slots # 1 to # 20 (or # 1 when only slot # 1 is specified) of each frame of superframe SF23 (when a part of the slot is specified as a target) Is extracted from the second byte to the tenth byte, and among the 32 frames of the TS multiplexed frame data of the second set DT2 stored in the memory 11, the corresponding corresponding position (superframe position, frame position in the superframe) , The slot position in the frame and the byte position in the slot are all the same)
Of collated with the data bit units, continue to count all of the number of bits N _T of checking the error bit number N _E became mismatched, respectively from zero. And when T has passed, B
ER = N _E / N _T is calculated, and N _E , N _T ,
Display BER. After one measurement,
Similar processing is repeated for the next T period. As a result, is the reception error amount larger than expected when receiving data transmitted by the combination of TC8PSK and the coding rate of 2/3 in the first superframe immediately after the transmission multiplex configuration has changed halfway? I understand whether or not.

A second set DT2 is designated on the operation panel 14,
If the superframe number SF23 is specified as the target range, the frame position 1 in the superframe is specified, and the slot positions are # 1 to # 20 (or only # 1), the transmission multiplexing is performed in the middle. TC8PSK in the first frame immediately after the configuration change, coding rate 2/3
It can be determined whether or not the reception error amount at the time of receiving the data transmitted by the combination of is larger than expected.

(7) Target: QPSK (coding rate 1/2) modulation part immediately after the transmission multiplexing configuration changes in the middle The second set DT2 is specified on the operation panel 14, and the superframe number SF23 is set as the target range. No frame position is specified in the super frame (all eight frames are targeted), and the slot position is #
21, # 23, # 25, # 27, # 29, # 31, # 3
3, # 35, # 37, and # 39 (slot position #
21), or all or some of the slots are specified (or some may be specified). Also, an appropriate time T is designated as the measurement cycle.

In this case, based on the detection signal input from the timing detection circuit 13, the measurement circuit 15 determines each super frame SF 21, S
F22, SF23, SF24, SF21, SF22, S
The current position (super frame position, frame position in super frame, slot position in frame, byte position in slot) is recognized for F23, SF24, SF21,. Each slot # 21, # 23, # 25, # 27, # 29, # 3 of each frame of the superframe SF23
1, # 33, # 35, # 37, # 39 (slot position #
Extract only the 2nd to 188th bytes (# 21 if only 21 is specified) to the 188th byte (the 2nd to 10th bytes when a part of the slot is specified as a target) and store it in the memory 11 32 of the second set DT2
In the TS multiplexed frame data for the frame, the data at the same corresponding position (the superframe position, the frame position in the superframe, the slot position in the frame, and the byte position in the slot are all the same) are checked in bit units, The number N _{T of} all bits collated with the number N _{E of} mismatched error bits is counted from zero, and the time T
When the time has elapsed, BER = N _E / N _T is calculated, and N _E , N _T , and BER are displayed on the display 16. When one measurement is completed, the same processing is repeated again for the next time T. As a result, is the reception error amount larger than expected when receiving data transmitted by a combination of QPSK and a coding rate of 中 in the first superframe immediately after the transmission multiplex configuration is changed halfway? I understand whether or not.

The user designates the second set DT2 on the operation panel 14, and
The superframe number SF23 is specified as the target range, the frame position 1 in the superframe is specified, and the slot positions are # 21, # 23, # 25, #
27, # 29, # 31, # 33, # 35, # 37, # 3
If 9 is specified (only slot position # 21 may be specified), data transmitted by the combination of QPSK and coding rate 1/2 in the first frame immediately after the transmission multiplexing configuration is changed in the middle is received. It can be determined whether the reception error amount at the time of performing is larger than expected.

(8) Target: BPSK (coding rate 1/2) modulation part immediately after the transmission multiplexing configuration changes on the way The second set DT2 is specified on the operation panel 14, and the superframe number SF23 is set as the target range. No frame position is specified in the super frame (all eight frames are targeted), and the slot position is #
41 and # 45 (only slot position # 41 may be specified), and all or some of the slots are specified (or some may be specified). Also, an appropriate time T is designated as the measurement cycle.

In this case, based on the detection signal input from the timing detection circuit 13, the measurement circuit 15 determines whether each of the superframes SF21, S21 of the TS multiplex frame data RMD is
F22, SF23, SF24, SF21, SF22, S
The current position (super frame position, frame position in super frame, slot position in frame, byte position in slot) is recognized for F23, SF24, SF21,. Bytes 2 to 188 of slots # 41 and # 45 (or # 41 when only slot position # 41 is specified) of each frame of superframe SF23 (part of the slots are specified as targets) In this case, the second byte DT2 stored in the memory 11 is extracted from the second byte to the tenth byte.
Among the S multiplex frame data, the same corresponding position (super frame position, frame position in super frame,
The number of all bits _NT compared with the number of error bits N _{E that} are collated with the data of the slot position in the frame and the byte position in the slot are all the same)
Are counted from zero, and when the time T has elapsed, BER = N _E / N _T is calculated.
Display _E , _NT , BER. When one measurement is completed, the same processing is repeated again for the next time T. As a result, BPSK and coding rate 1/2 in the first superframe immediately after the transmission multiplex configuration is changed on the way.
It can be determined whether or not the reception error amount at the time of receiving the data transmitted by the combination is larger than expected.

A second set DT2 is designated on the operation panel 14, and
If the superframe number SF23 is specified as the target range, the frame position 1 in the superframe is specified, and the slot positions are specified as # 41 and # 45 (only the slot position # 41 may be specified). , BP in the first frame immediately after the transmission multiplexing configuration changes on the way
It can be determined whether or not the reception error amount when receiving data transmitted by the combination of SK and the coding rate 1/2 is larger than expected.

In the above-described embodiment, in order to be able to detect the start timing of the superframe, the measurement data allocated to the main signal of each superframe is represented by numerical values "15", "25", "35". , "45"
However, this is only an example, and a different numerical value is assigned to all 32 frames, or each superframe is assigned the first bit from the second byte of the first slot of the first frame to the last eighth frame. An M-sequence PN code is allocated to the last bit of the 188th byte of the last slot (excluding a dummy slot, the first byte portion of each slot, and additional data portion), and a different pattern is allocated to each superframe. Therefore, the same pattern is 1 in the length of about 1000 bits in four superframes.
Only once, the timing detection circuit 13 may detect the start timing of each super frame from a pattern of 1000 bits length after the second byte of the first slot of each super frame.

Further, the decoder 43 of the receiver under test outputs a frame synchronization detection signal, a superframe identification signal, T
If the measurement circuit 15 has a function of outputting the MCC information signal, the measurement circuit 15 may use these signals to identify the current position of the TS multiplexed frame data RMD. The TS multiplex frame data of DT1 and DT2 to be stored in the memory 11 is set to four superframes.
Other sizes such as 6, 8, and 10 may be used, and three or more sets having various transmission multiplex configurations may be stored. In addition, the transmitter 22 of the signal processing device 20 has P
After the SK modulation, the frequency is converted to the RF frequency. However, the frequency is converted to the IF frequency, and the output of the noise test set 30 is output to the demodulation circuit 42 of the receiver under test.
, The measurement of the reception error amount may be performed.

[0056]

According to the present invention, it is possible to measure a reception error for each combination of a modulation scheme and a coding rate, and it is possible to measure the reception performance in accordance with the actual use situation of the receiver.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of a reception error measurement system according to one embodiment of the present invention.

FIG. 2 is an explanatory diagram of storage contents of a memory in FIG. 1;

FIG. 3 is an explanatory diagram of TS multiplexed frame data stored in a memory in FIG. 1;

FIG. 4 is an explanatory diagram of TS multiplexed frame data stored in a memory in FIG. 1;

FIG. 5 is an explanatory diagram of a conventional reception error measurement method.

FIG. 6 is an explanatory diagram of TS multiplexed frame data according to the hierarchical transmission scheme.

FIG. 7 is an explanatory diagram of a transmission / reception system using a hierarchical transmission scheme.

FIG. 8 is an explanatory diagram showing a configuration example of a transmission frame after PSK modulation.

[Explanation of symbols]

Reference Signs List 10 reception error measurement device 11 memory 12 output circuit 13 timing detection circuit 14 operation panel 15 measurement circuit 16 display 20 signal processing device 30 noise test set 40 receiver to be measured

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Kenichi Shiraishi 1-14-6 Dogenzaka, Shibuya-ku, Tokyo Inside Kenwood Co., Ltd. (72) Soichi Shinshiro 1-14-6 Dogenzaka, Shibuya-ku, Tokyo Kenwood Corporation Inside

Claims (4)

[Claims] 1. A multiplexed frame data composed of a plurality of time slot data and multiplexed frame data by a hierarchical transmission scheme in which a combination of a PSK modulation scheme and a coding rate that are different for each time slot is allowed is transmitted. A reception error measurement system for a receiver which receives and demodulates a modulated transmission signal, decodes the decoded transmission signal, and restores the multiplexed frame data according to the original hierarchical transmission scheme, wherein a predetermined time slot data is included in the reception error measurement system. Multiplexed frame data generating means for generating multiplexed frame data according to a hierarchical transmission method to which data for comparison is allocated; transmission path coding and PSK modulation of the multiplexed frame data; and signal processing means for inputting the multiplexed frame data to a receiver under test. Extract the data of the desired specific part from the multiplexed frame data restored by the receiver under test, A receiving error measuring system, comprising: measuring means for measuring an error amount by checking the corresponding portion of the multiplexed frame data generated by the frame data generating means. 2. The reception error measurement system according to claim 1, wherein the desired specific part is a part or all of data over one or a plurality of slots corresponding to a combination of a desired PSK modulation scheme and a coding rate. 3. A reception error measuring system, wherein the desired specific portion is a part or all of data of a slot immediately after a combination of a PSK modulation scheme and a coding rate changes in multiplexed frame data. . 4. Multiplexed frame data is formed by multiplexing a plurality of time slot data, and multiplexed frame data according to a hierarchical transmission scheme in which a combination of a PSK modulation scheme and a coding rate that are different for each time slot is allowed is used for channel coding and PSK. A reception error measurement system for a receiver which receives and demodulates a modulated transmission signal, decodes the decoded transmission signal, and restores the multiplexed frame data according to the original layered transmission method, wherein the main signal of the time slot data is provided. A multiplexed frame data generating means for generating multiplexed frame data in which a transmission multiplexing configuration is changed in the middle of multiplexed frame data in which a predetermined collation data is allocated to the multiplexed frame data; Signal processing means for encoding and PSK modulation and input to the receiver under test, and restoration by the receiver under test Measuring means for extracting a desired specific portion from the multiplexed frame data immediately after the change of the transmitted multiplexing configuration and comparing the multiplexed frame data with a corresponding portion of the multiplexed frame data generated by the multiplexed frame data generating means to measure an error amount; A reception error measurement system, comprising: