JP3350428B2 - Transmission signal generator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmission signal generator used for digital broadcasting, for example, for performing error correction coding on a synchronizing code and a main signal and transmitting the same .

[0002]

2. Description of the Related Art In recent years, digital satellite television broadcasting has been realized and spread, but the need for hierarchical transmission by time division multiplexing has arisen due to the limitation of the number of transmission paths.

[0003] In the case of time division multiplexing transmission, when the modulation method in time division can be changed, demodulation cannot be performed correctly without recognizing the frame structure, and therefore synchronization determination is essential.

In digital transmission, error correction is indispensable from the viewpoint of changes in transmission paths and improvement of transmission characteristics. Among them, error correction including a synchronization code is particularly required from the viewpoint of easy operation of an error correction circuit. A method of performing correction coding is conceivable.

However, if the synchronization code changes due to error correction coding, the synchronization performance may be degraded. Therefore, in the conventional digital transmission, processing such as not performing encoding on the synchronous portion is performed.

[0006]

As described above, in the conventional digital transmission, when a synchronization code is added to a main signal, error correction coding is performed with the synchronization code.
The performance degradation of the synchronization process becomes a problem.

The present invention solves the above-mentioned problem, and suppresses the performance degradation of the synchronization processing even when the synchronization signal is combined with the error correction code when the synchronization signal is added to the main signal for digital transmission. , an object of the this <br/> to provide a transmission signal generator that can satisfy both the performance and error correction capability of the synchronization process.

[0008]

In order to achieve the above object, a transmission signal generating apparatus according to the present invention has a predetermined configuration.
Synchronization code is multiplexed on the main signal in time division according to the frame structure
Synchronization code multiplexing circuit and the output signal of this circuit
Convolutional code by polynomial G133,171 which is a woven code
Error correction coding circuit that performs transmission processing to generate a transmission signal
And a hexadecimal 1B95h code as the synchronization code.
No. is used.

[0009]

[0010]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 shows a system configuration using a synchronization system according to the present invention. First, on the transmission device side, the synchronization code multiplexing unit 11 multiplexes the main signal S1 and the synchronization code S2 to be transmitted in a time-division manner according to the frame structure shown in FIG. The error correction encoding unit 12 includes a synchronous code multiplexing unit 11
Error correction is performed on the synchronization code + main signal obtained in step (1).
The modulation unit 13 performs modulation processing such as PSK and QAM on the signal that has been error-correction-coded by the error-correction coding unit 12 while changing the modulation method in accordance with the synchronization code and the main signal, and transmits the signal.

On the other hand, on the receiving device side, the demodulation section 21 performs a demodulation operation so that signal processing is possible, and extracts a signal component. The synchronization detection unit 22 detects a synchronization code or a difference between the synchronization codes from the signals extracted by the demodulation unit 21. The synchronization determination unit 23 determines whether the signal detected by the synchronization detection unit 22 is a synchronization signal,
The frame structure is reproduced and returned to the demodulation unit 21.

The synchronization detector 22 performs synchronization detection using a unique part of the synchronization code after error correction. At this time, it is possible to reduce erroneous synchronization detection by selecting a code whose unique part in the signal after error correction coding has a high correlation as the synchronization code S2. .

In the synchronous code + main signal format shown in FIG. 2, when error correction is continuously applied to the synchronous code and the main signal, the original signal component does not remain depending on the type of error correction, making synchronization determination difficult. Become. Hereinafter, the types of the error correction coding scheme will be described.

First, many block codes and the like include systematic codes (to which an original signal and a correction code are added).
In particular, since many convolutional codes include non-systematic codes (which are not the same as the original signal), even if a high correlation is selected before coding, compensation that the synchronization code after coding has high correlation is used. There is no. Example) systematic code (e.g. block code) 135A h → 135A7932 h (= first half is the same reference numerals) a non-systematic code (e.g. convolutional codes) 1B95 h → ××× ECD28 h ( ××× is undefined, no matching portion) Fig. 3 shows an example of a multiplex format of a synchronization code + a header + a main signal. As shown in the figure, synchronization is established particularly when header information indicating each modulation scheme is included after synchronous coding, or when the modulation scheme is time-division multiplexed and a demodulation operation according to the modulation scheme is performed. Otherwise, the error correction itself does not work. For this reason, it is necessary to make a synchronization determination before error correction. However, since the synchronization code is error-correction-coded, there arises a problem that the coded signal does not guarantee synchronization performance.

When synchronization is performed using a synchronization code having low correlation, pseudo synchronization and synchronization loss are repeated at the time of pull-in, so that the pull-in time increases and unstable pull-in occurs, and data reproduction cannot be expected.

Therefore, in the synchronization method of the present invention, not only a code having a high correlation is selected as a synchronization code, but also a code of a part that is unique after error correction coding processing irrespective of signals before and after. , A code having autocorrelation before and after the error correction coding process is selected. This makes it possible to improve synchronization performance.

In this case, in the demodulation process in the receiving device, the synchronization can be determined without performing a correction operation by detecting the unique known portion, and the demodulation operation can be performed by reflecting it in the demodulation operation. It can be stabilized. Of course, the number of synchronization codes is not limited to one as shown in FIG.

Here, the autocorrelation will be described with an example.

As an example, when the correlation of an 8-bit code is considered, the code is regarded as a cyclic code (it goes around once when shifted, and the subsequent bit is brought forward), and compares the bit sequence shifted with itself. , And count the number of matching bits. As an example, FIG. 4 shows an 8-bit 11101111 code string.

In this case, the same bit is 4 out of 8 bits.
The smaller the number of bits, the smaller it can be determined that the synchronization is shifted (incorrect), so that the possibility of erroneous synchronization is reduced. Therefore, a bit sequence having a small number of matching bits in the bit sequence shifted by itself is preferable as the synchronization code.

The same operation is performed for all of the 8-1 = 7-bit shift amounts except for itself, the number of matching bits is counted, and the smaller number is regarded as a code having a high autocorrelation.

[0023] convolutionally encoding the synchronization code 1B95h (16 bits) in polynomial G133,171, by coding, a ××× ECD28 h (32-bit) code.
However, convolutional coding is partially uncertain due to the values of the preceding and succeeding data strings (the above-mentioned XXX part). Therefore, attention is paid only to the unique ECD28 h (20 bits) portion regardless of the preceding and following signs.

An analysis of the unique code ECD28h after convolutional encoding of 1B95h according to the present invention reveals that when 1, 2, 10, 18, and 19 bits are shifted, the coincident code is 8 bits. It has been verified that it has 10 bits, is less likely to cause erroneous synchronization, and has a high correlation.

[0025]

As described above, according to the present invention, when a synchronization signal is added to a main signal and digitally transmitted, even if error correction coding is performed with the synchronization code, the performance of the synchronization processing is degraded. A transmission signal generation device that can suppress synchronization and satisfy both synchronization processing performance and error correction processing capability
It can be.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a system using a synchronization system according to the present invention.

FIG. 2 is a diagram showing an example of a transmission format according to the present invention.

FIG. 3 is a diagram showing an example of another transmission format according to the present invention.

FIG. 4 is a diagram for explaining autocorrelation in the synchronization method of the present invention.

[Explanation of symbols]

11: Synchronous code multiplexing unit, 12: Error correction coding unit, 13
... A modulation section, 21 a demodulation section, 22 a synchronization detection section, 23 a synchronization determination section.

Continuation of the front page (56) References JP-A-9-27800 (JP, A) JP-A-62-291757 (JP, A) JP-A-8-149172 (JP, A) JP-A-8-65289 (JP, A) JP-A-4-342314 (JP, A) JP-A-62-264743 (JP, A) JP-A-60-237740 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB Name) H04L 7/08 H04J 3/06 H04L 7/00 H03M 13/33

Claims (1)

(57) [Claims] 1. A synchronization code multiplexing circuit for multiplexing a synchronization code on a main signal in a time-division manner according to a predetermined frame structure , and a polynomial G13 which is a non-systematic code in an output signal of the circuit.
3. A transmission signal generating apparatus, comprising: an error correction coding circuit that generates a transmission signal by performing a convolutional coding process according to 3,171 , wherein 1B95h in hexadecimal is used as the synchronization code.