JPH11112395A - Equalizer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a receiver which does not require waveform equalizers as many as branches and is free of deterioration in communication quality irrelevantly to momentary variation of communication characteristics by performing diversity synthesis in a decision feedback type equalizer. SOLUTION: Receive signals of systems 1 and 2 are passed through FF filter parts 53 and 54 and amplitude multipliers 57 and 58 and added by an adder 59, and at the same time both the amplitudes are compared to supply a coefficient corresponding to their ratio to both the multipliers. The output of the adder 59 is sent to a decision part 60, an error estimation part 63, and an output terminal 65. The decision unit 60 selects and sends the output of a reference signal memory 61 when the input is a known symbol or the output of the decision unit 60 when not to the error estimation unit 63 and an FB filter part 55. The error estimation unit 63 sends the error included in the output of the adder 59 to a tap coefficient update unit 64. The tap coefficient update unit 64 operates algorithm so that the error converges to '0', thereby updating the total number of the taps of the FF filter part 53 and 54 and the FB filter part 55.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a demodulator including a waveform equalizer for realizing diversity reception in digital communication.

[0002]

2. Description of the Related Art In land mobile communication, usually non-line-of-sight communication is performed, and a received wave has complicated characteristics composed of multiple waves that have undergone many reflections, diffractions, and scatterings.
Furthermore, when the mobile station moves in such a situation, the communication characteristics of the propagation path fluctuate instantaneously, deteriorating the communication quality. It is known that the fluctuation of the amplitude characteristic generally follows a Rayleigh distribution, and this phenomenon is called Rayleigh fading.

[0003] Diversity is generally used as a measure against the degradation of communication quality due to Rayleigh fading, particularly an instantaneous fluctuation in amplitude. Diversity refers to a signal received via a plurality of statistically independent propagation paths (multiple propagation paths).
This is a technique of selecting or combining signals having high received power from among (each signal is called a branch), thereby reducing the probability that the received power is reduced, thereby suppressing the influence. Diversity is classified into antenna diversity, directional diversity, polarization diversity, and the like according to a method of obtaining an independent received signal. In addition, the received signal is classified into a selection type, an equal gain combination type, a maximum ratio combination type, and the like according to an independent reception signal combination method. Here, each synthesis method will be briefly described.

FIG. 2 is a block diagram of a selective diversity. 11 is a 1-system reception signal input terminal, 12 is a 2-system reception signal input terminal, 13 and 14 are power measuring devices, 15 is a comparator, 16 is a selector, 17 is a selective diversity device, and 18 is a diversity output terminal. . In FIG. 2, a 1-system reception signal input terminal
The received signal input from 11 is sent to the input of the selector 16 and at the same time to the power measuring device 13. The power meter 13
Calculates the power of the input 1-system reception signal, and sends the power value to the comparator 15. On the other hand, 2 obtained independently of the 1-system reception signal
The system reception signal is sent to the input of the selector 16 and the power measurement device 14 via the system 2 reception signal input terminal 12. The power measuring device 14 calculates the power of the input system 2 reception signal, and sends the power value to the comparator 15. The comparator 15 compares the input power values of the first and second systems and sends the result of the comparison to the switching terminal of the selector 16. The selector 16 is
Based on the comparison information sent from the comparator 15, the input signal having the larger power value is selected and output via the diversity output terminal 18. By adopting such a configuration, even if the power of the received signal is reduced due to fading, it is possible to reduce the probability that the communication quality will be degraded by selecting a received signal of a higher power system.

FIG. 3 is a block diagram of the maximum ratio combining type diversity. Reference numerals 11 to 14 are the same as those in FIG. Also, 20 and 21 are gain estimators, 22 and 23 are amplitude multipliers, 24 is a phase controller, 25 and 26 are phase shifters, 27 is an adder, 29
Is a diversity output terminal. In FIG. 3, the received signal input from the first-system received signal input terminal 11 is sent to the power measuring device 13, the phase controller 24, and the phase shifter 25. Similarly, the reception signal input from the second-system reception signal input terminal 12 is
The power is sent to the power measuring device 14, the phase controller 24, and the phase shifter 26. The phase controller 24 compares the phases of the two input signals (the first-system reception signal and the second-system reception signal), and adjusts the first-system signal and the second-system signal to the respective necessary phases in order to align these phases. The phase shifter 25 and the phase shifter
Send to 26. The phase shifter 25 shifts the phase of the 1-system received signal based on the phase compensation value sent from the phase controller 24 and sends it to the amplitude multiplier 22. Further, the phase shifter 26
Based on the phase compensation value sent from the phase controller 24, the phase of the second system received signal is shifted to
Send to On the other hand, the power value of the 1-system received signal input to the power measuring device 13 is obtained, and the obtained power value is sent to the gain estimator 20. The gain estimator 20 estimates a gain based on the transmitted signal power, and sends the obtained gain value to the amplitude multiplier 22. The amplitude multiplier 22 adds the signal (phase-compensated signal) input from the phase shifter 25 to the gain estimator 20.
Are multiplied by the signal (gain value) input from the, and sent to the adder 27. The power value of the second-system reception signal input to the power measuring device 14 is obtained, and the obtained power value is sent to the gain estimator 21. The gain estimator 21 estimates a gain based on the transmitted signal power, and sends the obtained gain value to the amplitude multiplier 23. The amplitude multiplier 23 multiplies the signal (phase-compensated signal) input from the phase shifter 26 by the signal (gain value) input from the gain estimator 21 and sends the multiplied signal to the adder 27. The adder 27 combines the input first-system signal and second-system signal and outputs the combined signal via a diversity output terminal 29. The above-described gain estimator 20 for the first system and the gain estimator for the second system are used.
In 21, a gain that maximizes the signal-to-noise ratio of the combined signal by the adder 27 is estimated based on the signal power values obtained from the power measuring devices 13 and 14 of the respective systems. In this way, the maximum ratio combining type diversity reduces the effects of fading by combining the phases of the independently obtained received signals and combining them at a ratio that maximizes the signal-to-noise ratio. is there. The amplitude multipliers 22 and 23
In this method, equal gain combining diversity is a method in which the coefficients are made equal and combining is performed at an equal ratio.

Incidentally, since the propagation paths constituting the above-described multiplex propagation path have different propagation path lengths, the arrival time at the receiving point varies. The degree of this variation is called delay spread (or delay dispersion). Diversity is effective when the delay spread is sufficiently smaller than the transmission time per symbol. However, when the delay spread is large due to the geographical conditions of the communication channel, intersymbol interference occurs and the communication quality deteriorates. cause. Therefore, only diversity provides a small effect of compensating for intersymbol interference, and it is necessary to use a waveform equalizer represented by a decision feedback equalizer or a Viterbi equalizer. Among them, the decision feedback equalizer has features such as being generally applicable to many modulation schemes and a simpler algorithm than a Viterbi equalizer, and is often used as a countermeasure for delay spread.

Hereinafter, the waveform equalizer will be described. FIG.
FIG. 3 is a diagram illustrating the operation of a decision feedback equalizer, which is a type of waveform equalizer. 31 is a digital reception signal input terminal, 32
And 33 are delay elements, 34 and 34 'are multipliers, 35 is an adder, 36 is a determiner, 37 is a reference signal memory, 38 is a switcher, 39 is an error estimator, 40 is a tap coefficient updater, 41 is Equalization output terminal, 42
Is a feedforward filter unit (FF filter unit),
43 is a feedback filter unit (FB filter unit), 44
Is a waveform equalization filter. In FIG. 4, the delay element 33
Has a delay time Ts that is equal to the transmission interval time of one symbol, and the delay element 32 has an integer fraction of the delay time of the delay element 33.
It has a delay time Tp (usually one half). The FF filter section 42 is of a transversal type and includes a delay element 32 and a multiplier 34.
The FB filter unit 43 is also a transversal type, and includes a delay element 33 and a multiplier 34 ′. The waveform equalization filter 44 includes the FF filter unit 42, the FB filter unit 43, and the adder 35. Consists of The multiplier 34 has complex coefficients F _-j , F _{-j + 1} ,...
₀ are set, and the multiplier 34 'has tap coefficients B ₁ ,
B _2, ···, B _K is set respectively.

The received signal sampled at the sampling interval Tp is input to a digital received signal input terminal 31,
The signal is sent to the delay element 32 of the FF filter unit 42 of the waveform equalization filter 44, and is sequentially multiplied by the multiplier 34 with each tap coefficient. At the same time, the output of the switch 38 is the FB filter section.
43, and similarly multiplies with each tap coefficient by the multiplier 34 '. The results of these multiplications are all sent to the adder 35 and added. This signal is sent to the decision unit 36 and the error estimator 39 and is taken out from the equalization output terminal 41 at the same time. The determiner 36 determines which symbol the input signal is, and sends the symbol of the determination result to one of the inputs of the switch. In digital communication, a fixed symbol sequence is usually inserted for the purpose of synchronization or the like. This symbol sequence is also known to the receiving side, and the symbol sequence is stored in the reference signal memory 37 as a reference signal. The switch 38 normally selects the output of the determiner 36 and selects the output of the reference signal memory 37 only during the time when the transmission symbol is known. This output is sent to the FB filter unit 43 and the error estimator 39 described above. The error estimator 39 estimates the error of the output of the waveform equalization filter 44 based on this signal and sends it to the tap coefficient updater 40. The tap coefficient updater 40 individually updates all tap coefficients of the waveform equalization filter 44 as needed so that the input estimation error converges to "0". When the above operation is repeated, the tap coefficient is updated so that the waveform equalization filter 44 removes the intersymbol interference component, and the signal extracted from the equalization output terminal 41 is affected by the code interference due to the delay spread. It will be reduced. Also,
In the tap coefficient updater 40, an adaptive algorithm is used for updating the coefficients. Representative examples include a steepest gradient method, a least mean square (LMS) method, and a recursive least squares (RLS) method. is there.

As a known symbol sequence stored in the reference signal memory 37, a synchronization symbol is generally used. FIG. 10 shows an example of a frame data structure used in digital communication. In digital communication, usually, in addition to the symbol sequence corresponding to the information bit sequence to be transmitted,
A synchronization word having a fixed symbol pattern is inserted mainly to establish various types of synchronization, and transmitted in fixed-length units called frames in which these are combined. Therefore, when this synchronization word is sent, that is, the head of the first frame has already been searched, the switch 38 is operated by searching and ending the head frame.

FIG. 7 shows the decision unit 36 and the error estimator of FIG.
FIG. 39 is a diagram for explaining an example of the operation 39 by the QPSK modulation method, where the horizontal axis is the in-phase component I and the vertical axis is the quadrature component Q. I-
The black dots on the Q plane are symbols and × points
a, b, ‥‥‥, h are coordinates on the IQ plane of the input signals a, b, ‥‥‥, h input to the decision unit 36. now,
Assuming that a is input to the determiner 15, the determiner 36 detects a coordinate x point a of the input a on the IQ plane, and the detected coordinate is in the first quadrant of the IQ plane. Output a symbol. Similarly, the determiner 36 has inputs b, c,
A symbol is output when the input is d, a symbol is output when the input is e or f, a symbol is output when the input is g, and a symbol is output when the input is h. Next, the error estimator 39 calculates the difference between the symbol sent from the determiner 36 after symbol determination and the signal sent from the adder 35. Input to tap coefficient updater 40. For example, adder 35
When the output from is a, from the error estimator 39,
Ea in FIG. 7 is output. Similarly, when the output from the adder 35 is b, c, ‥‥‥, h, the error estimator 39 outputs Eb, Ec, ‥‥‥, Eh in FIG.

In order to realize high accuracy of compensation for distortion of propagation path characteristics, it is effective to use a combination of diversity and a waveform equalizer. This combined technique is described below.

First, the method of equalizing the waveform of the signal after the selective diversity is considered to be the easiest in configuration. FIG. 8A is a schematic block diagram showing an example in which a waveform equalizer is provided at the subsequent stage of the selective diversity, in which a waveform equalizer 45 is connected after the selective diversity 17 in FIG. However, the waveform equalizer normally converges the tap coefficients initially using the reference signal arranged at the beginning of the frame, and operates normally under the condition that the fluctuation of the propagation characteristics within the frame is constant or sufficiently moderate. If there is a discontinuity in the characteristics of the input signal within the frame, it cannot be followed. Therefore, the timing of switching the selection of the diversity is usually in the unit of frame time, and there is a problem that it is not possible to appropriately cope with the fading fluctuation faster than this.

There is also a method of equalizing the waveform of the signal after the combining type diversity. FIG. 8B is a schematic block diagram showing an example in which a waveform equalizer is provided at the subsequent stage of the maximum ratio combining type diversity, in which a waveform equalizer 45 is connected after the maximum ratio combining type diversity 28 in FIG. is there. However, this method has the advantage that no discontinuity occurs unlike the selective type and that the diversity gain is greater than that of the selective type, but in the case of fast fading, phase compensation between branches is very difficult. Was.

From the above, it is a general method to individually perform waveform equalization on each branch input and perform diversity on the output. FIG. 9 is a schematic block diagram of an example in which a waveform equalizer is provided at a preceding stage and a maximum ratio combining type diversity is connected at a subsequent stage. In this case, the number of waveform equalizers required is equal to the number of branches, but the phase compensation that was necessary when performing combining diversity at the subsequent stage can be performed by the waveform equalizer, and discontinuities such as selection switching Does not occur, phase compensation in the combining type diversity section is unnecessary, fading fluctuation can be dealt with, and the diversity gain is large.

[0015]

The above-mentioned prior art includes the following:
There is a problem that a waveform equalizer composed of a large amount of computation or large-scale hardware is required as many as the number of branches, and it is difficult to optimize the synthesis ratio of each waveform equalized output. There is a disadvantage that performance is deteriorated when the speed is very high. SUMMARY OF THE INVENTION An object of the present invention is to provide a receiver that eliminates the above-mentioned drawbacks and does not deteriorate communication quality regardless of instantaneous fluctuations in communication characteristics.

[0016]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides diversity combining in a decision feedback equalizer.

[0017]

FIG. 1 is a block diagram showing a configuration of a diversity equalizer according to the present invention. 51 is a 1-system reception signal input terminal, 52 is a 2-system reception signal input terminal, 53 is a 1-system feedforward filter unit (FF filter unit), 54 is a 2-system feedforward filter unit (FF filter unit), and 55 is a feedback filter. Unit (FB filter unit), 56 is a synthesis ratio controller, 57 is a 1 system amplitude multiplier, 58 is a 2 system amplitude multiplier,
59 is an adder, 60 is a determiner, 61 is a reference signal memory, 62 is a switcher, 63 is an error estimator, 64 is a tap coefficient updater, and 65 is an output terminal.

In FIG. 1, the system 1 reception signal is sent to a system 1 FF filter unit 53 and a combining ratio controller 56 through a system 1 reception signal input terminal 51, and a system 2 reception signal is input to a system 2 reception signal input terminal 51. The signal is sent to the second system FF filter section 54 and the synthesis ratio controller 56 through 52. The FF filter units 53 and 54 have a structure in which the feedback filter unit (FB filter unit) 43 is removed from the waveform equalization filter 44 described in FIG. The output of the first system FF filter unit 53 is sent to a multiplier 56, and the output of the second system FF filter unit 54 is sent to a multiplier 57. Further, the synthesis ratio controller 56 includes:
The amplitudes of the input system 1 reception signal and the system 2 reception signal are compared, and a coefficient corresponding to the ratio of the amplitudes is compared with the multipliers 57 and 58.
Send to Accordingly, the multiplier 57 multiplies the input signal by the coefficient given from the synthesis ratio controller 56 and sends the signal to the adder 59. Similarly, the multiplier 58 multiplies the input signal by a coefficient provided from the synthesis ratio controller 56 and sends the multiplied signal to the adder 59. The adder 59 is a 1-system multiplier
The signal sent from 57 and the signal sent from the multiplier 58 of the second system are added, and the added value is sent to the decision unit 60, the error estimator 63, and the output terminal 65. The determiner 60,
Symbol determination is performed from the input signal according to the modulation scheme, and the result is input to the switch 62. (For example, the QPSK modulation method has been described in FIG. 7 of the conventional example.) The reference signal memory 61 stores a known symbol sequence included in a transmission symbol. If the input at the time is a known symbol, the switch 62
In the other case, the output of the decision unit 60 is selected and the result is sent to the error estimator 63.
Send to 55. The error estimator 63 calculates an error included in the output of the adder 59 based on the signal sent from the switch 62, and sends the error value to the tap coefficient updater 64.
The tap coefficient updater 64 operates the algorithm so that the calculation error converges to “0”, and
All the tap coefficients of the filter unit 53, the 2-system FF filter unit 54, and the FB filter unit 55 are updated at one time. The FB filter unit 55 converts the signal input from the switch 62 into a value based on the constantly updated tap coefficient, and sends it to the adder 59. Similarly, the first system FF filter unit 53 and the second system FF filter unit
The tap coefficient of 54 is also updated, and a value based on the updated tap coefficient is sent to the adder 59. The F
The B filter unit 55 is provided from the waveform equalization filter 44 described in FIG.
(FF filter section) is of a structure excluding 42. As described above, the adder 59 has the delay spread of the system 1 and system 2 reception signals input from the system 1 reception signal input terminal 51 and the system 2 reception signal input terminal 52. The signals that cancel out the effects are the FF filter units 53 and 54 and the FB
Since the signal is sent from the filter unit 55, the output signal of the adder 59 is one from which the delay spread has been removed. And
The signal from which the delay spread has been removed is sent to the output terminal 65,
The output terminal 65 outputs the transmitted signal as an equalized output.

FIG. 1 shows the case where the number of branches is two. However, even if the number of branches exceeds this, it can be dealt with by increasing the number of FF filters. Further, the synthesis ratio controller 56
And the amplitude multipliers 57 and 58, the synthesis by the adder 59,
A normal operation can be performed simply by removing these elements and simply performing equal ratio synthesis.

As described above, according to the present invention, since one waveform equalizing filter is constituted by the same number of FF filter units and one FB filter unit as the number of branches, as shown in FIG. It is characterized in that the coefficients of the taps are not updated for each optimization filter, but the coefficients of all taps are updated collectively.

FIG. 5 shows an embodiment in which the present invention is applied to a diversity receiver having two branches. 101 is a 1-system reception signal input terminal, 102 is a 2-system reception signal input terminal, 103 is a 1-system AG
C and 104 are 2 system AGC, 105 is 1 system synchronous detector, 106 is 2
A system synchronous detector, 107 is an A / D converter for the 1-system in-phase component, 108
Is a 1-system quadrature component A / D converter, 109 is a 2 system in-phase component A / D converter, 110 is a 2 system quadrature component A / D converter, 111
Is a reception filter for the 1-system in-phase component, 112 is a reception filter for the 1-system quadrature component, 113 is a reception filter for the 2 system in-phase component, 114
Is a reception filter for orthogonal components of the 2 system, 115 is a diversity waveform equalizer, 116 is a decoder, and 117 is a decoding output terminal.

In FIG. 5, a signal received on one of the two branches is sent to a first-system received signal input terminal 101 and
It is sent to the AGC 103. The first-system AGC 103 compensates for fluctuations in the amplitude of the input signal, and inputs the compensated signal to the first-system synchronous detector 105. At the same time, the first system AGC 103 sends information on amplitude compensation to the diversity waveform equalizer 115. The 1-system synchronous detector 105 synchronously detects the input signal, converts the signal into a baseband signal including an in-phase component I and a quadrature component Q, and converts the in-phase component I into an A / D converter of the 1-system in-phase component. 107 and the quadrature component Q
The in-phase component is sent to the A / D converter 108. The 1-system in-phase component A / D converter 107 converts the input in-phase component I of the baseband signal into a digital signal and sends it to the 1-system in-phase component reception filter 111. The reception filter 111 removes unnecessary frequency components and sends a signal from which the unnecessary frequency components have been removed to the diversity waveform equalizer 115. The first-system quadrature component A / D converter 108 converts the input quadrature component Q of the baseband signal into a digital signal and sends it to the first-system quadrature component reception filter 112. The reception filter 112 removes unnecessary frequency components, and sends a signal from which the unnecessary frequency components have been removed to the diversity waveform equalizer 115.

The signal received by the other of the two branches is sent to the second-system received signal input terminal 102, and is sent to the diversity waveform equalizer 115 after performing exactly the same processing. The diversity waveform equalizer 115 performs waveform equalization according to the present invention, and sends the in-phase component and the quadrature component of the waveform-equalized signal to the decoder 116. The decoder 116 decodes the in-phase component and the quadrature component of the transmitted signal according to the modulation scheme of the receiver, and outputs the decoded data via the decoding output terminal 117.

FIG. 6 is a block diagram showing an example of the configuration of a diversity waveform equalizer when a recursive least squares (RLS) method is used as a tap update algorithm in another embodiment of the present invention. 115 is a diversity waveform equalizer, 121 is a 1-system signal in-phase component input terminal, 122 is a 1-system signal quadrature component input terminal, 1
23 is a system 1 signal amplitude information input terminal, 124 is a system 2 signal in-phase component input terminal, 125 is a system 2 signal quadrature component input terminal, and 126 is 2
System signal amplitude information input terminal, 127 is an amplitude distribution controller, 128 is a 1 system amplitude multiplier, 129 is a 2 system amplitude multiplier, 130 is a 1 system feedforward (FF) filter, 131 is a 2 system feedforward (FF) Filter, 132 is feedback (FB)
Filter, 133 is an adder, 134 is a determiner, 135 is a reference signal memory, 136 is a switcher, 137 is a subtractor, 138 is an RLS tap coefficient updater, 139 is an in-phase component output terminal, and 140 is a quadrature component output terminal. is there.

In FIG. 6, a double straight line indicates a connection of a complex signal. 1-system signal amplitude information input terminal 12
The 1-system signal input from 3 is input to the amplitude distribution controller 127. In addition, the second-system signal input from the second-system signal amplitude information input terminal 126 is also input to the amplitude distribution controller 127. The amplitude distribution controller 127 compares the inputted amplitude information of the first and second systems to determine an appropriate distribution ratio for synthesizing the signals of the first and second systems, and determines the appropriate distribution ratio for the first and second systems. The coefficient value for multiplying the signal of each system is transmitted to the amplitude multiplier 129. 1-system signal in-phase component input terminal 121 and 1-system signal quadrature component input terminal 1
The signal input from 22 is sent to the 1-system amplitude multiplier 128. The 1-system amplitude multiplier 128 multiplies the input signal by a coefficient value determined by the amplitude distribution controller 127, and
This is sent to the filter unit 130 and the RLS tap coefficient update unit 138. The F
The F filter 130 performs a filtering process on the input signal with a predetermined tap coefficient, and outputs the output to an adder 133.
Send to Similarly, signals input from the second-system signal in-phase component input terminal 124 and the second-system signal quadrature component input terminal 125 are sent to the second-system amplitude multiplier 129. The second-system amplitude multiplier 129 multiplies the input signal by a coefficient value determined by the amplitude distribution controller 127 and sends the multiplied signal to the FF filter unit 131 and the RLS tap coefficient update unit 138. The FF filter unit 131 performs a filter process on the input signal using a predetermined tap coefficient, and sends the output to the adder 133. The adder 133
Represents the input signals of the first and second systems and F
Another signal input from the B filter unit 132 is synthesized and sent to the decision unit 134 and the subtractor 137, and also sent to the in-phase component output terminal 139 and the quadrature component output terminal 140. The judgment device 13
4 performs symbol determination according to the modulation scheme, and the symbol based on the symbol determination is sent to the input of the switch 136. The reference signal memory 135 stores a known symbol inserted in the transmitted symbol as a reference signal, and the reference signal is sent to the input of the switch 136. The switching unit 136 normally selects the output of the decision unit 134, selects the output (input) of the reference signal memory 135 only for the time when the transmission symbol is a known one, and compares it with the FB filter unit 132 and the It is sent to the RLS tap coefficient updater 138 and the subtractor 137. The FB filter unit 132 performs a filter process on the input signal using a predetermined tap coefficient, and sends the output to the adder 133.
The subtracter 137 is based on the output of the switch 136,
An error signal included in the output of the adder 133, which is the output of the waveform equalization filter constituted by the two FF filter units 130 and 131 and the FB filter unit, is detected. Send to tap coefficient updater 138.
The RLS tap updater 138 controls the waveform equalization filter (F
Based on the three types of complex signals input to the F filter sections 130 and 131 and the FB filter section 132), the RLS algorithm determines the tap coefficient update value so that the error signal converges to "0". Set the tap coefficient of the filter section. Thus, the diversity waveform equalizer 115 outputs the output of the adder 133 as a result of the waveform equalization, the output in-phase component from the in-phase component output terminal 139, and the output quadrature component from the quadrature component output terminal 140.

[0026]

As described above, according to the present invention, phase compensation between branches required for combining diversity can be performed on the waveform equalizer side, and waveform equalization can be performed with respect to the delay spread of the propagation path. Therefore, it is possible to realize a receiver capable of withstanding a poor propagation environment in which fading and delay spread are large and communication characteristics fluctuate instantaneously.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a diversity equalizer according to the present invention.

FIG. 2 is a block diagram of a conventional selective diversity.

FIG. 3 is a block diagram of a conventional maximum ratio combining type diversity.

FIG. 4 is a block diagram showing a configuration of a conventional decision feedback equalizer.

FIG. 5 is a block diagram showing an embodiment of the present invention.

FIG. 6 is a block diagram showing a configuration of a diversity waveform equalizer in FIG. 5;

FIG. 7 is a view for explaining operations of a decision unit and an error estimator according to a QPSK modulation scheme.

FIG. 8 is a schematic block diagram showing an example in which a waveform equalizer is connected at the subsequent stage of diversity.

FIG. 9 is a schematic block diagram of an example in which a maximum ratio combining type diversity is connected to the subsequent stage of the waveform equalizer.

FIG. 10 is a diagram showing a frame configuration according to the related art.

[Explanation of symbols]

11: 1 system reception signal input terminal, 12: 2 system reception signal input terminal, 13, 14: power measuring device, 15: comparator, 16: selector, 17: selection type diversity device, 18: diversity output terminal, 20 , 21: gain estimator, 22, 23: amplitude multiplier, 24: phase controller, 25, 26: phase shifter, 27: adder, 29: diversity output terminal, 31: digital reception signal input terminal, 32, 33: delay element, 34, 34 ': multiplier, 35: adder, 36: determiner, 37: reference signal memory, 38: switcher, 39: error estimator, 40: tap coefficient updater, 41: etc. Output terminal, 42: feed forward filter unit (FF filter unit), 43: feedback filter unit (FB filter unit), 44: waveform equalization filter, 45: waveform equalizer, 51: 1 system reception signal input terminal, 52: 2 system reception signal input terminal, 53: 1 system feedforward filter unit (FF unit) ), 54: 2-system feedforward filter (FF filter), 55: feedback filter (FB filter), 56: synthesis ratio controller, 57, 58: amplitude multiplier, 59: adder, 60: judgment , 61: reference signal memory, 62: switcher, 63: error estimator, 64: tap coefficient updater, 65: output terminal,
101: 1 reception signal input terminal, 102: 2 reception signal input terminal, 1031 AGC, 104: 2 AGC, 105:
1 system synchronous detector, 106: 2 system synchronous detector, 107: 1 system in-phase component A / D converter, 108: 1 system quadrature component A / D
D converter, 109: 2 system in-phase component A / D converter, 11
A: D converter for 0: 2 system quadrature component, 111: 1 system in-phase component reception filter, 112: 1 system quadrature component reception filter, 113: 2 system in-phase component reception filter, 114: 2 system quadrature component Receive filter, 115: Diversity waveform equalizer, 116: Decoder, 117: Decoding output terminal, 121:
1 system signal in-phase component input terminal, 122: 1 system signal quadrature component input terminal, 123: 1 system signal amplitude information input terminal, 124:
2 system signal in-phase component input terminal, 125: 2 system quadrature component input terminal, 126: 2 system amplitude information input terminal, 127: amplitude distribution controller, 128, 129: amplitude multiplier, 130, 131: feed forward filter unit ( FF filter), 132: feedback filter (FB filter), 133: adder, 134: determiner, 135: reference signal memory, 136: switcher, 137: subtractor, 138: RLS tap coefficient updater, 139: In-phase component output terminal, 140: Quadrature component output terminal,

Claims (6)

[Claims] In a digital communication system in which a plurality of reception systems are provided and the effect of fading is reduced by diversity and good communication quality is obtained, a transversal filter is used for each of reception signals input to each of the plurality of reception systems. First filtering processing means for performing processing;
Means for adding all the signals subjected to the first filtering processing, means for determining a symbol of the added signal, and second filtering processing for performing a transversal-type filter processing on the symbol-determined signal Means for returning the signal subjected to the second filtering process to the adder, adding the signal by the adder, and determining the symbol by the symbol determining means for the added signal and the added signal. Means for estimating an error with respect to the first and second signals, and
An equalizer comprising: means for updating the tap coefficients of the filtering processing means and the second filtering processing means, wherein the effect of delay spread of the propagation path is reduced together with the diversity processing. 2. The method according to claim 1, wherein the first
Means for changing the power levels of the signals processed by the filtering processing means, and the changing means is controlled by the relative magnitude of the power level of each of the received signals input to each of the plurality of receiving systems. An equalizer characterized in that: 3. The invention according to claim 1, further comprising: means for changing a power level of each of the received signals input to each of the plurality of receiving systems, wherein the changing means is provided for each of the plurality of receiving systems. An equalizer characterized in that it is controlled by the relative magnitude of the power level of each input received signal. 4. The invention according to claim 1, wherein a recursive least squares method is used as an algorithm applied to the means for updating the tap coefficients of the first and second filtering processing means. And an equalizer. 5. The invention according to claim 1, wherein said means for storing a reference signal and any one of a reference signal output from said storage means and an output from said symbol determination means are switched as needed. An input means for inputting the error to the error estimating means. 6. The equalizer according to claim 5, wherein said reference signal is a known symbol sequence.