JPH10333630A - Driving method and driving circuit for image display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device, in which such underscanning display that an value for a total row number from a vertical side display start position to the next vertical side display start position to be enlarged at a given enlargement ratio is smaller than a row number in the liquid crystal display device shows written rows being the same between an odd-number display field and an even-number display field in the loop-back area of a display field and prevents the occurrence of not-written rows, when enlargement display is performed by an interlaced scanning. SOLUTION: A display field final row enlargement pattern detector 5 detects in which pattern of enlargement patterns selected outside the final row of a display field is completed in a loop-back area between display fields. In accordance with its result, the driving waveform of a driving signal from a vertical driver for which a loop-back controller between display fields 8 controls enlargement display is changed to keep interlaced scanning in a regulating property.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and a circuit for driving an image display device, and more particularly, to a method for driving a liquid crystal display device or the like which enables display of various resolutions in response to video signals of various resolutions of a computer. And in the drive circuit,
The present invention relates to a driving method and a driving circuit for performing enlarged display in the vertical direction.

[0002]

2. Description of the Related Art Video signals sent from a personal computer have various resolution standards. A CRT display that has been mainly used in the past can easily cope with video signals of various resolutions by changing the horizontal and vertical synchronization frequencies, but has a fixed number of lines and pixels as in a liquid crystal display panel. In a display, the size of a display screen changes depending on the resolution of a video signal in a simple display. Therefore, an enlarged display process is required to display the entire liquid crystal display panel.

The resolution of the liquid crystal driving device is 1600 (rows)
× 1200 (line) dots (UXGA standard) or 1
280 x 1024 dots (SXGA standard) or 1
In a high-resolution liquid crystal display device such as 024 × 768 dots (XGA standard), a method of realizing a vertically enlarged display without using an expensive frame memory for cost reduction has been considered. An enlargement pattern having a predetermined enlargement ratio is selected, and a vertical driver shift clock, which is a drive signal of a vertical driver of the liquid crystal display device, is set to a one-to-one predetermined ratio from a one-to-one ratio to the number of rows of input signals. The magnification can be increased to the ratio of "enlargement ratio".

FIG. 8 shows an example of an enlargement pattern corresponding to an enlargement ratio. A portion surrounded by a thick frame represents one cycle of the enlargement pattern, and thereafter, enlargement display is performed according to this cycle. The alphabet is a symbol tentatively described in the order of A, B,... From the beginning of the input video data for the period of the enlarged pattern. Further, a portion written with a dotted line in the middle indicates that the same input data is displayed over two lines.

[0005] Each enlargement factor is a value determined in order to enlarge the video data input to the liquid crystal display device and display all the data on the display screen without missing.
Therefore, when there is a fraction, the display area is narrowed by the fraction, and a blank portion of the fraction is filled with data of an invalid (INVALID) period which is a normal black display level of video data and displayed. A display method in which the display area is equal to or less than the total number of rows of the liquid crystal panel and the blank portion is filled with black data is called underscan display.

For example, as shown in FIG.
The double enlargement pattern means that ten rows of data are displayed on eleven rows of pixels, and corresponds to, for example, displaying SXGA video data on a liquid crystal display device having UXGA resolution. The number of lines of the original SXGA video signal is 1.
An image is displayed by increasing the number of scanning lines by one time. Similarly,
As shown in FIG. 8B, the 1.2-fold enlarged pattern is
This means displaying XGA video data on a liquid crystal display device having SXGA resolution.

[0007] In the case of a 1.1-fold example in which SXGA video data is displayed on a UXGA liquid crystal display device, among the 1200 lines of the UXGA liquid crystal display device, 10 lines of valid video data are selected.
The 24 lines are enlarged by 1.1 times to display 1126 lines, but the remaining 74 lines, which are fractions, are filled with invalid (INVALID) period data so that the display area is centered. The display is divided into 37 lines and 37 lines on the lower side. Displaying the display area in the center in this manner is called centering processing.

Further, in the case of a 1.2-times example in which XGA video data is displayed on an SXGA liquid crystal display device, a signal of 768 lines of effective video data is enlarged by 1.2 times, and
Displayed on line 21. The blank portion of the remaining 103 lines displays the data of the invalid (INVALID) period, and is displayed separately such that the upper 50 lines and the lower 51 lines are arranged so that the display area is at the center.

Although the above two examples are examples in which underscan display is performed, there are examples in which underscan display is not performed. This is a case where video data of the VGA standard (480 lines) is displayed at 1.6 times magnification on a liquid crystal display device having a resolution of the XGA standard (768 lines).
0 lines (input) × 1.6 = 768 lines (display). Since the enlarged effective display area and the number of lines of the liquid crystal display device match, no underscan display is performed.

In performing the underscan display,
In some cases, data to be displayed in a margin portion extends over two display fields. This case will be described with reference to FIG. 7 based on the example of 1.1 times.

One frame of the input SXGA video data is composed of signals of a back porch, a display area, and a front porch.
Contains the display data for the line. That is, the total number of lines in one frame is 1084 lines. If this is multiplied by 1.1, it becomes 1192 lines, which is insufficient for 1200 lines of the liquid crystal display device having UXGA resolution.

When an underscan display is performed when a video signal of this value is input, the blank space for the upper 37 rows of the screen is filled with data of an invalid (INVALID) period. Since the enlargement process is also performed during the invalid (INVALID) period, the value obtained by back-calculating 37 rows and dividing by 1.1 is 3
It is necessary to generate a vertical driver start pulse for three rows before the valid (VALID) period. However, since the back porch has only 30 rows, a start pulse must be generated during the front porch of the previous field.

The operation of the vertical driver is the same as the operation of a simple shift register. The start pulse is shifted in units of rows, and becomes a gate pulse (scan signal) for sequentially supplying a signal in the vertical direction of the liquid crystal display device. .

Then, data in an invalid (INVALID) period is displayed in a blank portion of the upper 37 lines.
The effective data of 4 lines is enlarged by 1.1 times, and 1126
The video of the line is displayed in the display area.

The lower 37 lines of the blank are invalid (I
NVALID) period, the start pulse of the vertical driver is valid (VALI) to fill the upper 37 rows of the next field.
D) Generated on line 27 after the end of the period (see FIG. 7). Therefore, for the 29 lines obtained by multiplying the 27 lines by 1.1, the continued gate pulses are shifted and displayed. From that point onward, the gate pulses continued from before and the newly generated gate pulses are displayed. Are shifted. Therefore, in the remaining eight lines obtained by subtracting 29 lines from 37 lines in the lower margin portion, the same data as the start eight lines in the upper margin portion is written, but the same invalid (INVAL)
There is no problem because the data is for the (ID) period. As described above, underscan display can be performed.

[0016]

FIG. 8 shows a case where video data strings A, B, C, D,... Are enlarged and displayed when displaying low-resolution video data on a high-resolution liquid crystal display device. Specific patterns to be considered were shown. However, it is difficult to display the enlargement pattern on the liquid crystal display device as it is according to each enlargement factor, because the circuit becomes very complicated. Therefore, it is assumed here that interlaced scanning is performed. If interlaced scanning is not performed, one line of video data may be used to display the enlarged pattern in some places.
Must display across lines. To do this using a conventional horizontal driver, two horizontal synchronization signal periods are required.
The gate driver for the row is output from the vertical driver. In the row where this operation is performed, the time for supplying the electric charge to the liquid crystal panel is halved, and the liquid crystal is compared with the row where the operation is not performed. A difference occurs in the transmitted luminance, and a normal image display cannot be obtained. On the other hand, when one frame is displayed in two display fields by performing interlaced scanning, there is no portion for displaying the same video data over two lines in either the odd or even display field, and the charge is supplied to all the lines. This time can be unified to one horizontal synchronizing signal.

FIG. 9 is an image diagram of an enlarged display for performing interlaced scanning. The hatched portion indicates that data writing for performing interlaced scanning, that is, supply of electric charge to the liquid crystal panel is not performed. The purpose of the present invention is to create such an enlarged display image, but there is a problem in changing and using a conventional liquid crystal drive circuit group.

FIG. 11 shows an LS for driving a liquid crystal according to the reference technology.
FIG. 3 is a diagram illustrating a configuration of an enlargement control part of I. When the vertical synchronizing signal 43 has negative logic, the display start position decoder 36 counts the number of rows by counting the horizontal synchronizing signal 41 from the fall thereof, and matches the display start position setting signal 42 set from outside the LSI. At times, a display start position signal 40 is generated.

The enlarged pattern counter section 37 is an n-ary counter corresponding to the period n of the enlarged pattern shown in FIG. It is reset every time the display start position signal 40 is input, and has a role of controlling which line is written twice and enlarged by counting up using the horizontal synchronization signal 41 as a clock.

The binary counter is a counter for obtaining the double pattern shown in the enlarged pattern diagram of FIG. 8, and similarly, the quaternary counter is 1.25 times, and the quinary counter is
The decimal counter is a counter for obtaining a 1.1-times pattern with 1.2 times and 1.6 times.

The selector 38 supplies an enlargement mode selection signal 44
, The magnification can be selected from outside the liquid crystal display device. The count value of the selected n-ary counter is
The control signal 45 is supplied to the control signal
Is used for control to generate

FIG. 10 shows a driving waveform when interlaced scanning is performed in an example in which the magnification is 1.2 times.

First, the display start position signal 40 is generated from the decoder 36 as shown in FIG. 11, and the entire enlarged pattern counter 37 is reset. In the case of the 1.2-times enlarged display, the output of the quinary counter of the enlarged pattern counter 37 is selected by the enlargement mode selection signal 44 because the cycle of the enlarged pattern is a 5-row cycle, and the output is controlled. The signal is supplied to the signal generation circuit 39. Then, a control signal is generated for a vertical driver that generates a gate pulse of the liquid crystal display panel shown in FIG. 10 and a horizontal driver that samples video data and supplies a driving voltage for forming an image on the liquid crystal display panel. That is, the control signal generation circuit 39
, A horizontal driver latch pulse, a vertical driver start pulse, a vertical driver shift clock signal, and a vertical driver output enable signal are generated.

In FIG. 10, a horizontal driver latch pulse and a control signal for starting output of data sampled by the horizontal driver are generated by the control signal generation circuit 39 in synchronization with the horizontal synchronization signal.

The vertical driver start pulse is a control signal for the vertical driver to start shifting the gate pulse. The control signal generation circuit 39 generates the data at the display start position in synchronization with the output of the data.

The vertical driver shift clock is a signal for shifting the gate pulse output from the vertical driver, and takes into account the delay time due to the wiring capacity of the gate line of the liquid crystal display panel, and the delay time is larger than the horizontal driver latch pulse. It is generated by the control signal generation circuit 39 as soon as possible.

The vertical driver output enable signal is a signal for controlling the output of the gate pulse of the vertical driver, and the gate pulse is fixed at the low level while this signal is at the high level. Here, it is used for interlaced scanning control and is generated by the control signal generation circuit 39.

First, it is necessary to display data A in the first row of the odd display field in the driving waveform of the example in which the magnification is 1.2 times as shown in FIG. FIG. 10
The vertical driver shift clock a1 is raised to open the gate, and the vertical driver output enable signal is set to low level. Next, the second line performs interlaced scanning,
The vertical driver shift clock a2 is raised, and the vertical driver output enable signal is set to a high level so that the gate is not opened. Then, since the gate is not opened and only the shift register inside the vertical driver is shifted by one row, the data B is not displayed, and the interlaced scanning is performed.
In the same manner, data C is written in the third row, interlaced scanning is performed in the fourth row, and data E is written in the fifth row. Although the sixth row is interlaced scanning, the data A of the next row must be displayed immediately because the addition of a7 between the vertical driver shift clocks a6 and a8 allows the period in the odd field to be displayed. Interlaced scanning can be realized.

The drive waveform generation method is the same as that of the even display field, except that the position of the skipped row is different from that of the odd display field.

Also, in the case of other magnifications shown in FIG. 9, a drive signal can be generated in the same manner as in the above-described series of control.

Here, when underscan display is performed, that is, when the result obtained by multiplying the total number of lines of input video data by the enlargement ratio of the selected enlargement pattern is less than the total number of lines of the liquid crystal display panel, Then, the invalid data portion of the next display field, that is, the data of the hatched portion in FIG. 10 is displayed.

However, in the reference technology, when underscan display is performed by performing enlargement processing, there is a problem that a line that is not written occurs every other line due to switching of display fields.

When driven in accordance with the rules described above,
When the result obtained by multiplying the total number of lines of the input video data during the vertical synchronization signal period by the enlargement ratio is less than the total number of lines of the liquid crystal display device, the display start position is switched by switching between the odd display field and the even display field. This is because staggered regularity cannot be maintained depending on the condition of the enlarged pattern one line before.

An object of the present invention is to eliminate lines that are not written when the result of multiplying the total number of lines of input video data during the vertical synchronizing signal period by the enlargement ratio is less than the total number of lines of the liquid crystal display device. Another object of the present invention is to complete an enlarged display method by interlaced scanning while maintaining alternate regularity for each display field.

[0035]

As means for solving the problem, there is provided a circuit for detecting in which enlarged pattern the last line of each display field, that is, one line before the display start position, has been completed. In addition, a switching control circuit between display fields for controlling a drive signal of a vertical driver is provided so that regularity of interlaced scanning is maintained at a portion where the display is switched to the next display field.

The circuit for detecting the termination condition of the enlarged pattern is as follows:
The output result of the counter of each enlarged pattern is
The data is stored in the latch circuit using the line before as a trigger.

The display field folding control circuit supplements or thins out the shift clock of the vertical driver according to the storage result, and controls the timing of the vertical driver output enable and the vertical driver start pulse.

[0038]

Embodiments of the present invention will be described with reference to the drawings.

In the embodiment of the present invention, as shown in FIG. 5, for example, a display start position decoder 25, an enlarged pattern counter 26, a control signal generator 27, a display field last line enlarged pattern detector 28 and a display field An inter-folding control unit 29 is provided, and a horizontal synchronization signal 31, a display start position setting signal 32, a vertical synchronization signal 33, and an enlargement mode selection signal 34 are input.

When the display start position setting signal 32, which is set from outside the LSI, and the vertical synchronization signal 33 and the horizontal synchronization signal 31 have negative logic, the display start position decoder 25 starts horizontal synchronization from the fall of the vertical synchronization signal 33. A comparison is made with the number of falling edges of the signal 31, that is, the number of rows, and when both match, a display start position signal 30 is generated.

The enlarged pattern counter 26 is composed of a counter divided by each pattern cycle of each enlarged pattern, and has a role of pattern management in enlarged display.

The control signal generator 27 has a role of generating a drive signal for a peripheral device such as a horizontal or vertical driver for driving the liquid crystal display device.

Display Field Last Line Expansion Pattern Detector 2
Reference numeral 8 has a function of detecting an end condition in an enlarged pattern one line before the display start position which is the last line of the odd or even display field.

The display field wrapping control unit 29
Based on the detection result of the display field last row expansion pattern detection unit 28, the drive signal of the normal expansion pattern is subjected to drive waveform correction control so that the alternate regularity is maintained at the turn-back portion between the display fields. Has the role to do. The horizontal synchronization signal 31 serves as a clock for the enlarged pattern counter 26.

The display start position signal 30 is a signal for resetting the counter of each cycle of the enlarged pattern counter 26.

The enlargement mode selection signal 34 is a signal for selecting an enlargement mode given from the outside of the liquid crystal display device.
This signal is used to select a counter output of a cycle corresponding to the enlargement mode to be selected, and to select a timing at which the peripheral device operates in the control signal generation unit 27.

The inter-display-field return control unit 29 performs correction control of the drive waveform corresponding to both the detection result of the display-field last-row enlargement pattern detection unit 28 and the condition of the enlargement mode selection signal 34.

Next, the operation will be described with reference to FIG.

First, the enlarged pattern counter 26 counts up using the horizontal synchronizing signal 31 as a clock.
When the vertical synchronizing signal 33 and the horizontal synchronizing signal 31 have negative logic, the horizontal synchronizing signal 3
The number of lines is counted by counting the fall of 1 and the display start position signal 3
0 is generated. When the display start position signal 30 is input, the enlarged pattern counter 26 is temporarily reset to an initial state, and when the horizontal synchronization signal 31 is input again, the count-up is started.

The control signal generator 27 generates various control signals for peripheral devices in accordance with the output pattern of the enlarged pattern counter 26 and the enlarged mode selection signal 34.

Display Field Last Line Expansion Pattern Detector 2
8 and the display field wrapping control unit 29 are a novel part of the present invention. The display field last line expansion pattern detection unit 28 includes a counter having a bit number enough to count the number of lines from the display start position to the display start position of the next display field. The number of rows is counted using the signal 31 as a clock. The display start position of the next display field is detected by the input of the display start position signal 30, and the counter value of that line is stored as the number of lines in one display field (total number of lines). This stored value is compared with the counter value of the next display field. By latching the output of the enlarged pattern counter unit 26 when the total number of lines matches the value of the counter, it is detected which enlarged pattern has ended the last line of the display field at that time.

Then, the detection result and the enlargement mode selection signal 3
By using the combination of the four, the drive waveform at the folded portion between the display fields is corrected.

As the correction method, the number of shifts is made smaller than the normal timing by thinning out the vertical driver shift clock, or the number of shifts is made larger than the normal timing by adding.

Further, since the folded portion is the output position of the vertical driver start pulse, the timing of the vertical driver start pulse is also corrected with the change of the timing of the vertical driver shift clock.

Further, by changing the vertical driver output enable signal from the normal timing, in the interlaced scanning, control to skip or not to skip is also performed.

According to the embodiment of the present invention, as described above,
Since the end condition of the enlarged pattern is detected, when the display field is switched and the display is switched to the enlarged pattern in which the predetermined regularity of the interlaced scanning is not maintained, the inter-display-field wrapping control unit 29 sets each end. The control signal of the vertical driver according to the condition is controlled.
As a result, the same line is written in the odd-numbered display field and the even-numbered display field, and it is possible to avoid a phenomenon in which a line is not written, thereby enabling a display maintaining the regularity of the display fields.

Next, an embodiment of the present invention will be described more specifically with reference to FIG.

The configuration example of the embodiment of the present invention includes a display start position decoder 1, an enlargement pattern counter section 2, a selector 3 for selecting an enlargement mode, a control signal generation circuit 4 for generating a liquid crystal drive signal, A display field last line expansion pattern detection unit 5 and a display field return control unit 8 are provided.

The display start position decoder 1 includes a display start position setting signal 12, a vertical synchronization signal 15 and a horizontal synchronization signal 13.
Is a comparator for comparing the number of falling edges of the horizontal synchronizing signal 13 from the falling edge of the vertical synchronizing signal 15, that is, the number of rows, when the negative logic is used.

The enlarged pattern counter section 2 is composed of a binary counter, a quinary counter, an octal counter, and a quinary counter.

This output is supplied to the selector 3, and the path of the counter selected by the enlargement mode selection signal 16 is connected to the control signal generation circuit 4 and the inter-display field return control unit 8.

Display Field Last Line Expansion Pattern Detector 5
Are a display field last row detection circuit 6 and a latch circuit 7
Further, the display field last row detection circuit 6 includes a line counter 18, a shift register 19, a latch circuit 20, and a comparator 21 shown in FIG.

The detection result of the display field last line expansion pattern detection section 5 is connected to the display field return control section 8.

The inter-display-field wrapping control unit 8 comprises a vertical driver shift clock control circuit 9, a vertical driver start pulse control circuit 10, and a vertical driver output enable control circuit 11, and the control signal generation circuit 4
Connected to.

Next, the operation of the configuration example of the embodiment of the present invention will be described with reference to FIGS. And the enlargement ratio is 1.
The operation in the double example will be described.

First, the output of the quinary counter corresponding to the 1.2 times enlarged pattern of the enlarged pattern diagram of FIG. 8 from among the counters of the enlarged pattern counter section 2 of FIG. It is selected and output via the selector 3.

The control signal generation circuit 4 having received the enlarged pattern generates the drive waveform of FIG. 10 so that the screen is displayed on the enlarged image diagram shown in FIG.

At the same time, the line counter 18 in the display field last line detection circuit 6 of the display field last line expansion pattern detection section 5 starts counting up when the display start position signal 12 is input. The shift register 19 connected to the subsequent stage of the line counter 18 has 1
The counter value delayed by the line is output, and the output value of the shift register 19 at that time is temporarily stored in the D flip-flop 20 by the display start position signal 12 of the next display field, and at the same time, the line counter 18 is reset.

Next, the comparator 21 compares the stored value with the count value of the line counter 18, and outputs a latch signal to the latch circuit 7 when both values match.

The latch circuit 7 can detect the enlarged pattern of the last row of the display field by latching the output of the selector 3 when the latch signal is input.

The detected enlarged pattern is input to the inter-display-field return control unit 8. The display field return control unit 8 controls a drive signal of the vertical driver at the time of return between display fields.

FIG. 3 is a diagram showing drive waveforms at a folded portion between display fields in a 1.2-times enlargement mode according to the present invention, and FIG. 4 is a diagram for explaining a screen display at that time. FIG. 12 shows driving waveforms according to the reference technology.
FIG. 13 is a view for explaining the screen display.

Display Field Last Line Expansion Pattern Detector 5
Stores the count value n of the horizontal synchronizing signal described in the last row of the display field in the driving waveform shown in FIG. 3, and detects the enlarged pattern "E" at that time.

Here, when the enlargement ratio is 1.2 times, when the enlargement pattern is completed by the odd display field “E” in the odd display field and the even display field A to E, FIG. As shown in (1), the regularity of the interlaced scanning is lost after the folded portion between the display fields.

Here, in the inter-display-field return control unit 8, if the enlargement mode selection signal 17 is set to 1.2 times in advance and the final pattern of the display field ends with the odd display field "E", the display field The vertical driver drive signal is set to be controlled at the turn-around time.

Thus, the inter-display-field return control unit 8 controls the vertical driver shift clock control circuit 9 so that the regular driving waveform generated by the control signal generation circuit 4 maintains the regularity of interlaced scanning. A vertical driver shift clock in a portion surrounded by a broken line in FIG. 3 is generated and added.

Further, by adding the vertical driver shift clock, if the driving signal is the normal driving signal of the vertical driver start pulse shown by the broken line in FIG. 3, the vertical driver takes in the vertical driver start pulse twice and malfunctions. Therefore, the vertical driver start pulse control circuit 10 generates a signal for masking a part of the pulse indicated by the broken line in FIG. Is output as a control signal.

When the enlargement ratio is 1.2 times, it is not necessary to change the drive waveform of the vertical driver output enable signal under any conditions, so that the vertical driver output enable signal control circuit 11 does not generate any control signal. However, if it is necessary to control the drive waveform of the output enable signal in the case of another enlargement ratio, the vertical driver output enable control circuit 11 generates a control signal for changing the normal drive waveform.

Next, another configuration example of the embodiment of the present invention will be described with reference to FIG. The display field last line expansion pattern detection unit 50 is different from the display field last line expansion pattern detection unit 5 shown in FIG. 1 and is composed of a decoder 51 at a display start position-1 and a latch circuit 52 as shown in FIG. The latch signal of the latch circuit 7 shown in FIG. 1 is generated one row before the display start position, but the decoder 51 shown in FIG. A latch signal of the latch circuit 52 is generated at the position of the start position-1.

Next, the operation of this embodiment will be described.

First, the display start position signal 5 shown in FIG.
7 is set. Then, a display start position signal 57 is output at the position of the set value.

Display Field Last Line Expansion Pattern Detector 5
0, the latch signal of the latch circuit 52 is generated one row before the display start position signal 57 by the decoder 51 inside. The latch circuit 52 can detect the enlarged pattern of the last line of the display field by latching the output state of the selector 48 at the time of input.

The other parts of the enlarged pattern counter 47, the control signal generation circuit 49, and the inter-display-field wrapping control unit 53 are the same as those of the embodiment. Since the operation is the same as that of the control unit 8, the description is omitted here. As the latch signal of the latch circuit 52 in FIG. 6, the count value of the horizontal synchronization signal is output to the position n shown in FIG. Then, the latch circuit 52 latches the enlarged pattern “E” at this time, and sends the result to the display field return control unit 53.

Also in this example, the other parts of the enlarged pattern counter 47, the control signal generation circuit 49, and the inter-display-field wrapping control unit 53 are the same as those of the enlarged pattern counter 2 and the control signal generator of the previous embodiment. Part 4
Since this is the same as that of the display field return control unit 8, the description is omitted here.

In this example, since the enlarged pattern of the last line can be detected without the necessity of a line counter having a large number of digits, it is useful for loopback control between display fields.

Although the embodiment has been described with reference to the liquid crystal display device, the present invention is applicable to an image display device having a row electrode and displaying images by supplying gate pulses to the row electrode sequentially from the vertical driver in the vertical direction. The invention can be applied.

[0087]

According to the present invention, when interlaced scanning is performed in order to input and display video signals having different resolutions and different patterns are displayed for each field, when the display screen is turned over at the folded portion of the display field, By controlling the driving signal of the vertical driver, regularity of the display pattern can be always maintained. For example, a circuit for detecting the final pattern condition of the display field of the enlarged pattern is provided, and the control method of the drive signal of the vertical driver is appropriately changed according to the condition.

As described above, interlaced scanning is performed, and a low-resolution video signal is enlarged and processed in a plurality of fields to display an image on a high-resolution liquid crystal display device regardless of a high-cost method such as providing a frame memory. Under-scan display for displaying without dropout can be performed.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram illustrating a configuration example according to an embodiment of the present invention.

FIG. 2 is a detailed diagram of a display field last row detection circuit according to the embodiment of the present invention.

FIG. 3 is a driving waveform (after improvement) of a folded portion according to the embodiment of the present invention.

FIG. 4 is a display image diagram of a folded portion according to the embodiment of the present invention.

FIG. 5 is a circuit block diagram according to an embodiment of the present invention.

FIG. 6 is a circuit block diagram showing another configuration example of the embodiment of the present invention.

FIG. 7 is an explanatory diagram of a case where underscan display is performed when the enlargement ratio is 1.1 times.

FIG. 8 is a pattern diagram of an enlarged display.

FIG. 9 is an image diagram of an enlarged display.

FIG. 10 is a driving waveform in the case of performing an enlarged display with an enlargement ratio of 1.2 times.

FIG. 11 is a circuit block diagram illustrating a configuration example of a drive circuit when performing enlarged display according to the reference technology.

FIG. 12 is a driving waveform of a field switching portion in the reference technology.

FIG. 13 is a display image diagram of a field switching portion in the reference technology.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 display start position signal generation decoder 2 expansion pattern counter unit 3 n-ary counter selector 4 control signal generation circuit 5 display field last line expansion pattern detection unit 6 display field last line detection circuit 7 last line expansion pattern latch circuit 8 display field folding control Unit 9 vertical driver shift clock control circuit 10 vertical driver start pulse control circuit 11 vertical driver output enable control circuit 12 display start position signal 13 horizontal synchronization signal 14 display start position setting signal 15 vertical synchronization signal 16 enlargement mode selection signal 17 control signal output REFERENCE SIGNS LIST 18 line counter 19 shift register 20 total number of rows-1 latch circuit 21 comparator 22 horizontal synchronization signal 23 display start position signal 24 display field last line detection signal 25 display start position signal generation decoder 26 enlarged patterner Counter 27 control signal generation unit 28 display field last line expansion pattern detection unit 29 display field return control unit 30 display start position signal 31 horizontal synchronization signal 32 display start position setting signal 33 vertical synchronization signal 34 enlargement mode selection signal 35 control signal Output 36 Display start position signal generation decoder 37 Magnification pattern counter section 38 N-ary counter selector 39 Control signal generation circuit 40 Display start position signal 41 Horizontal synchronization signal 42 Display start position setting signal 43 Vertical synchronization signal 44 Magnification mode selection signal 45 Control signal Output signal 46 Display start position signal generation decoder 47 Enlarged pattern counter unit 48 N-ary counter selector 49 Control signal generation circuit 50 Display field last line expansion pattern detection unit 51 Display start position-1 decoder 52 Display field last line expansion pattern Latch circuit 53 Display field return control unit 54 Vertical driver shift clock control circuit 55 Vertical driver start pulse control circuit 56 Vertical driver output enable control circuit 57 Display start position signal 58 Horizontal synchronization signal 59 Display start position setting signal 60 Vertical synchronization signal 61 Enlargement mode selection signal 62 Control signal output

Claims (8)

[Claims] 1. A method for driving an image display device in which an image is displayed by sequentially supplying gate pulses from a vertical driver to a row electrode of a display panel, wherein a shift clock for shifting a gate pulse output from the vertical driver is provided. A display method in which a video signal is enlarged and enlarged to constitute an enlarged image over a plurality of display fields, wherein the signal is obtained by enlarging a signal in one vertical period of an input video signal at a predetermined magnification. The number of lines of the obtained signal is smaller than the number of display lines of the image display device, interlaced scanning is performed in each of the plurality of display fields, and at the position where the display is switched to another display field in the middle of one display field of the screen, the vertical The pulse of the shift clock of the driver is added or thinned out, and the line display is complemented alternately in a plurality of fields and displayed. A method of driving an image display device, wherein the regularity of the interlaced scanning is corrected so that an image is formed. 2. The driving method according to claim 1, wherein the display method is a display method in which the enlarged image is formed over two display fields. 3. A driving circuit of an image display device for displaying an image by supplying gate pulses to a row electrode sequentially from a vertical driver in a vertical direction, wherein a shift clock for shifting a gate pulse output from the vertical driver is used. A circuit for correcting the regularity of interlaced scanning so that the image signal is increased and enlarged, and the enlarged image is alternately complemented in a row display over a plurality of display fields to form an image. Means for generating a display start position signal at the display start position by comparing the input display position setting signal with the number of horizontal synchronization signals from the time when the vertical synchronization signal is switched, and according to a plurality of magnifications. Expanding pattern counting means for counting the number of rows in the cycle of each expanding pattern; and an expanded pattern result obtained by the expanding pattern counting means. Means for selecting, a means for storing the number of lines from the display start position signal to the last line of the display field, a detecting means for detecting an enlarged pattern by referring to the stored value, and a detecting means for detecting the enlarged pattern. Correction means for correcting the control signal of the vertical driver at the turn-back position from the last line of one display field to the other display field with reference to the enlarged pattern of the last line of the display field. The pulse of the shift clock of the vertical driver is added or thinned out at the position where the display is switched to another display field in the middle of the other display field, and the interlaced scan is performed so that an image is formed by alternately complementing the row display in the plurality of display fields. A driving circuit for an image display device, comprising: means for correcting regularity. 4. The image display apparatus according to claim 3, further comprising means for correcting interlaced scanning regularity so that an image is formed by alternately complementing line display in two display fields. Drive circuit. 5. The display means supplies the count value of the display field last line enlarged pattern detection circuit block and the enlarged pattern counting means to the display field last line enlarged pattern detection circuit block by the selection means, and starts display. 4. A circuit for latching a count value supplied one row before the position by a flip-flop.
The driving circuit of the image display device according to the above. 6. A vertical driver start pulse supplied to the vertical driver and determining display start in a vertical direction;
A shift clock for fetching the vertical driver start pulse into a shift register in the vertical driver and shifting a gate pulse output from the vertical driver; and a vertical driver output enable for forcibly setting the gate pulse output of the vertical driver to a low level. And a signal of the shift clock of the vertical driver at the turn-back position from the last row of one display field to another display field by referring to the display field last row enlargement pattern detected by the detection means. 4. An image display device according to claim 3, further comprising means for adding or thinning out, and correcting the regularity of interlaced scanning so that an image is formed by alternately complementing the line display in a plurality of fields. Drive circuit. 7. The driving method for an image display device according to claim 1, wherein the image display device is a liquid crystal display device. 8. The driving circuit for an image display device according to claim 3, wherein the image display device is a liquid crystal display device.