JPH10322723A - Video signal matrix converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize the signal processing of a personal computer and the like to which the high speed processing of a TV signal and the like is requested with high quality and to correspond to various input sources and an output display device. SOLUTION: An A/D-converted luminance signal Y is made into the two phase of the luminance signal Yo of odd-numbered sample data and the luminance signal Ye of even-numbered sample data and they are supplied to a conversion switch circuit 17. Color difference signals (R-Y) and (B-Y) which are A/D-converted are supplied to a conversion circuit 7 and a color difference signal (G-Y) is generated in a generation circuit 10. The color difference signals (G-Y), (R-Y) and (B-Y) are made into (G-Y)o, (R-Y)o and (B-Y)o constituted of odd-numbered sample data. Then, color difference signals (G-Y)e, (R-Y)e and (B-Y)e constituted of even-numbered sample data are generated from the signals in interpolation filters 14-16. RGB signals are formed in the conversion switch circuit 17 from the color difference signals and the luminance signal and the luminance signal and the color difference signals or the RGB signals can selectively be outputted.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal conversion device used for a television display device and the like, and more particularly to a digital television receiver for performing digital signal processing (hereinafter referred to as a digital TV receiver). The present invention relates to a video signal matrix conversion device.

[0002]

2. Description of the Related Art Conventionally, a television receiver for home use (hereinafter referred to as a TV receiver) has been configured as a stand-alone product and adapted to a single video input and a single display device. . However, nowadays, the diversification of video sources and display devices has progressed, and the need for a TV receiver that performs signal processing corresponding to various video signal formats and that converts video signals into various display formats has increased. Is coming.

As one of the methods, for example, an output image signal of a personal computer (hereinafter, referred to as a personal computer image signal) is taken in and displayed in an NTSC video signal format, or conversely, an NTSC video signal (hereinafter referred to as an NTSC video signal). , N
Television devices capable of converting a TSC video signal into a specific personal computer image signal format and displaying an image on a personal computer display device have been developed. In this case, the input / output signal format and the scanning method are different between the standard television signal (hereinafter, referred to as TV signal) and the personal computer image signal received by the home TV receiver. The signal conversion means corresponding to each part is required.

Regarding input / output signals and signal processing formats,
Basically, a TV signal handles a luminance signal Y and two color difference signals (RY) and (BY), while a PC image signal uses R, G, and B signals, which are primary color signals, respectively. We are dealing. Therefore, when an image is displayed on a display device of a personal computer using a TV signal, a system conversion (hereinafter, referred to as a matrix conversion) for generating R, G, and B signals from the luminance signal Y and the color difference signal is required. When a PC image signal is input to a TV receiver to display an image, an inverse transformation of a matrix transformation (hereinafter, referred to as a matrix inverse transformation)
Is required.

[0005] A conventional example of video signal processing including matrix conversion in a digital TV receiver is described in, for example, JP-A-1-108896.

[0006]

By the way, the matrix / inverse matrix conversion circuit tends to be constituted by a digital circuit with the recent development of digital LSI for TV signal processing. On the other hand, digital processing of a digitized image signal from a personal computer or the like requires a high-speed clock. For example, XGA (Exten
The bit clock frequency in the ded Graphics Adapter display mode is about 70 MHz. Therefore, in a TV signal processing circuit including a matrix circuit, a large number of multi-stage arithmetic processes are used.

Also, in the future of the multimedia age,
There is a demand for a versatile system capable of switching and outputting a video signal format so that it can be connected to various external display devices such as a personal computer.

An object of the present invention has been made in view of such a demand, and an object of the present invention is to realize high-quality signal processing for a TV signal and other personal computers that require high-speed processing, and various other methods. It is an object of the present invention to provide a video signal matrix conversion device which can support an input video source and an output display device.

[0009]

In order to achieve the above object, the present invention has the following arrangement. That is, the color difference signal
A for converting (RY) and (BY) to a digital color difference signal
/ D conversion means, and converts the luminance signal Y into the color difference signals (RY), (B
A / D conversion means for converting the digital luminance signal into a digital luminance signal at a bit rate higher than -Y);
And a demultiplexer for distributing the sample data and binarizing it into first and second digital luminance signals each composed of a column of sample data distributed therefrom; and a digital color difference signal (RY), ( BY) to the digital color difference signal (G
-Y), and the digital color difference signals (GY), (RY) and (BY) are converted into first digital color difference signals (GY) and (RY), respectively. ), (B−Y), and the first digital color difference signals (G−Y), (RY), (RY), and (BY) respectively. (RY),
A second digital color difference signal (GY), (RY), which is composed of sample data for interpolating between (BY) sample data.
Interpolating means for generating (B−Y), and first and second primary colors having different sample data from the first and second digital color difference signals (GY) and the first and second luminance signals. Signal G is
The first and second primary color signals R having different sample data from the first and second digital color difference signals (RY) and the first and second luminance signals are further added to the first and second luminance signals. , And first and second primary color signals B having different sample data from the digital color difference signal (BY) and the first and second luminance signals, respectively. The first and second digital color difference signals (RY) and (BY)
Alternatively, conversion switching means for selectively outputting the first and second primary color signals R, G, B, and the first and second digital luminance signals or the first and second conversion signals output from the conversion switching means. A first multiplexer for alternately selecting the sample data of the digital primary color signal G to generate a one-phase digital luminance signal or digital primary color signal G; and the first and second digital signals output from the conversion switching means. A second multiplexer that alternately selects sample data of the color difference signal (RY) or the first and second digital primary color signals R and generates a one-phase digital color difference signal (RY) or digital primary color signal R And the sample data of the first and second digital color difference signals (BY) or the first and second digital primary color signals B output from the conversion switching means are alternately selected. And a third multiplexer for generating Ijitaru color difference signals (B-Y) or a digital primary color signal B.

Thus, a video signal composed of a luminance signal and a color difference signal and a video signal composed of an RGB signal can be selectively obtained, and one of them can be selected in accordance with the display format of a connected display device. Can be output.

[0011]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a first embodiment of a video signal matrix conversion apparatus according to the present invention.
3 to 3 are A / D converters, 4 is a demultiplexer, 5 is a latch circuit, 6 is a signal processing circuit, 7 is a digital matrix circuit, 8 and 9 are delay circuits, 10 is a GY signal generation circuit,
11 to 13 are delay circuits, 14 to 16 are interpolation filters, 1
7 is an RGB conversion switching circuit, 18 to 20 are multiplexers, 21 is a D / A converter, 22 to 24 are input terminals, 25
To 27 are output terminals, 28 is an external display device, 29
Is a control signal generation circuit, and 30 and 31 are input terminals.

FIG. 2 is a timing chart showing signals of respective parts in FIG. 1. In FIG. 2, signals corresponding to those in FIG. 1 are denoted by the same reference numerals.

In FIG. 1, an analog luminance signal Y is inputted from an input terminal 22 and is converted by an A / D converter 1 into a digital luminance signal Y represented by Y ₁ , Y ₂ , Y ₃ ,. You. Similarly, input terminals 23 and 2
4, analog color difference signals (RY) and (BY) are input, and the A / D converters 2 and 3 convert the sample data into (RY) ₁ , (RY) ₂ , (RY) ₃ , ..., (B
−Y) ₁ , (BY) ₂ , (BY) ₃ ,... Are converted into digital color difference signals (RY) and (BY).

The digital luminance signal Y is supplied to a demultiplexer 4 controlled by a control signal c1 from a control signal generation circuit 29 having a cycle twice as long as the clock cycle. Here, the demultiplexer 4 is controlled so as to close to the contact o when the control signal c1 is "H" and to close to the contact e when the control signal c1 is "L". data Y _1, Y _3, Y _5, ... and even-numbered sample data _{Y 2, Y 4, Y 6} , is separated into ......, is latched at a predetermined timing in each latch circuit 5, the odd-numbered Sample data Y ₁ , Y ₃ , Y ₅ , ...
.. And the even-numbered sample data Y ₂ , Y ₄ , Y ₆ ,..., Are formed. These two-phase digital luminance signals Yo and Ye are supplied to a digital matrix conversion circuit 7 after being subjected to processing such as scaling such as enlargement and reduction and conversion of the number of scanning lines in a signal processing circuit 6. Digital color difference signal R- from A / D converters 2 and 3
Y and BY are similarly processed by the signal processing circuit 6 and then supplied to the digital matrix conversion circuit 7.

Here, the data rate (clock rate) of the digital luminance signal Y from the A / D converter 1 is the digital color difference signal (RY) from the A / D converters 2 and 3, (B−
It is twice the data rate of Y). This is because the color difference signals (RY) and (BY) are signals in a narrower band than the luminance signal Y. Then, the digital luminance signal Y is binarized by the demultiplexer 4 to obtain the digital luminance signal Y
The data rates of o and Ye and the digital chrominance signals (RY) and (BY) have the same data rate, so that the subsequent signal processing circuit 6 can perform the normal digital processing operation of the luminance signal. ing.

The digital matrix conversion circuit 7 converts the digital luminance signals Yo and Ye and the digital color difference signals
(RY) and (BY) are converted into R, G and B signals, and a set of these digital luminance signals Yo and Ye and digital color difference signals (RY) and (BY) is used. , R, G, and B signals. Hereinafter, such a function will be described.

In the digital matrix conversion circuit 7, the digital luminance signals Yo and Ye are delayed by delay circuits 8 and 9, respectively, and then supplied to an RGB conversion switching circuit 17, where digital color difference signals (RY) and (B−Y) is supplied to the delay circuits 12 and 13 and the interpolation filters 15 and 16, and is also supplied to the GY signal generation circuit 10. For example, in the case of an NTSC video signal, G−Y = − The digital color difference signal (GY) is generated by the calculation of 0.51 (RY) -0.19 (BY). This digital color difference signal GY is also supplied to the delay circuit 11 and the interpolation filter 14.

The interpolation filters 14 to 16 operate in response to a clock ck from the input terminal 30 to supply sample data of the supplied digital color difference signals (GY), (RY) and (BY). For example, there is a method of calculating an arithmetic mean of two sample data that are temporally adjacent to each other.
That is, the sample data constituting the digital color difference signals (RY) and (BY) input to the digital matrix conversion circuit 7 are odd-numbered sample data (RY) ₁ and (RY).
Y) ₃ , (RY) ₅ ,..., (BY) ₁ , (BY) ₃ ,
(BY) ₅ ,..., The interpolation filters 15 and 16
By taking the arithmetic mean of these sample data, even-numbered sample data (RY) ₂ , (RY) ₄ , (RY) of these digital color difference signals (RY) and (BY) are obtained. Y)
₆ ,..., (BY) ₂ , (BY) ₄ , (BY) ₆ ,.
Is generated. The same applies to the digital color difference signal (GY) generated by the GY signal generation circuit 10.

For example, taking the digital color difference signal (GY) as an example, the even-numbered sample data ( _GY ) _2i to be generated is ( _GY ) _2i = ｛( _GY ) _{2i -1} + (G−Y) _{2i + 1} ｝ / 2 Digital color difference signal (R-
The same applies to (Y) and (BY).

Here, a specific example of the interpolation filters 14 to 16 will be described with reference to FIG. 3 using a digital color difference signal (GY) as an example. Here, 32 is an input terminal, 33 is a latch circuit,
34 is an addition circuit, 35 is an average value calculation circuit, 36 is an interpolation signal output terminal, and 30 is the input terminal 30 shown in FIG.

In FIG. 1, an input terminal 32 has GY
Digital color difference signal from the signal generation circuit 10 (FIG. 1)
(G−Y) is input and supplied to the latch circuit 33 and the adder circuit 34. The latch circuit 33 uses the clock ck from the input terminal 30 to convert the input sample data of the digital color difference signal (GY) (this is the odd-numbered sample data ( _GY ) _2i-1 ). The output is latched for the sample period. The sample data (G−Y) _2i−1 output from the latch circuit 33 is added to the next odd-numbered sample data (G−Y) _{2i + 1 in} the addition circuit 34, and the added data is further added. Average value calculation circuit 35
Are multiplied by a constant ２ and averaged. In this way, from the output terminal 36, the even-numbered sample data ( _GY ) _{2i- 1} and the average value of the (G-Y) _{2i + 1} represented by the above equation are averaged. _GY ) _2i is obtained. Of course, at this time, the above-mentioned sample data (G−Y) _{2i + 1} supplied next is latched by the latch circuit 33 to generate the next even-numbered sample data (G−Y) _{2 (i + 1)} . Used for

In this manner, from the output terminal 36, even-numbered sample data (GY) ₂ , (GY) ₄ ,
(G−Y) ₆ ,... Are obtained. A signal consisting of such a sequence of even-numbered sample data is represented as a digital color difference signal (GY) e,
A signal consisting of a sequence of (GY) ₁ , (GY) ₃ , (GY) ₅ ,... Is represented as a digital color difference signal (GY) o.

In FIG. 1, the same applies to the interpolation filters 15 and 16, from which digital chrominance signals (RY) e and (B−L) each consisting of a sequence of even-numbered sample data.
Y) e is obtained.

Digital color difference signals (GY) o, (R-
Y) o and (BY) o are interpolation filters 14, 15,
16, the digital color difference signal (G-Y) e, (R-Y)
e, (B−Y) e, the digital color difference signals (G−Y) e, (R−Y)
e, (BY) e and R at the same timing as these.
It is supplied to the GB conversion switching circuit 17. The delay circuits 8 and 9 are also for adjusting the digital luminance signals Yo and Ye to the timing of these digital color difference signals.

The RGB conversion switching circuit 17 has an input terminal 31
, The supplied digital luminance signals Yo, Ye and the digital color difference signals (G-Y) o,
(GY) e, (RY) o, (RY) e, (BY) o,
(BY) e or output them as R, G,
The selection and switching of whether to convert the signal into a B signal and output the signal are performed. Here, these R, G, and B signals are also digital luminance signal Yo and digital color difference signals (GY) o, (RY)
o, (BY) o, an R signal Ro, a G signal Go, and a B signal Bo, each of which is a row of odd-numbered sample data generated from
, The digital luminance signal Ye and the digital color difference signal (G
-Y) e, (RY) e, and (BY) e, there are an R signal Re, a G signal Ge, and a B signal Be which are composed of even-numbered sample data strings generated.

FIG. 4 shows the RGB conversion switching circuit 1 in FIG.
7 is a block diagram showing a specific example of 7, 37 to 44 are input terminals, 45 to 48 are selectors, 49 to 54 are addition circuits, 55 to 60 are output terminals, 61 is 0 data generation means, 31 Denotes an input terminal 31 shown in FIG.

In the figure, digital luminance signals Yo and Ye are inputted from input terminals 37 and 38, respectively, and digital color difference signals (G-Y) are inputted from input terminals 39 and 40, respectively.
o, (G−Y) e are input from the input terminals 41 and 42, and digital color difference signals (RY) o and (RY) e are input from the input terminal 4.
3 and 44, the digital color difference signals (BY) o and (B
-Y) e is input.

The input digital luminance signal Yo is supplied to the contact b of the selector 45 and the addition circuit 49, and the input digital luminance signal Ye is supplied to the contact b of the selector 46 and the addition circuit 50. The input digital color difference signal (GY) o is supplied to the contact b of the selector 47,
The input digital color difference signal (GY) e is supplied to the selector 4
8 is supplied to the contact b. 0 data from the 0 data generating means 61 is supplied to the contact points a of the selectors 45 to 48. These selectors 45 to 48 are controlled by the switching control signal c2 from the input terminal 31, and the selector 45
Are supplied to addition circuits 51 and 53, the output of selector 46 is supplied to addition circuits 52 and 54, the output of selector 47 is supplied to addition circuit 49, and the output of selector 48 is supplied to addition circuit 50, respectively. Also, the input digital color difference signal (RY)
o, (RY) e, (BY) o, and (BY) e are supplied to adders 51, 52, 53, and 54, respectively.

Therefore, now, by the switching control signal c2,
Assuming that the selectors 45 to 48 are closed to the illustrated contact b side, the digital luminance signal Yo and the digital chrominance signal (G−Y) o are supplied to the adding circuit 49 and added, and the odd-numbered sample data A digital G signal Go composed of columns is generated, and a digital luminance signal Ye and a digital chrominance signal (G-Y) e are supplied to an adding circuit 50 and added, and a digital G signal composed of columns of even-numbered sample data is added. A signal Ge is generated. These digital G signals Go and Ge are supplied from output terminals 55 and 56 to the contacts o and e of the multiplexer 18 in FIG. 1, respectively.

In FIG. 4, a digital luminance signal Yo and a digital chrominance signal (RY) o are supplied to an adder circuit 51 and added to generate a digital R signal Ro composed of a sequence of odd-numbered sample data. The digital luminance signal Ye and the digital chrominance signal are supplied to the addition circuit 52.
(RY) e are supplied and added to generate a digital R signal Re composed of even-numbered sample data columns. These digital R signals Ro and Re are supplied from output terminals 57 and 58 to contacts o and
e.

In FIG. 4, similarly, the addition circuit 53
The digital luminance signal Yo and the digital color difference signal (B-
Y) o are supplied and added to generate a digital B signal Bo composed of a sequence of odd-numbered sample data, and a digital luminance signal Ye and a digital chrominance signal (B−Y) e are added to an adding circuit 54. The digital B signal Be which is supplied and added, and is composed of a sequence of even-numbered sample data
Is generated. These digital B signals Bo and Be are output from output terminals 59 and 60, respectively, to the multiplexer 20 of FIG.
Are supplied to the contact points o and e of the contact.

In this way, when the selectors 45 to 48 are closed to the contact b side, the input signals are converted into G, R, and B signals, and the input signals are composed of odd-numbered sample data columns and even-numbered sample data columns. Are obtained at the output terminals 55 to 60 and supplied to the multiplexers 18 to 20 in FIG.

In FIG. 4, the selectors 45 to 48 switch the contacts a by the switching control signal c2 from the input terminal 31.
Side, adders 49, 50, 51, 52, 53, 5
4 are selectors 47, 48, 45, 46, 45, 46, respectively.
0 data is supplied from the 0 data generation means 61 via the adder circuits 49, 50, 5
1, 52, 53, and 54 respectively output digital luminance signals Y
o, digital luminance signal Ye, digital color difference signal (R-
Y) o, a digital color difference signal (RY) e, a digital color difference signal (BY) o, and a digital color difference signal (BY) e are output. These digital luminance signals Yo and Ye are supplied to contacts o and e (FIG. 1) of the multiplexer 18, respectively.
The digital color difference signals (RY) o and (RY) e are supplied to the contacts o and e (FIG. 1) of the multiplexer 19, respectively, and the digital color difference signal (BY) o and the digital color difference signal (B-
Y) e are supplied to the contacts o and e of the multiplexer 20 of FIG. 1, respectively.

Returning to FIG. 1, as described above, RGB
The conversion switching circuit 17 outputs a digital video signal based on the digital luminance signal Y and the digital color difference signals (RY) and (BY) and digital R and G according to the switching control signal c2 from the input terminal 31. , B signals are selectively output, and the multiplexer 1
8, 19, and 20.

The multiplexers 18, 19, and 20 are controlled by a control signal c1 from a control signal generation circuit 29. When the control signal c1 is at "H", the contact o is turned off.
At the time of "L", the contact e side is selected respectively, and signals input to the contacts o and e are alternately selected and time-division multiplexed.

Now, the RGB conversion switching circuit 17 outputs the digital luminance signal Y and the digital color difference signals (RY), (B-
Y), the multiplexer 18
As shown in FIG. 5, a digital luminance signal Yo composed of a column of odd-numbered sample data Y ₁ , Y ₃ ,... Digital luminance signals Ye composed of columns of data Y ₂ , Y ₄ ,... In this case, the timings of the sample data of the digital luminance signals Yo and Ye are adjusted by the delay circuits 8 and 9 as shown in FIG. 5, and the cycle of the control signal c1 is set to the period of the digital luminance signals Yo and Ye. Is equal to the sampling period, the multiplexer 18 uses the control signal c1 to set the contacts o,
e, the digital luminance signal Y
and o the sample data and sample data of digital luminance signal Ye is selected alternately, as shown in FIG. 5, these sample data _{Y 1, Y 2, Y 3} , Y 4, Y 5,
.., And a digital luminance signal Y ′ alternately arranged is obtained. The sampling period of the digital luminance signal Y 'is twice the period of the control signal c1.

Similarly, from the multiplexer 19,
The sample data of the digital color difference signals (RY) o and (RY) e are alternately arranged to form (RY) ₁ , (RY) ₂ ,
A digital color difference signal (RY) 'composed of a sequence of (RY) ₃ , (RY) 4, (RY) 5,... Is obtained. −Y) o, (B
-Y) The sample data of e is arranged alternately (BY) ₁
, (BY) ₂ , (BY) ₃ , (BY) ₄ , (BY)
₅ , a digital color difference signal (BY) 'consisting of a sequence of
Is obtained.

Also, the RGB conversion switching circuit 17
When a signal is output, the odd-numbered sample data G is connected to the contact o of the multiplexer 18 as shown in FIG.
_A digital primary color signal Go composed of a series of ₁ , G ₃ ,... Is supplied to a contact e, as shown in FIG. 5, a digital primary color signal composed of a series of even-numbered sample data G ₂ , G ₄ ,. Ge is supplied. In this case, the timing of each sample data of the digital primary color signals Go and Ge is adjusted by the delay circuit 11 as shown in FIG. Therefore, the multiplexer 18 performs the same operation as that when the digital luminance signals Yo and Ye are supplied, so that the multiplexer 18 outputs the sample data G ₁ , G ₂ , G ₃ , and G ₃ as shown in FIG. G ₄ , G
Digital primary color signals G 'alternately arranged as ₅ ,... Are obtained.

Similarly, although not shown, from the multiplexer 19, the sample data of the digital primary color signals Ro and Re are alternately arranged and R ₁ , R ₂ , R ₃ , R ₄ , R
_5, the digital primary color signals R consisting of a sequence of ... 'are obtained, from the multiplexer 20, the digital primary color signals B
The sample data of o and Be are alternately arranged and B ₁ , B
_{2, B 3, B 4,} B 5, digital color difference signal B consists of a sequence of ... 'are obtained.

The output signals of the multiplexers 18, 19 and 20 are converted into analog signals by the D / A converter 21 and output from the output terminals 25, 26 and 27, respectively. Assuming that, for example, a display device 28 of the NTSC system is connected to these output terminals 25 to 27, the input terminal 31
Conversion switching circuit 1 by the switching control signal c2 from
7, the digital luminance signal Y and the digital color difference signal (R
−Y) and (B−Y), whereby the display device 28 receives the analog luminance signal Y and the color difference signal (R
-Y) and (BY) are supplied. Output terminal 2
For example, when a display device 28 such as a display device of a personal computer, which has a display format based on RGB signals, is connected to the input terminals 3 to 5 to 27,
The digital primary color signals G, R, and B are output from the RGB conversion switching circuit 17 in response to the switching control signal c2 from 1 and the analog primary color signals G, R, and B are supplied to the display device.

As described above, in the first embodiment,
Even if a display device having a different display format is connected, a video signal according to the display format can be generated and supplied to the display device to display an image. On the other hand, since this is separated into two phases and processed,
The signal processing speed can be given a margin while the quality of the displayed image is kept high. In addition, in the case of a display device of a personal computer which conforms to the RGB display format, these R, G, B signals are two-phased. By doing so, it is possible to display an image with an image quality suitable for such a display device.

FIG. 6 is a block diagram showing a video signal matrix conversion apparatus according to a second embodiment of the present invention.
Reference numerals 64 to 64 are output terminals, 65 is a control signal generation circuit, 66 is a selector, and 67 is an input terminal. Portions corresponding to those in FIG.

Referring to FIG.
When the selector 66 is closed to the contact x side by the non-multiplex mode switching control signal c4 and is in the multiplex mode in which the control signal c1 from the control signal generation circuit 29 is selected, the selector 1
8, 19, and 20 operate in the same manner as in the first embodiment shown in FIG. 1, and output from the output terminals 25 to 27 in the multiplex mode, that is, in the same manner as in the first embodiment shown in FIG. Digital luminance signal Y ′ and digital color difference signal (RY) ′,
(BY) 'or primary color signals G', R ', B' are output.

In addition, the output terminals 62, 6
3, 64, a non-multiplexed non-multiplex mode digital luminance signal Ye and a digital color difference signal (RY) e,
(BY) e or primary color signals Ge, Re, Be are output.

In response to the multiplex / non-multiplex mode switching control signal c4 from the input terminal 67, the selector 66 closes to the contact y side to select the control signal c3 of a constant level "H" from the control signal generating circuit 65. , The selectors 18, 19, and 20 are all fixed to the contact o side, and the digital luminance signal Yo and the digital chrominance signal (R) composed of the odd-numbered sample data sequence without being multiplexed are output from the output terminals 25 to 27. -Y) o, (BY) o or primary color signals Go, Ro, Bo signals are output. Again,
From the output terminals 62, 63, and 64, the digital luminance signal Ye and the digital color difference signals (RY) e and (BY) e or the primary color signal G
e, Re, and Be are output.

As described above, in the second embodiment, by controlling the selector 66 to switch, a digital luminance signal in which odd-numbered sipe data and even-numbered sample data are alternately arranged and a chrominance signal. A multiplex mode that can obtain a signal or three primary color signals and a non-multiplex mode that can obtain a digital luminance signal and a color difference signal or a three primary color signal for each of odd-numbered sipe data and even-numbered sample data are selected. be able to.

As a result, an optimal output method can be appropriately selected according to the specification of the clock rate handled by the D / A converter or other signal processing circuits connected to the subsequent stage or externally.

[0049]

As described above, according to the present invention,
Since the basic configuration is two-phase processing of a video signal, it can be applied to various display devices such as a display device for a personal computer including a normal NTSC TV display device, and can realize high-quality image display. The image signal can be selectively output in the form of a luminance signal and a color difference signal or an RGB signal. Further, since the output signal has a switching function of a one-phase or two-phase format, it can be connected to various external devices and used for general purpose. It will be excellent in property.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of a video signal matrix conversion device according to the present invention.

FIG. 2 is a timing chart showing operations of a demultiplexer and an interpolation filter in FIG.

FIG. 3 is a block diagram showing a specific example of an interpolation filter in FIG. 1;

FIG. 4 is a block diagram showing a specific example of an RGB signal conversion switching circuit in FIG. 1;

FIG. 5 is a timing chart showing an operation of the multiplexer in FIG. 1;

FIG. 6 is a block diagram showing a second embodiment of the video signal matrix conversion device according to the present invention.

[Explanation of symbols]

 1 to 3 A / D converter 4 Demultiplexer 5 Latch circuit 6 Signal processing circuit 7 Matrix conversion circuit 10 GY signal generation circuit 14 to 16 Interpolation filter 17 RGB conversion switching circuit 18 to 20 Multiplexer 21 D / A converter 22 Input terminals for luminance signal 23, 24 Input terminals for color difference signal 25 to 27 Output terminal 28 Display device 29 Control signal generation circuit 62 to 64 Output terminal 65 Control signal generation circuit 66 Selector

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Mitsuo Nakajima 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside the Multimedia System Development Division of Hitachi, Ltd. (72) Inventor Hatsuji Kimura Yoshida, Totsuka-ku, Yokohama-shi, Kanagawa No. 292, Hitachi, Ltd. Multimedia System Development Division, Hitachi, Ltd. (72) Inventor Yasutaka Tsuru 292, Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture, Japan Multimedia System Development Division, Hitachi, Ltd. (72) Inventor Kentaro Teranishi, Kanagawa 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Japan Inside the multimedia system development headquarters of Hitachi, Ltd. (72) Inventor Haruki Takada 292, Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Pref. Inventor Kazuo Ishikura Tokyo Terashihigashi Koigakubo chome 280 address Hitachi, Ltd. center within the Institute

Claims (3)

[Claims] A / D conversion means for converting the color difference signals (RY) and (BY) into digital color difference signals, and converting the luminance signal Y into the color difference signals (RY) and (BY). A / D conversion means for converting the digital luminance signal Y into a digital luminance signal at a higher bit rate, distributing the sample data of the digital luminance signal Y, and forming a first and a second sequence of the distributed sample data. A demultiplexer for two-phase conversion into a digital luminance signal; signal generation means for generating a digital color difference signal (G-Y) from the digital color difference signals (RY) and (BY); GY), (RY) and (BY) are converted to the first digital color difference signals (GY), (RY) and (BY), respectively.
Y), the first digital color difference signals (G-Y), (R-
Y) and (BY) for each of the first digital color difference signals
A second digital color difference signal composed of sample data for interpolating between (GY), (RY), and (BY) sample data
Interpolating means for generating (GY), (RY), and (BY); the first and second digital color difference signals (GY), and the first and second luminance signals; From the first and second primary color signals G having different sample data from the first and second digital color difference signals (RY) and the first and second luminance signals having different sample data. The second primary color signal R is further converted into first and second primary color signals B having different sample data from the first and second digital color difference signals (BY) and the first and second luminance signals. Respectively, and the first and second digital luminance signals and the first and second digital color difference signals (RY) and (BY) or the first and second primary color signals R and G , B; and the first and second digital luminance signals or the first and second digital luminance signals output from the conversion switching means. A first multiplexer for alternately selecting sample data of the digital primary color signal G and generating a one-phase digital luminance signal or a digital primary color signal G; and the first and second digital color difference signals output from the conversion switching means. Signal (RY) or the sample data of the first and second digital primary color signals R are alternately selected, and a one-phase digital color difference signal (RY) or digital primary color signal R is selected.
And a second multiplexer for generating the first and second digital color difference signals (BY) or sample data of the first and second digital primary color signals B output from the conversion switching means. And one-phase digital color difference signal (BY) or digital primary color signal B
Video signal matrix conversion characterized by comprising a third multiplexer for generating a video signal and a video signal comprising a luminance signal and a color difference signal and a video signal comprising an RGB signal. apparatus. 2. The video signal matrix conversion device according to claim 1, wherein the demultiplexer and the first to third multiplexers are controlled by a common control signal and operate synchronously. 3. The digital chrominance signal according to claim 1, wherein each of the first to third multiplexers is a single-phase digital luminance signal and a single-phase digital color difference signal.
A first mode for generating and outputting (RY), (BY) or one-phase digital primary color signals G, R, and B;
The first digital luminance signal and the second mode for selecting and outputting the first digital color difference signals (RY), (BY) or the first primary color signals G, R, B are provided. And selectively selecting the second digital luminance signal and the second digital color difference signals (RY), (BY) or the second digital primary color signals G, R, and B. A video signal matrix conversion device, comprising: an output terminal for output.