JPH10254424A - Video signal converting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make flicker on a large screen inconspicuous by providing a first and a second signal converting means and a signal changeover means for changing over the outputs of two signal converting means. SOLUTION: In a first field of a first signal converting means, the odd numbered or even numbered scanning line is written, a scanning line not written in the first field is written in a second field, thereafter, the operation in the first and second fields is repeated and, in the field fV2 of the second signal converting means, operation for sequentially writing a scanning line of one field of a television signal or operation for sequentially writing a signal formed from adjacent scanning lines of one field of the television signal is performed. An SVGA video signal is sent to a high-speed switch 14 after being converted into an analog signal by a DA converter 13, changed to a TV video signal and outputted to a video signal output terminal 5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal converter.

[0002]

2. Description of the Related Art Conventionally, the frame frequency of a PC (personal computer) video signal is often close to 60 Hz, and there has been a problem that large-area flicker in which the entire screen flickers is conspicuous.

As a technique for solving the problem of the large screen flicker, a method of increasing the field frequency of PAL from 50 Hz to 100 Hz in the field of TV video signals is known. On Consumer Electronics
C.E.33, Number 3, 1987, pp. 192-
Page 198 (IEEE Transactions on Consumer
Electronics CE33, No.3, 1987, pp19
2-198).

[0004]

In the case of a PC video signal, a TV image may be displayed on a small screen.
Convert to video signal and display. The field frequency of TV is 60 Hz in NTSC, 50 Hz in PAL,
When increasing the frame frequency of the PC video signal to 60 Hz or more to make large screen flicker inconspicuous,
A signal conversion technique for increasing the field frequency of the signal is also required.

[0005]

In order to solve the above-mentioned problems, the present invention relates to a method of converting a video signal having a frame frequency fV1 and a horizontal scanning frequency fH1 into one frame of the video signal, which is closest in time to the frame. Holding in the field,
First signal conversion means for converting a signal having a field frequency fV2 close to 120 Hz and having a horizontal scanning frequency fH1 (= fH2); a field frequency fV3; N3 scanning lines per frame; and a horizontal scanning frequency fH3
A television signal of (= N3 * fV3 / 2) has a field frequency of fV2 and a horizontal scanning frequency of fH2, and a signal of one field of the television signal is written in a field which is temporally closest to the field. There are second signal conversion means for converting the signals into signals, and signal switching means for switching the outputs of the two signal conversion means.

Preferably, in the first field of the first signal conversion means, only the odd-numbered or even-numbered scanning lines of one frame of the video signal are written, and in the second field, the scanning not written in the first field is performed. Then, the operation of the first and second fields is repeated, and in the field of fV2 of the second signal conversion means, the operation of sequentially writing the scanning lines of one field of the television signal, or one field of the television signal To sequentially write signals generated from adjacent scanning lines.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which the present invention is applied to an apparatus for displaying a TV image on a sub-screen of a PC image will be described below.
This will be described with reference to the drawings.

FIG. 1 is a block diagram of a signal conversion apparatus according to an embodiment of the present invention which displays an SVGA signal having a frame frequency of 60 Hz and a horizontal scanning frequency of 38 kHz as a PC video signal and displays a TV signal on a sub-screen thereof. . 1 is P
This is a C video signal input terminal, and usually receives RGB3 signals in many cases. However, in the figure, only one signal is displayed for simplicity. 2 is a PC synchronization signal input terminal. 3 is TV
The video signal input terminal 4 is a TV synchronization signal input terminal,
Reference numeral 5 denotes a video signal output terminal, and reference numeral 6 denotes a synchronization signal output terminal.

Reference numerals 11 and 16 are AD converters, 12 and 17 are memories, 13 and 19 are DA converters, 14 is a high-speed switch,
Reference numeral 15 denotes a controller, reference numeral 18 denotes a signal processing circuit, and reference numeral 20 denotes a pulse generation circuit. FIG. 2 shows an example of the signal processing circuit 18.

[0010] The SVGA video signal is converted into a digital signal by an AD converter 11 and written into a memory 12. The controller 15 converts the SVGA synchronization signal into the memory 12
A new write / read clock and a new frame synchronization signal having a frequency of 120 Hz are generated. For the clock, for example, a signal of 40 MHz based on the SVGA horizontal synchronization signal is created and used.

The operation of the memory 12 will now be described with reference to FIGS. (A) is an SVGA video signal, numbers are line (scanning line) numbers, and (b) is an SV
The vertical synchronization signal of GA is shown. The video signals are written to the memory 12 in the order of the line numbers, and when the video signals are read out, as shown in FIG.
The data is read out in 20 seconds, and the even line is read out in the next 1/120 seconds. These operations are controlled by the controller 15, and the newly created 120 Hz vertical synchronizing signal (d)
And a 38 kHz horizontal synchronization signal are output to a synchronization signal output terminal 6. The SVGA video signal is converted to an analog signal by the DA converter 13, and then sent to the high-speed switch 14,
The video signal is switched to a TV video signal and output to the video signal output terminal 5.

FIG. 4A shows a scanning line structure when the signal after the above processing is displayed on a display. The white circles indicate the SVGA signal scanning lines to be input, the black circles indicate the scanning lines to be output, and the arrows indicate the operation of changing the signal.
The overlap between the white circle and the black circle indicates an operation of writing the scanning line signal of the white circle to the scanning line of the black circle. Numerals 1 and 2 are line numbers, and correspond to the numerals in FIG. By this processing, 60 Hz, 600 cph (cycle per heigh
The SVGA signal of t) is converted into a signal of 120 Hz and 600 cph, and the new signal alternately displays the field in which only the odd lines of the SVGA are written and the field in which only the even lines are written. As a result, the conventional 60H
The large-area flicker of z is removed, and the flicker of the entire screen disappears.

Next, processing of a TV signal will be described. The TV video signal is also assumed to be an RGB signal like the PC video signal. The TV video signal is converted into a digital signal by the AD converter 16 in FIG.
With the clock generated at 0, the TV signal is 1 / 15.7 ms per scan line when the signal is NTSC, and when the signal is PAL,
The data is written to the memory 17 in 1 / 15.6 ms. The clock frequency is, for example, 4 of fSC (color subcarrier frequency).
Double or 13.5 MHz is used. This video signal is 1/38 per scanning line by the signal of the controller 15.
ms (clock frequency 40 MHz), and is sent to the signal processing circuit 18.

In the signal processing circuit, as shown in FIG.
The video signal input from the terminal 101 is divided into two paths.
In the path, the signal is sent as it is, and in one path, two pixels arranged vertically by the 1H delay element 111 are added, and the average value of the upper and lower two pixels is output to the output of the element 112 which multiplies the signal by １ ／. The signal from the controller 15 is input to the terminal 103, and the signal of the two paths is
/ 120 seconds and output to terminal 102. As a result, the content of the output changes in units of 1/120 seconds.

Processing when the TV signal is an NTSC signal is as follows:
This will be described with reference to FIGS. (E) NTS
The C video signal and numbers are line numbers, and (f) shows a vertical synchronization (field) signal. The video signal is written into the memory in the order of the line number, and is sent from the signal processing circuit 18 by the 120 Hz signal (h) of the controller 15.
As shown in (g), video signals are output in the order of line numbers in the first 1/120 second, and the average value of pixels arranged vertically in the next 1/120 second is output in the order of lines. FIG.
In FIG. 2, the average value of the lines 1 and 2 is represented by 1 & 2, and the other lines are represented by the same notation.

FIG. 4B shows a scanning line structure when an NTSC signal is displayed on a display. Open circles indicate NTSC signal scanning lines to be input, black circles indicate scanning lines to be output, and broken arrows indicate averaging operations of two signals. Numbers such as 1 and 2 indicate NTSC line numbers. Other symbols are the same as those in FIG. By this processing, it is understood that the NTSC signal of 60 Hz is converted into a signal of 120 Hz, and a line signal and an average signal of upper and lower lines (pixels) are displayed for each field.

The output from the signal processing circuit 18 is converted to an analog signal by a DA converter 19,
, And is switched to an SVGA signal by a signal indicating the position of the child screen from the controller 15. As a result, SV
A TV image is displayed on the GA sub-screen.

The processing when the TV signal is a PAL signal will be described with reference to FIGS. (I) is a PAL video signal, numbers are line numbers, and (j) is a vertical synchronization (field) signal. As in the case of NTSC, the 120 Hz signal (l) of the controller 15
As shown in (k), the video signal is output in the order of the line number in the first 1/120 second, and the average value of the vertically arranged pixels is output in the order of the line in the next 1/120 second.

FIG. 4C shows a scanning line structure when the PAL signal is displayed on the display. P where white circle is input
The AL signal scanning line represents a scanning line from which a black circle is output. The numbers indicate the PAL line numbers. The other symbols are shown in FIG.
Same as (b). An operation in which the PAL signal is written in a new 120 Hz field which is closest in time to that field, and the signal of the scanning line of the PAL signal field is sequentially written to the corresponding scanning line of the 120 Hz field, or the operation next to the PAL signal field An operation of writing an average value of matching scanning lines (upper and lower pixels) into a 120 Hz field is performed.

By the above operation, the vertical synchronizing signal frequency of the TV signal is also set to 120 Hz, so that even when the PC image and the TV image are displayed on the same screen, large area flicker becomes inconspicuous.

In the above embodiment, the PC signal is S
Although the VGA signal is selected, signals such as VGA and XGA can also be selected. The signal indicating the sub-screen position of the PC signal is P
There is also a method of generating using a C video signal.

[0022]

According to the present invention, when increasing the frame frequency of a PC video signal so as to make large screen flicker of the PC video signal inconspicuous, even when a TV image is displayed on a sub-screen of the PC image, Since the TV signal is converted according to the PC signal, large screen flicker can be made inconspicuous.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a video signal conversion device according to the present invention.

FIG. 2 is a block diagram showing one embodiment of a signal processing circuit of the present invention.

FIG. 3 is an explanatory diagram showing waveforms of the video signals of FIGS. 1 and 2;

FIG. 4 is an explanatory diagram showing a structure of a scanning line of the video signal of FIGS. 1 and 2;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... PC video signal input terminal, 2 ... PC synchronous signal input terminal, 3 ... TV video signal input terminal, 4 ... TV synchronous signal input terminal, 5 ... PC video signal output terminal, 6 ... PC synchronous signal output terminal, 11, 16: AD converter, 12, 17: memory, 13, 19: DA converter, 14: high-speed switch, 15: controller, 18: signal processing circuit, 20: pulse generation circuit.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification code FI H04N 5/45 H04N 5/45 7/01 7/01 C

Claims (2)

[Claims] 1. A frame frequency fV1 and a horizontal scanning frequency f
In the H1 video signal, a first frame of the video signal is converted into a signal having a field frequency fV2 close to 120 Hz and a horizontal scanning frequency fH1 (= fH2) in a field closest to the frame in time. Signal conversion means, the field frequency is fV3, the number of scanning lines per frame is N3, and the horizontal scanning frequency is fH3 (=
N3 * fV3 / 2) into a signal having a field frequency of fV2, a horizontal scanning frequency of fH2, and a signal of one field of the television signal written in a field which is temporally closest to the field. A video signal conversion device comprising: a second signal conversion unit for converting; and a signal switching unit for switching the outputs of the two signal conversion units. 2. The first field of the first signal conversion means writes only odd-numbered or even-numbered scanning lines of one frame of the video signal, and the second field scans data not written in the first field. Then, the operation of the first field and the second field is repeated, and in the field of fV2 of the second signal conversion means, the operation of sequentially writing one field scan line of the television signal or the television signal 2. The video signal conversion apparatus according to claim 1, wherein the operation of sequentially writing signals generated from adjacent scanning lines in one field is performed.