JPH0997218A - Method and device for managing flash rom and computer control equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To decrease dispersion in the number of times of erasure for every erasure unit concerning a managing system with which a flash ROM can be made adaptive to a filing system. SOLUTION: Plural sectors composed of data areas and managing areas corresponding to these data areas are formed in the flash ROM and state information (such as a sector number 154, occupied flag 155 and used flag 156) showing the storage states of respective sectors is stored in the managing areas so that the memory management of the flash ROM can be performed. When the instruction to start garbage collection processing is given for putting invalid data inside the flash ROM in order, while referring to an erasure time counter 152, the erase block of an erasure object is decided. When erasing processing is executed to the decided erase block of the erasure object, the erasure time counter 152 of the erase block is incremented by one.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flash ROM management method and apparatus for a computer and the like, and a computer control apparatus.

[0002]

2. Description of the Related Art Currently, there are various types of flash ROMs, which are roughly classified into a type developed for a flash disk and a BIOS of a personal computer.
There is one developed for.

In the former case, the erase unit is 512 bytes which is generally used in a hard disk, and the compatibility with the file system is very good. The latter flash ROM can be erased only in large block units such as 64K. Some PROMs require a voltage such as 12V as a write voltage. The latter flash ROM can be obtained at a lower cost, but it cannot be used as a particularly small-capacity recording medium due to its poor compatibility with the file system.

[0004]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
The flash ROM designed for S has a large erasing unit and has poor compatibility with the file system, but is inexpensive and easily available. Therefore, if such a flash ROM can be applied to a file system, an inexpensive small-capacity recording medium can be provided.

According to the present invention, a flash R having a large erase unit is used.
A flash ROM management method and apparatus capable of adapting an OM with a file system.

The file system allows flash RO
When updating the data stored in M, it is conceivable to overwrite the data area with new data or invalidate the data in the data area and write the data to another data area. Since data cannot be overwritten in the flash ROM, data is written to other data areas. As a result, invalid data is accumulated and the utilization efficiency of the flash ROM decreases. Therefore, when managing access to the flash ROM compatible with the file system, it is essential to erase invalid data on the flash ROM.

As described above, when the flash ROM having a large erase unit is managed so as to be applied to the file system, it is indispensable to execute the erase operation in the erase unit. However, if the selection of the erase unit to be the target of such an erase operation is performed based on, for example, only a large amount of invalid data in the erase unit, the erase unit in which the erase operation is performed is biased. This imbalance causes the erasing units to have different temporal lives.

The present invention has been made in view of the above problems, and in a management system capable of adapting a flash ROM to a file system, it is possible to reduce the variation in the number of erases for each erase unit. An object of the present invention is to provide a flash ROM management method and device and a computer control device.

[0009]

A flash ROM management apparatus of the present invention for achieving the above object has the following configuration. That is, a plurality of storage blocks each including a data area and a management area corresponding to the data area are formed in the flash ROM, and status information indicating the storage status of the data area in each storage block is stored in the management area. Management means for managing access to the flash ROM based on the status information, and with respect to erase blocks in the flash ROM, a storage block in which valid data exists in the data area is extracted based on the status information, and the contents are moved. Erasing means for erasing the erasing block, counting means for counting the number of times erasing by the erasing means is performed for each erasing block, and storing the erasing number in the memory area of the erasing block; Erasing block to be erased in the means based on the number of times of erasing. That.

Further, preferably, the deciding means decides, as an erasing target, an erasing block having a small erasing number among erasing blocks including invalid data. By preferentially erasing an erase block containing invalid data and having a small erase count, the erase count can be dispersed among the erase blocks, and rewrite durability can be reduced.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the accompanying drawings.

[First Embodiment] <Structure of Camera System> FIG. 1 is a block diagram showing the structure of a camera system according to the first embodiment. The camera system includes an electronic camera, an external storage medium 17 that can be attached to and detached from the electronic camera, a PC communication interface 19, and a personal computer 22 communicatively connected to the electronic camera via the PC communication interface 19.

Reference numeral 1 is a lens, and 2 is a CCD unit for outputting the light passing through the lens 1 as an electric signal. Three
Is an A / D converter, which converts an analog signal from the CCD unit 2 into a digital signal. Reference numeral 4 is an SSG unit, which supplies a synchronization signal to the CCD unit 2 and the A / D converter 3. A CPU 5 realizes various controls in the camera system.

A signal processing accelerator 6 realizes signal processing at high speed. 7 is a battery, 8 is a battery 7
DC / D for supplying more power to the entire electronic camera
It is a C converter. A power controller unit 9 controls the DC / DC converter 8. 1
Reference numeral 0 is a microcomputer that controls the panel operation, display device, and power supply. Reference numeral 11 is a display device for displaying various information to the user, and a liquid crystal panel or the like is used. A control panel 12 includes a release switch that is directly operated by the user.

A ROM 13 stores a system program such as an OS. Reference numeral 14 is a DRAM, which is the main memory of the electronic camera. 15 is a flash ROM,
Used as a built-in storage medium. Reference numeral 16 is a PCMCIA card interface unit, 17 is an external storage medium such as an ATA hard disk, and 18 is an expansion bus interface. A PC communication interface 19 connects a personal computer or the like to exchange data. 20 is a DMA controller and 21 is a strobe. Also, 2
Reference numeral 2 is a personal computer, which communicates with the electronic camera via the PC communication interface 19.

<Photographing Operation> The photographing operation of this electronic camera will be briefly described. When the user presses the release switch on the control panel 12, the CPU 5 detects that and starts the photographing sequence. The following operations are all C
It is assumed that the control is performed by PU5.

By pressing the release switch, S
SG4 drives CCD2. The analog signal output from the CCD 2 is converted into a digital signal by the A / D converter 3. The output of the A / D converter 3 is DMA-transferred to the DRAM 14 by the DMA controller 20. When the DMA transfer for one frame is completed, the CPU
5 starts the signal processing sequence.

In the signal processing sequence, the flash RO
The signal processing program from M15 is stored in the main memory (DRAM1
4) Read out, transfer the data in the main memory to the signal processing accelerator 6, and perform signal processing. However, the signal processing accelerator 6 does not perform all signal processing,
It is an arithmetic circuit that helps particularly time-consuming processing performed by the CPU 5, and operates in cooperation with the processing software of the CPU 5. When part or all of the signal processing is completed, it is recorded in the flash ROM 15 as an image file.
If the file format recorded at this time requires compression processing, compression is also performed.

The signal processing program is a flash ROM
It is one of the files managed by the file system among the fifteen. The camera program is stored in the ROM 13 together with the OS and file system. The camera program recognizes a file with a specific file name as a program.

Since the files are discontinuously arranged in the flash ROM 15 and the file system of this embodiment frequently rearranges the files, the flash ROM 1
The control program in 5 cannot be directly executed by the CPU. Therefore, the main memory (DRAM 14) must be read and executed. Further, the main memory should not be software that is supposed to be stored at a specific address because the memory manager dynamically allocates the memory location. Therefore, the file of the program that performs the signal processing in this embodiment has the format shown in FIG.

FIG. 41 shows the flash R in this embodiment.
It is a figure explaining the storing state of the control program in OM. In FIG. 41, the identification code is a code for confirming that the file is a program. A file is represented as a set of variable length records. The record first has an ID for identifying the type of information stored in the record, and then stores a value indicating the size of the record.

The program record and the relocation information record are stored in the file. The program code is data as shown in FIG. 42, for example.
FIG. 42 is a diagram showing an example of a program code expressed by a relative address. In FIG. 42, there is a jump instruction at the address 0050, but the CPU recognizes this instruction as a jump instruction to the absolute address. The operand of this instruction is represented by a relative address.

The data of the relocation information record shown in FIG. 42 is stored in the format shown in FIG. That is, in the program of FIG. 42, data that must be converted to an absolute address (data that is expressed as a relative address)
An address table indicating the program address of is stored as relocation information.

When the area for loading the file shown in FIG. 41 into the main memory is secured, the memory manager of the OS of the ROM 13 determines the address. The allocation of the memory manager is a function equivalent to the alloc function in C language. When the memory manager allocates address 8710 for the program, the program is loaded as shown in FIG. FIG. 44 is a diagram showing a program code when the program of FIG. 41 is mapped to address 8710 in the main memory. The operand of the jump instruction is replaced with the actual absolute address. A program for performing a work of reading out the program into the main memory while converting into the real address is stored in the ROM 13.

With the above configuration, the signal processing software and the compression software can be stored in the storage medium in a file format. As a result, after the camera reaches the end user, it is possible to support a wide variety of file formats, such as new signal processing algorithms, WindowsMP (Trademark) BMP format, TIFF format, or new formats that will appear in the future. Becomes

As described above, the electronic camera according to the first embodiment files captured images in the flash ROM 15.

<Device Driver Interface> FIG. 2
FIG. 3 is a diagram showing a hierarchical structure of a file system in the electronic camera of this embodiment. The highest layer is the user application 101. User application 10
1 is software that runs inside the electronic camera, which opens a file with a file name, reads / writes it, and then closes it.

The file system API layer 102 is called by the function call directly from the user application 101. The file system API layer 102 manages drive names and file systems in association with each other. Since it is configured to mount the file system architecture layer for each drive, it is possible to mix multiple file system architectures.

File system architecture layer 103
Is the part that actually manages the files. The lowest layer is the block device layer 104. The file system architecture layer 103 realizes file input / output using the service provided by the block device layer 104. The block device layer 104 manages data in units of sectors, and one sector is, for example, 512
It is a byte. The block device layer 104 absorbs a difference in input / output control for each device and a difference in parameters such as a head and a cylinder. With this configuration, it is possible to mix a plurality of types of devices at the same time.

The electronic camera of the present embodiment is characterized by a flash ROM storage management method in the block device layer 104.

The flash ROM 11 shown in FIG.
At present, there are various types, but there are broadly classified types, one developed for flash disk and the other developed for BIOS of personal computer. In the former, the unit of erasure is 512 bytes, which is generally used for hard disks, and the compatibility with the file system is very good. The latter flash ROM is designed so that it can be erased only in large block units such as 64k. Some PROMs require a voltage such as 12V as a write voltage. However, the latter type of flash ROM is inexpensive and easily available. In the present embodiment, a service similar to a hard disk is provided for a file system even though it is a flash ROM having the latter feature.

<Flash ROM Driver Interface> Generally, the block device provides the following two services to the file system. That is, (1) reading from the sector designated by the logical sector number, and (2) writing from the sector designated by the logical sector number. In addition to this, if (3) the function of releasing the sector specified by the logical sector number is provided, the flash ROM driver can erase unnecessary sectors as necessary.
The flash ROM can be erased efficiently.

The function mentioned in (3) is a function which is not necessary in the normal DISK, but in a system having a cache, it can be positively deleted from the cache list, so that the effect of increasing the cache hit rate is as a result. There is. The file system notifies the device driver of unneeded sectors due to file deletion or the like by using the function (3). Erasing the flash ROM is a very time-consuming process, but it is preferable to perform it in the background process because it consumes almost no CPU time.

As will be described later in <FAT cache>, the cache of this embodiment discards the oldest data in the cache list when accessing new data (data that is not on the cache). Move unnecessary sectors to the end of the cache list (ie
By moving the oldest accessed data to the back of the cache), it is less likely that valid data will be discarded from the cache. Especially in a system such as a compiler that generates many intermediate files, there is a high possibility that intermediate files to be deleted remain in the cache, and the above cache management is very effective in improving the hit rate.

FIG. 3 is a diagram showing a declaration statement in which the management block of the device driver is described in C language. N of structure
ext is a ring pointer to the next device, and is used for searching the device in the memory. Dev
Name is used as the name of the device. Ini
tDev is a pointer to the device initialization routine. ShutDown is a pointer to the device shutdown routine. ReadSector
Is a pointer to a routine for designating a logical sector and transferring the contents of the medium to the buffer. WriteSe
ctor is a pointer to a program for designating a logical sector and transferring (writing) the contents of the buffer to the medium. ReleaseSector is a pointer to a routine for designating a logical sector and releasing the sector.

The file system uses the device driver via this structure. ReleaseSec for fixed and floppy disks
A pointer to a program that does nothing is assigned to tor. Alternatively, it may be a pointer that deletes the specified sector from the cache list of the disk cache.

<Flash ROM Management Method> Data writing to the flash ROM is performed in sector units from the upper layer file system. FIG. 4 is a diagram showing an example of a sector structure on the flash ROM. In FIG. 4, 151 is an erase block. The erase block 151 is a unit of erasing and is called a sector in the technical term of the flash ROM. However, the "logical sector" that is the unit handled by the file system
In order to distinguish it from, it is called an erase block here.

According to FIG. 4, a plurality of flash ROMs 15 are installed in the system, and each flash ROM is
Reference numeral 15 is composed of a plurality of erase blocks 151. Further, each erase block 151 is shown to be composed of an erase count counter 152 and a plurality of sectors 153. The erase count counter 152 is a part used for counting the number of erases of the erase block 151. Each sector 153 has a management area and a data area. The management area is composed of a sector number 154 indicating a logical sector number, a busy flag 155 indicating whether or not the sector is effectively used, and a used flag 156 indicating that the use as a sector is completed. The data area is composed of a 512-byte data section 157.

It is not necessary to arrange the data area and the management area adjacent to each other, and it is conceivable to manage them collectively as shown in FIG. FIG. 5 is a diagram showing a configuration in which the management area data and the data area are separately stored. In the sector number table, each sector number 154 of the plurality of sectors 153
Is stored. The flag table stores a used flag 155 and a used flag 156. Furthermore,
The contents of the data section 157 are stored in the data table. Although it is possible to have the data structure as described above, it is preferable that at least the management area and the data area corresponding thereto are stored in the same erase block.

The system is "in-use flag 155".
The “used flag 156” is evaluated more preferentially. FIG. 6 is a diagram showing the meaning corresponding to the state of each flag. In the figure, FALSE has the same value as the state after erasing. Even if the in-use flag 155 is TRUE, if the used flag 156 is FALSE, the data in the sector is invalid.

<Logical Sector Rewriting of Flash ROM> Like the PROM, the flash ROM must be erased once and then rewritten to rewrite data. Moreover, the minimum unit of erasure is large (for example, 64k
(Byte) Erase time is long (for example, 1 second). Therefore, when the upper-layer file system attempts to rewrite a specific sector, the logical sector is moved to the erased area to apparently rewrite the data of the logical sector without performing the erasing operation.

FIG. 7 is a diagram for explaining a sector rewriting procedure. The rewriting of the 8th sector (sector whose logical sector number is 8) will be described in detail with reference to FIG. In FIG. 7, the left side is the state before rewriting (state (a)), and the right side is the state after rewriting (state (b)). Further, in FIG. 7, the numbers in the management area represent logical sector numbers, and (in use) indicates that the in-use flag 155 is TR.
In the UE, the used flag 156 indicates the FALSE state, and (used) indicates that both the in-use flag 155 and the used flag 156 are TRUE.

In the place of "sector number 8 (in use)", 8
The data of No. sector is stored. Now, suppose that the 8th sector is used as a part of a FAT or a file and a request for rewriting the 8th sector is issued from the upper layer when changing the contents. When a rewrite request is generated, the flash ROM device driver is
The unused sector of M is searched, and the sector number and the updated data are stored using that location as the location of the new 8th sector.
The busy flag is set to TRUE. Next, the used flag of the sector which was the 8th sector before is set to TRUE. Rewriting of the data of the 8th sector is realized by such a procedure.

<Garbage Collection> When the rewriting of the logical sector is executed by the above method, most of the area of the flash ROM eventually becomes the “used sector”. Therefore, it is necessary to erase the flash ROM once at a certain timing to restore the "used sector" to the "unused sector". The basic garbage collection operation will be described with reference to FIG. FIG. 8 is a diagram for explaining the garbage collection operation of the flash ROM in this embodiment.

In the figure, (A) shows a state before garbage collection. To simplify the description, the flash ROM of this example is assumed to be composed of erase blocks each having a size of six sectors. The erase block (1) has three used sectors and three in-use sectors, and the erase count is 5 (the erase count counter 152 has a content of 5).
Is). The erase block (2) has one used sector, one used sector, and four unused sectors.
The erase count is 9. Garbage collection is started from this state.

First, an erase block to be adjusted is selected. Here, the erase block to be adjusted is an erase block to be erased. When selecting an erase block to be rearranged, the rearrangement efficiency can be improved by preferentially selecting an erase block including many used sectors. However, if the erase blocks with a small number of erases are preferentially sorted out except when the used sectors are not included, the erase blocks in the chip can be used evenly and the rewriting endurance can be dispersed. You can Details of the selection procedure will be described later using a flowchart.

Now, it is assumed that the erase block (1) is selected as a rearrangement target. Next, the in-use sector of the erase block (1) which is the rearrangement contrast (the in-use flag is TRU
At E, the sector whose used flag is FALSE) is moved to another erase block. The procedure for moving the in-use sector is the same as when rewriting the sector, searching for unused sectors in other erase blocks, copying the contents of the data area and management area in the in-use sectors, and using The used flag of the medium sector is set to TRUE. The processing when there are no unused sectors will be described later.

FIG. 8B shows an erase block (1).
All the in-use sectors of are moved to the erase block (2). As a result, erase block (1)
In this case, only used sectors exist.

Next, an erase block composed of only used sectors is searched. Here, the search is performed because all the sectors in the erase block may happen to be used sectors during the normal rewriting operation. Then, erase is performed on the retrieved erase block. It takes time to erase, but since it is possible to erase multiple erase blocks at the same time, it is better to erase multiple erase blocks at once. When the erasing is completed, the value before erasing plus 1 is written to the erase count counter. This completes garbage collection.

FIG. 8C shows the state at the end of garbage collection. Since it is more efficient to erase erase blocks at the same time as much as possible, it is good to adjust many erase blocks at the same time as long as there are used sectors and unused sectors. If the erase count value is extremely smaller than that of other erase blocks, rewriting durability can be dispersed by rearranging even if the used sectors are not included. In addition, once arranged, the arrangement of the data changes, which is a trigger for rewriting endurance distribution.

<Case of No Unused Sector> Next, the garbage collection procedure in the case where there is a used sector in the system but there is no unused sector will be described with reference to FIG. FIG. 9 is a diagram for explaining the operation of garbage collection when there are no unused sectors.

First, the erase block (1) is selected as a rearrangement target in accordance with the basic garbage collection procedure described above. Next, an unused sector for moving the used sector of the erase block (1) is searched. If there are unused sectors, the sectors are moved in the same manner as the basic garbage collection described above.

On the other hand, if there is no unused sector as a result of the search, a memory block of a size necessary for saving data is allocated from the heap area of the DRAM 14. Then, the used sector in the erase block to be adjusted is DR
Copy to AM14. In this case, flash ROM
Unlike the case where the sector is moved to another area of, the used flag of the original sector is not set to TRUE. This is because, if an accident such as the battery 7 of the electronic camera is removed at this point, the data in the DRAM will be lost and the data cannot be restored. FIG. 9B shows DR
The sector copied to the area of AM14 is represented.
When all used sectors of the erase block to be adjusted can be saved, the erase block to be adjusted is selected and erased (see (C) in FIG. 9). After erasing, there should be many unused sectors. Therefore, the unused area is searched next and the data saved in the DRAM 14 is restored. FIG. 9D shows a state where the garbage collection is completed.

Even if garbage collection is performed by the above procedure, data cannot be restored if an accident such as removal of the battery 7 of the electronic camera occurs after the erase block is erased until the data is restored. . In other words, it is possible to keep the system safety better by not saving the sector data in the DRAM 14 as much as possible. Once the DRAM is used for garbage collection, unused sectors are created. Therefore, 1
Garbage collection using the DRAM14,
If normal garbage collection is performed after that, the erasing time will be extra, but the safety can be improved. On the contrary, if the saving to the DRAM 14 is actively performed (for example, as long as there is a heap area), the efficiency can be improved because the number of erase blocks that can be sorted at the same time increases. Therefore, it may be configured so that it is possible to specify which of safety and efficiency is to be prioritized. Further, when the power of the system is supplied from the battery 7, safety may be prioritized, and when supplied from the AC adapter, efficiency may be automatically prioritized. This processing will be described later with reference to FIG.

<Preparing an extra erase block> If the remaining capacity becomes extremely small, garbage collection will occur frequently and the system performance will drop extremely. Such a situation can be avoided by using an erase block one more than the number of erase blocks that can store the total logical sectors. Assuming that 127 sectors can be stored per erase block, if all sectors are in use and the same one sector is rewritten 10 times, if there are no extra erase blocks, 10 erases and 1270 Sector writing occurs. However, if an extra erase block is prepared, only 10 sectors will be written.

Therefore, in this embodiment, since the number of erase blocks is determined by the chip configuration, the total number of logical sectors is designed so that at least one erase block remains.

<Timing of Garbage Collection> Garbage collection is extremely time-consuming because it involves an erase operation. Therefore, the ease of use of the camera depends on when the garbage collection is performed. For example, if the garbage collection is performed when it is not necessary to take a picture for several seconds such as with a self-timer, the user will not feel stress.

<Memory Location Management on RAM> Flash R
Since the sector number and the actual storage location are not associated with each other on the OM 15, the flash ROM 15 must be searched to read / write a specific sector. Therefore, when the system is rebooted, a storage location management table indicating the storage addresses of the respective sectors in the flash ROM 15 is created in the DRAM 114.
High-speed data reading and writing can be realized for 15. Once you create a storage location management table, flash R
It is possible to maintain the correct storage location management table only by updating the storage location of the storage location management table only when the storage location is changed by writing a sector to the OM 15 or garbage collection.

FIG. 10 is a diagram for explaining the storage location management table created on the DRAM. RA on the right side of the figure
The created storage location management table 140 on M is shown.
0 sector and 4 sector are values that mean no storage location (NUL
L) is included. These are the sectors that have not been written to the sector at all after formatting or the file system has released them.

The operation of the device driver when the file system issues a command to the driver to release an unnecessary sector due to file erasure or the like is as follows. First, referring to the pointer of the designated sector in the storage location management table 140 on the DRAM 14, the flash ROM
Find the appropriate sector currently in use on 15. Then, the used flag of the sector is set to TRUE, and the DRA
The absent value (NULL) is assigned to the pointer of the designated sector of the storage location management table 140 on M14.

When the contents of the sector are saved in the DRAM 14 for garbage collection, the pointer to the DRAM is assigned as the storage location. Also,
It is desirable to store the lock variable for prohibiting the simultaneous operation on the same logical sector in the table.

<File Restoration of MS-DOS> It is convenient that the electronic camera and the personal computer 22 can exchange data on a storage medium. The flash ROM management method described in the present embodiment can be used to implement a file system compatible with MS-DOS (trademark) currently popular in personal computers.
MS-DOS comes with a utility to restore files that have been deleted. However, in this embodiment, in order to improve the erase efficiency of the flash ROM, the data portion of the erased sector is lost. In principle, it is impossible to restore the medium erased by the camera with a personal computer.

If the file restoration function in the personal computer can be prohibited, such an accident can be prevented. In this embodiment, the file restoration function is prohibited by destroying the data used by the MS-DOS when restoring the file. How will this be explained?

In MS-DOS (trademark), when a file is deleted, an empty slot is created in the directory. Information such as file name / time stamp / first cluster is stored in the directory. FIG. 45 is a diagram showing the characteristics of the directory slot. EndOfDir indicating the end of the list is stored at the end of the directory slot.

Now, when File B is deleted, the beginning of the file name is replaced with a symbol indicating deletion, and the FAT cluster chain is deleted. This state is shown in FIG.

The undelete program tries to restore the file based on the information remaining in the second slot. Conversely, without this information, file restoration can be prevented.

FIG. 47 shows a state after a file is erased by the DOS compatible file system of this embodiment.
In the present embodiment, the file stored at the end of the directory entry table is overwritten on the entry of the file to be deleted, and EndOfDir is overwritten on the part that was the last file in the directory entry table. By doing so, it is possible to prevent the file restoration by the file restoration function.

When deleting a file, MS-DOS
There is also a method in which the data in the sector is left as it is (the sector is not released) and the unnecessary portion is erased while collectively referring to the relationship between the FAT and the data at the time of garbage collection.

<Background Preprocessing> In a certain flash ROM, the erasing process can be performed faster when the data before erasing is “0”. Confirmation of the erasing completion of the flash ROM is performed by data polling as in the data writing. Therefore, such a flash RO
When M is used, the performance can be improved by performing "preprocessing" in which the data of the sector which has been "used" in the background processing is rewritten to 0. If it is executed as the task with the lowest priority, the throughput will not decrease.

If a flag is prepared for the management of the "preprocessed sector" in the background of the preprocessing, the efficiency of the preprocessing can be improved.

Therefore, management flags capable of displaying four states of “pre-processed” in addition to “unused”, “in use”, and “used” are prepared in the sector of the flash ROM as possible states of the sector. Then it is efficient.

FIG. 38 is a flow chart showing a control procedure of preprocessing for improving the erase processing speed in this embodiment. In the figure, in step S2501, used sectors that have not been preprocessed are extracted. This is because the management flag in the sector is "used",
And it can be realized by extracting the sector which is not “preprocessed”. In step S2502, the data “0” is overwritten in the extracted sector. In step S2503, it is determined whether preprocessing has been completed for the sector. Since writing to the flash ROM is in 1-byte units, it is necessary to write the number of bytes for one sector. If the preprocessing for the sector has not been completed, the process advances to step S2504 to transfer control to another task.

As described above, since this processing is performed by the task with the lowest priority, this processing is executed again when the CPU 5 enters the idle state. In this case, the process returns to step S2503. At this point, if the previous writing is not completed, the process is directly transferred to another task.

When the writing of "0" is completed for all the bytes of the sector as described above, step S2503.
From step S2505, the management flag of the sector is set to a state indicating "preprocessed". And
Subsequently, the process returns to step S2501 to perform preprocessing for other sectors.

<FAT cache> In this system, the memory location is changed each time a write occurs, and an "unused sector" occurs each time. Therefore, it is expected that the total writing frequency will be drastically reduced if there is a cache that preferentially buffers the frequently used portion. The more memory you prepare as a cache, the better,
System memory is limited.

Although the data of a sector which is originally frequently used is highly likely to be present in the cache, when a large number of sectors which are rarely used are read and written, they are naturally discharged from the cache.

Therefore, if the management area managed by the file system is configured to be preferentially cached, an improvement in throughput can be expected. This is because the management area of the file system is updated frequently.

M widely used in personal computers
For S-DOS FAT system, 720k or 1.4
In the format format such as M, one cluster is composed of one sector, so even if the file is read sequentially, the FAT must be read once every two times.
When writing a file, more FAT accesses occur. Therefore, if many files are opened in the system, the cache hit rate drops.

Although it depends on the application software, the cache that deals with only FAT in the FAT system can secure an equivalent hit rate with a memory half that of the cache for the entire DISK. FIG. 11 is a diagram showing the hierarchical positioning of cache software. The cache software is an intermediate location between the file system and the flash ROM as shown in FIG.

FIG. 12 is a diagram showing the data structure on the main memory of the cache. The entire buffer is managed by a one-way linear list structure. The data is outdated in the order of search direction. If access is made in the order of logical sector numbers 12, 11, 6, and 5, the order will be as shown in FIG. Further, each sector is provided with a change flag, and when data is updated on the cache, the change flag is set to F.
Change from ALSE to TRUE. A read procedure and a write procedure of such a FAT cache are shown in FIG.
This will be described with reference to FIG. FIG. 13 is a flowchart showing the procedure for reading the FAT cache. Figure 14 is F
It is a flowchart showing the writing procedure of AT cache.

In FIG. 13, N is returned in step S1501.
Start reading the sector. N in step S1502
Determine if the sector is FAT. If it is not FAT, data is read from the flash ROM 15 in step S1509.

On the other hand, in step S1502, the N sector is F
If it is AT, the process advances to step S1503 to search the cache list. Here, the one-way linear list described with reference to FIG. 12 is searched. If N sectors exist in the cache, the flow advances to step S1507 to read data from the N sector buffer.

If N sector is not present in the cache list in step S1503, step S1503 is executed.
The process branches to 1504, and the data of the sector that has not been accessed for the longest (data of sector number 12 in FIG. 12) is discharged. First, in step S1504, the change flag of the last item in the cache list is determined. If the change flag is TRUE, processing proceeds to step S1505,
The changed contents are written in the flash ROM 15. If there is no change (when the change flag is FALSE), control is directly transferred to step S1506. It may seem strange to write during the read procedure, but it is more efficient not to do any write operations until the buffer is flushed out of the cache.

In step S1506, the flash ROM 1
The contents of N sectors are read from 5 to the last buffer in the list. In step S1507, data is read from the N sector buffer. In step S1508, the N sector buffer is moved to the head of the cache list. This is the "next buffer" that each sector has in FIG.
This is achieved by changing the value of (address indicating the next buffer). The operation of step S1508 is repeated every time the FAT cache is accessed, so that the buffers that are not naturally accessed shift from the head of the list toward the end. Therefore, step S
The buffer at the end of the list is selected in 1504 because the oldest buffer is discharged.

Next, the writing procedure will be described with reference to FIG.

In step S1600, writing of N sectors is started. In step S1601, N sector is FA
Judge whether it is T or not. If not FAT, step S
In step 1608, the writing of data to the flash ROM 15 is executed.

On the other hand, in step S1601, N sector is F
If it is AT, the process advances to step S1602 to search the cache list. If there are N sectors in the cache, the flow advances to step S1606 to write data in the N sector buffer.

If N sectors are not present in the cache list in step S1602, step S1602 is executed.
The process branches to 1603 to eject the sector that has not been accessed for the longest time from the buffer and register N sectors in the cache. First, in step S1603, the change flag of the last item in the cache list is determined. If the change flag is TRUE, the contents of the change are written in the flash ROM in step S1604, and step S16
Go to 05. If there is no change (change flag is FA
If it is LSE), control is directly transferred to step S1605. In step S1605, the last item of the cache list is set to N sector. After that, step S1606
Then, writing of data to the buffer of N sectors is executed.

After that, in step S1607, the buffers of N and sector are moved to the head of the cache list. It may be strange that writing to the flash ROM is not performed in the writing procedure, but it is more efficient not to perform writing operation as much as possible until the cache is flushed.

Also, step S1501 and step S
Regarding the FAT determination in 1601, the location of the FAT area can be specified by analyzing the contents of the write data even in a system such as an IC card that cannot completely share information of the upper layer (file system). This is because it is determined that information such as the FAT position is stored in the portion corresponding to the logical sector O.

<Writing of 1 Byte to Flash ROM> All reading and writing (including the management area) with respect to the flash ROM 15 is finally executed by a 1-byte read / write command. Writing to the flash ROM 15 takes the same time as a normal PROM. It is not possible to write to the same chip until the writing of 1 byte is completed. Some chips have a signal line as a write end signal and some have no special signal. In the latter case, the write end must be confirmed by a method called data polling. Data polling is a busy control method that waits until the write data and read data match, in a manner very similar to verify.

When the completion of writing can be known by the signal line, the CPU time waiting for writing can be assigned to another task in combination with the interruption to the CPU 5.

As described above, in the case of a chip having no signal line, data polling must be performed. In order to improve the efficiency of data writing, it is necessary to write in a pipeline to several chips to suppress the loss of data polling time. Therefore, 1
Control must be passed to the next operation before the byte write is complete. Before doing a new read or write, it's a good idea to check if the previous write is complete. FIG.
Is a representation of the situation in C language.

The first line in FIG. 15 is the entrance of a function for writing data. The first argument is a pointer to a structure to save the last written address and data,
The second argument is a write address, and the second argument is write data.

On the third line, the last written address is referred to and the data written to the chip is compared with the last written data, and the loop is executed until the two match. This is data polling. When the previous writing is completed, it exits from this loop.

Data is written to a new address on the fourth line. On the 5th and 6th lines, save the address and data you wrote this time. This information is used in the next data polling.

RotateRdyQueue on the 7th line of the list is a system call of the operating system that yields the CPU to the task in the ready state of the same priority which should be executed next to the own task.

The ninth line is the entrance of the read function. The first argument is a pointer to a structure for storing the address and data, and the second argument is the address to read. This function returns the data stored in the address specified by the second argument to the upper program.

In line 11, if the address to be read is the last written address, the value to be returned is the last written data, and the information stored in the structure is returned. The 12th line is data polling similar to the 3rd line. Only after successful data polling can another address on the same chip be read. After the data polling is completed, the contents of the address specified on the 13th line are returned.

If the writing to one chip is configured as described above, the apparent writing speed can be surely improved only by increasing the number of chips and the writing task. Further, in order to increase the overall throughput, it is effective to intentionally prepare sector buffers for the number of chips (2 sectors for 2 chips) so that the contents to be written are not processed until they are accumulated in the buffer.

The characteristic feature of the program shown in FIG.
Data polling is not performed immediately after writing data, but is performed before the next writing. Therefore, the RAM area for storing the previously written address and data is secured for each chip and stored as a structure "struct DEV".

FIG. 39 is a flow chart showing the procedure for writing 1-byte data to the flash ROM in this embodiment. This flowchart shows a control procedure for writing to one flash ROM chip. In step S2601, it is determined whether the previous writing process has been completed. If the previous writing process has not been completed, the process advances to step S2604, and control is transferred to another task.

On the other hand, if the previous write processing is completed, the next write data is prepared and stored in the DRAM 14. The determination of the end of writing in step S2601 described above is made by comparing the data written in the flash ROM with the data held in step S2602.

Then, in step S2603, data writing is started. According to the above processing,
In the case of writing to a plurality of flash ROM chips by a plurality of tasks, it becomes possible to perform a writing process to which a so-called round robin method is applied, and a plurality of R
Data can be efficiently written to the OM chip. Note that the multitask management program is
It is stored in the OM 13. VxWorks (trademark), pSOS (trademark) and the like are commercially available as real-time OSs to be incorporated, and the ROM 13 stores such real-time OSs.

<Sharing of Flash ROM Writing Power Supply> At the time of writing and erasing data, 12V as in PROM
There is a chip that requires a special write voltage, such as a chip, or a chip that writes at a high speed by applying the write voltage. Dedicated DC / DC when using such a chip
Providing a voltage generator such as a converter increases the cost of the electronic camera. However, conventionally, a camera has a portion requiring a special voltage, such as charging a strobe, driving a mechanical portion or a CCD, and is equipped with a DC / DC converter or the like. Therefore, the writing voltage of the flash ROM, strobe charging, and mechanical driving are performed by time division multiplexing, so that the system can be constructed with a small capacity DC / DC converter, and the system cost can be suppressed.

FIG. 16 shows a program for managing the power supply in C language so as not to exceed the output capacity of the DC / DC converter. Lines 1 to 6 are one-step zoom-up functions, and Lines 7 to 13 are flash ROs.
This is a write function for writing one sector to M. As the zoom-up function, the semaphore “SemDCDC” for resource management of the DC / DC converter is acquired in Line3, and the function that moves the motor one step is called in Line4. When the motor driving is completed, the semaphore “SemDCDC” for resource management of the DC / DC converter is opened. A semaphore is a common method for managing resources in a multitasking operating system, and many operating systems provide it as a system call.

That is, in Line 3, “SemDCD” has already been entered.
If C "is being used by another task, execution of the task that tried to zoom up is suspended until the other task releases the semaphore" SemDCDC ".

The write function is Line 9 and the semaphore “S
emDCDC "and write one sector of data to the flash ROM. When line 11 performs data polling and confirms that the last write is completed, L
The semaphore "SemDCDC" is opened by ine12.
By configuring the program in this way, it is not necessary to perform zoom-in and writing to the flash ROM at the same time. Since the zoom is in 1-step units and the writing is in sector units, power can always be acquired after a very short hold time.

To further explain FIG. 16, Line 1 in FIG. 16 is an entrance of a function for zooming up. This function has no arguments. Acquire one right of SemDCDC declared as the right to use the power supply in Line3. At this time, if there is no usage right, execution of the task that called this function is suspended. If another task releases the right to use the power supply, the task that called ZoomUp returns to the executable state again. Then, it is possible to call a function that drives the Line 4 motor. Then, in Line 5, the power use right is returned and the work of this function ends. Line7
Is the entrance of the function to write the data of 1 sector to EEPROM.
It is returned at ine12.

FIG. 40 is a flow chart for explaining the above-described power sharing procedure. In the figure, in step S1701, DC / D by the power supply controller 9
It is determined whether or not the supply of the output power of C converter 8 is released. In step S1702, the content of the instruction to secure the power supply is analyzed, and in accordance with the instruction result, the process branches to one of steps S1703, 1705, 1707, and 1709.

If the content of the instruction is the supply of the CCD drive power, the flow advances to step S1703 to set C for CCD2.
It supplies power for CD drive. And step S
When the end of CCD driving (that is, the end of the shooting operation) is detected in 1704, the process advances to step S1711 to release the power supply. If it is a strobe charging request, the flow advances to step S1705 to cause the power supply controller 9 to provide charging power for the strobe 21. When the charging of the strobe is completed in step S1706, the process advances to step S1711 to release the power supply. Regarding the power supply for charging, the power supply is released to supply another power supply every time charging is performed for a predetermined time. That is, the program for managing the charging of the strobe 21 exists separately in a predetermined task,
The completion of charging is managed by that task.

If the content of the instruction is to drive the zoom mechanism, the flow advances to step S1707 to supply power to the drive system (not shown) of the zoom mechanism. And step S170
When the zoom operation of one step is completed in step 8, step S1
Proceed to 711 to release the power supply. Furthermore, if the content of the instruction is writing to the flash ROM, step S170.
9, the writing power to the flash ROM 15 is supplied. When the writing for one sector is completed, step S17
From step S1711, the power is released.

Incidentally, steps S1704, 1706, 1
At 708 and 1710, the completion of each operation is awaited. In this waiting loop, control is transferred to another task and multitask processing is performed. This management process can be started from any task at any time, and may be started simultaneously by a plurality of tasks. Therefore, the power release is checked in step S1701.

According to the flow chart of FIG. 40 described above, it is possible to use the power supply in a time sharing manner. However, it is one program that all systems (CCD / strobe / zoom / flash ROM) depend on. When such software is developed, development / debugging / maintenance costs increase, and it becomes difficult to maintain expandability and flexibility.

Therefore, the power source is regarded as one resource and the OS is
Development efficiency can be improved by using the resource management function provided by. Therefore, the resource management by the semaphore described above is performed. That is, the control programs for the CCD drive unit, strobe drive unit, zoom drive unit, and flash ROM drive unit are resources (semaphores) called power sources.
Power can be allocated in a time-sharing manner by acquiring and releasing.

FIG. 48 is a diagram for explaining the time division use of the power source according to this embodiment. As shown in the figure, when a power request is generated by a certain task A (for example, CCD), if the power semaphore is in a released state, the semaphore is acquired and the power is occupied (step S2001).
~ S2003). Then, in step S2004,
When power is supplied from the power source and a predetermined process is performed, the process proceeds to step S2005 to release the semaphore.

On the other hand, task B, which requested power acquisition later than task A, cannot acquire the semaphore by the power request in step S2011, and waits for release of the semaphore in step S2012. When the semaphore is released from task A, task B acquires this semaphore and occupies the power source (step S2013). After that, predetermined processing is executed in task B (step S201
4) The power is released (step S2015).

By managing the power source resource by the semaphore as described above, the power source can be used in a time-division manner.

According to FIG. 48, there is only one semaphore indicating the right to use the power source resource, but it goes without saying that a plurality of semaphores may exist.

<Description of Operation of Electronic Camera of Embodiment> FIG. 1
FIG. 7 is a flowchart showing an operation procedure from the reboot of the present embodiment to the start of the service. Step S1
When the system reboots at 01, the management area of the flash ROM 15 is scanned at step S102, and the DRA
A storage location management table 140 is created on M14. In parallel with this processing, the unused sector counter, used sector counter, and in-use sector counter on the DRAM 14 are counted and set to the number of sectors corresponding to the respective states. This counter is updated later when the flash ROM 15 is operated, and is used to judge the storage efficiency. Then, step S
Proceed to 103 to start various services.

FIG. 18 is a flow chart showing the procedure of the read service of the designated sector. First, in step S201, reading of N sectors is started. Step S
At 202, N sectors are locked. Sectors are locked using lock variables. This lock variable is managed in the memory location management table 140 together with the memory location of each sector. In step S202, if the sector is already locked by another task, it waits for it to be unlocked by another task, and then the sector is locked after being unlocked by another task. Until the locked sector is unlocked in step S206,
It can be occupied by its own task.

When the logical sector is locked in step S202, the storage location management table is referenced in step S203 to confirm whether valid data is stored in the sector. If no valid data is recorded,
It branches to step S204. In step S204,
Dummy data (for example, all 0s) is read as the contents of the sector. If it is determined in step S203 that valid data is stored, the process branches to step S205. In step S205, data is read from the flash ROM (or main memory) based on the values in the recording location management table.

Here, when garbage collection is in progress and N sectors have been saved to the main memory (DRAM 14), the pointer of the memory location management table points to the main memory. Further, the portion surrounded by the dotted line in the figure is a period in which N sectors are occupied. Since the security of one sector operation is guaranteed by such a lock mechanism, it is possible to freely read out the sector which is not being operated even during the garbage collection.

FIG. 19 is a flow chart showing the procedure of the logical sector write service. Step S301
Then, writing of N sectors is started. In step S302, as in step S202, the logical sector is locked.

Next, in step S303, the storage location management table is searched to determine whether or not valid data is recorded in the N sector. If valid data is recorded, the process branches to step S304, and if not, the process branches to step S305. Step S304
Then, the data in the flash ROM (or main memory) that has been recorded as valid data until then is discarded. The data discarding process in step S304 will be described in detail with reference to the flowchart of FIG. After step S304, control proceeds to step S305.

In step S305, the flash ROM
At 15, a storage area for writing N sectors is acquired. The storage area acquisition procedure in step S305 will be described in detail with reference to FIG. Step S305
If the storage area is successfully acquired in step S30, step S30
Control is transferred to 8. In step S308, N sector data is written in the acquired area of the flash ROM 15.

On the other hand, in step S305, the flash RO
If there is no storage area in M, that is, if acquisition of the storage area fails, the process branches to step S306. Step S30
6 acquires main memory for saving data. The main memory area is secured by the memory management function provided by the operating system. This is a function corresponding to the alloc function in C language. Then, the secured area is managed by the one-way linear list structure.

FIG. 20 shows the saved data list acquired on the main memory. In (a), there is no data in the saved data list, and END_OF_LIST is assigned to the list. (B) is a state where the contents of each sector of sector numbers 3, 20, and 221 are saved in the saved data list.

In step S309, the recording location management table is updated. Here, the pointer to the recorded flash ROM (or main memory) is substituted. Step S3
At 10, the logical sector is unlocked. The logical sector can be occupied during the period surrounded by the dotted line in the figure. Step S31
The memory efficiency is evaluated at 1. The storage efficiency evaluation procedure will be described in detail with reference to the flowchart of FIG. As a result of the evaluation of the storage efficiency, if the storage efficiency is deteriorated, the control is moved to step S312. Step S312
Then, the garbage collection described above is performed. The garbage collection will be described in detail with reference to the flowchart of FIG. In step S313, the writing of N sectors is completed, and the process returns to the main routine.

It is to be noted that what is stored in the storage location management table is the pointer (address on the bus space) of the storage location. From the next field (shown immediately below in the figure) of the "pointer to the next data" of the data saved in the main memory of FIG. 20 (b), the flash ROM on the left side of FIG. Compatible with the above data structures. It is a pointer to this compatible part that is stored in the memory location management table. With this configuration, the flash ROM and the main memory can be handled by a single algorithm on the data reading program side.

Next, the procedure for discarding the storage of the designated sector (step S304 described above) will be described. FIG.
3 is a flowchart showing a procedure for discarding a memory.

In step S401, storage discard of the designated area is started. In step S402, it is determined whether the area for storing the designated sector is in the main memory. If it is in the main memory, the process branches to step S405. In step S405, the designated area is deleted from the save sector list (in this example, the one-way linear list shown in FIG. 20).

In the procedure for deleting the designated area from the one-way linear list, the list is first searched from the top of the list in the search direction, and the term in which the pointer points itself is detected. Then, it is realized by substituting the value currently pointed to by the pointer of the detected term. Then, in step S406, the main storage area deleted from the list is returned to the operating system. The return of the storage area to the operating system is a function equivalent to the C language free function.

On the other hand, if the area designated in step S402 is not on the main memory (that is, on the flash ROM), the process branches to step S403. In step S403,
The management flag of the sector on the specified flash ROM is changed to "used". This will TR the used flag
This is achieved by setting it in the UE. Step S404
Then, the value of the unused sector counter on the main memory is decreased by one. The process returns in step S407.

Next, the storage efficiency evaluation procedure (step S3
11) will be described. FIG. 22 is a flowchart showing the procedure for evaluating storage efficiency.

In step S501, evaluation of storage efficiency is started. In step S502, the value of the unused sector counter set in the main memory is compared with the value of the used sector counter. Here, when the value of the used sector counter is equal to or more than the value of the unused sector counter, the deterioration of the storage efficiency is reported to the upper program (steps S502, S504). If the value of the unused sector counter is larger than the value of the used sector counter, the evaluation result is set to normal and the operation returns to normal (step S503).

Next, the procedure for acquiring the storage area of the flash ROM (step S305) will be described. FIG. 23 is a flowchart showing the procedure for acquiring the storage area of the flash ROM.

In step S601, acquisition of the storage area of the flash ROM is started. In step S602, a search right for an unused sector is acquired. Here, the semaphore function provided by the operating system is used to manage the search right for unused sectors. Here, the search right of the unused sector can be monopolized only during the processing period surrounded by the dotted line from step S602 to step S609 / step S611. This is a mechanism to prevent a situation where multiple tasks get the same area at the same time.

In step S603, the pointer is moved to the first sector of the flash ROM. In step S603, the management flag (in-use flag, used flag) of the sector is referred to, and the use state of the sector is determined. If used or in use, the process branches to step S605. If the sector currently pointed to in step S605 is the last sector, the process branches to step S611. In this case, since the usable area does not exist in the flash ROM 15, the search right of the unused sector is released in step S611, and the process returns abnormally in step S612. If the sector currently pointed to is not the last sector in step S605, the process branches to step S606. In step S606, the pointer is moved to the next sector, and then the process returns to step S604.

Step S604 If the management flag of the sector indicated by the pointer is unused, the process branches to step S607. In step S607, the management flag of the flash ROM is changed to "in use" (the in-use flag is set to T).
RUE). Then, in step S608, the value of the unused sector counter provided in the main memory is decremented by one.
In this case, since the storage area in the flash ROM has been successfully acquired, the search right of the unused sector is released in step S609, and the normal operation is restored in step S610.

Next, garbage collection (step S
The procedure of (312) will be described. FIG. 24 is a flowchart showing the procedure of garbage collection.

Garbage collection is started in step S701. In step S702, an erase block to be rearranged (hereinafter, rearrangement target block) is selected. The procedure for selecting the rearrangement target blocks will be described in detail with reference to the flowchart of FIG. Step S70
In 3, the unused sectors of the rearrangement target block are used up. A detailed description will be added to the procedure of this end of life using the flowchart of FIG. Here, the purpose of first disposing of unused sectors in the rearrangement target block is to make it possible for other tasks to read and write to sectors including the sector in the rearrangement target block even during garbage collection. This is to prevent new data from being written to the sector in the block to be sorted by another task during the garbage collection.

In step S704, the in-use sector in the block to be rearranged is moved to another storage area (that is, another erase block). The process of moving the in-use sector to another storage area will be described in detail with reference to the flowchart of FIG.

In the following step S705, the rearrangement target block for which the movement of the in-use sector has been completed is erased.
The procedure for deleting the rearrangement target blocks will be described in detail with reference to the flowchart in FIG. In addition,
When erasing the blocks to be rearranged, the contents of the erase count counter 152 are copied to the main memory. Step S
After erasing the rearrangement target block in 705, the data saved in the main memory is returned to the erase count counter of the erase block in the flash ROM in step S706. Then, in step S707, the process returns from the garbage collection.

Next, the procedure for selecting the rearrangement target blocks in the garbage collection (step S702) will be described. FIG. 25 is a flowchart showing a procedure for selecting blocks to be sorted.

First, in step S801, selection of blocks to be sorted is started. In step S802, the first erase block is set in the evaluation pointer. Similarly, in step S803, the rearrangement target candidate pointer is set to the first erase block.

Next, in step S804, it is determined whether or not the erase block indicated by the evaluation pointer includes a used sector. If the used sector is not included, steps S804 and S805 are skipped and control is passed to step S807.

On the other hand, if it is determined in step S804 that the erase block indicated by the evaluation pointer includes a used sector, control is passed to step S805. Step S8
In 05, the value of the erase count counter of the erase block indicated by the rearrangement candidate pointer is compared with the value of the erase count counter of the erase block indicated by the evaluation pointer. If the erased number of erase blocks indicated by the evaluation pointer is smaller, control is passed to step S806. Step S8
At 06, the evaluation pointer is assigned to the rearrangement candidate pointer. On the other hand, if it is determined in step S805 that the erase block is erased more times, the control proceeds to step S807.

In step S807, it is determined whether the evaluation pointer points to the last erase block. If it is not the last erase block, step S80
After moving the evaluation pointer to the next erase block in step 8, the process returns to step S804. As described above, by repeating the processing of steps S804 to S808, the rearrangement target candidate pointer indicates an erase block including the used sector and having a small erase count.

If the evaluation pointer points to the last erase block in step S807, step S809.
Branch to. In step S809, the process returns to the garbage collection process (process of FIG. 24). The erase block indicated by the rearrangement target candidate pointer at this point is selected as the rearrangement target.

Next, the processing for converting the unused sectors in the selected rearrangement target block into used (step S703).
Will be described. FIG. 26 is a flowchart showing a procedure of converting unused sectors of a rearrangement target block into used sectors.

The process starts in step S901. In step S902, the pointer is moved to the first sector of the rearrangement target block. Next, in step S903, a search right for an unused sector is acquired. This has the same effect as that of step S602 in the flowchart of FIG. 23, and monopolizes the unused sector search right while being surrounded by the dotted line up to step S908. In other words, it is prohibited for another task to search for unused sectors until all the sectors of the rearrangement target block are scanned and the unused sectors are changed to used sectors. However, since the unused sector is changed to the used sector only by the operation of the management flag, the monopolization time of the search right is short and the overall throughput is not lowered.

In step S904, it is determined whether the sector indicated by the current pointer is an unused sector. If it is an unused sector, the process branches to step S905. Step S
At 905, the memory is discarded. The processing procedure of step S905 is as described in the flowchart of FIG.
By this process, the unused sector is changed to the used sector. In step S906, it is determined whether the pointer points to the last sector of the rearrangement target block. If the last sector is indicated, go to step S908,
If not, the process branches to step S907. In step S907, the pointer is moved to the next sector, and control is returned to step S904.

If the pointer is the last sector of the rearrangement target block in step S906, the search right of the unused sector is released in step S908, and the process returns to the garbage collection process (flowchart in FIG. 24) in step S909.

Next, the process of moving the used sector of the rearrangement target block to the unused sector of another erase block (step S704) will be described. FIG. 27 is a flowchart showing the procedure of moving the used sector of the rearrangement target block.

The process is started in step S1000. In step S1001, the pointer is moved to the first sector of the rearrangement target block. The following steps S1002-S
At 1012, processing is performed on the sector pointed to by the pointer.

In step S1002, the management flag (in-use flag, used flag) of the sector is determined. If the value of the management flag is "in use" in step S1002, control is transferred to step S1003, and "used"
If so, control is transferred to step S1012. In step S1003, the logical sector is locked. The locked sector is occupied by the own task until it is unlocked in step S1011.

In step S1004, a storage area is acquired. The procedure for securing the storage area in step S1004 is as described in the flowchart of FIG. Here, each sector in the rearrangement target block has the above-mentioned step S
In the processing of 703, since all the storage areas have been used, the secured storage area is an erase block other than the rearrangement target block.

When the acquisition of the storage area is successful, the process proceeds to step S1008. In step S1008, the data of the sector is copied to the acquired area. And
As the sector moves, the storage location management table 140 is updated in step S1009.

On the other hand, if the acquisition of the storage area fails in step S1004, the process branches to step S1005.
In step S1005, a storage area for saving data is acquired from the main storage (DRAM). Acquisition of the data save storage area is as described in step S306 of the flowchart of FIG. In step S1006, the data of the sector is copied to the acquired area. Then, in step S1007, the storage management table is updated. In step S1010, the original storage is discarded. That is, the used flag of the sector pointed to by the pointer is set to TRUE. Then, in step S1011 the logical sector is unlocked.

In step S1012, it is determined whether the sector pointed to by the pointer is the last sector of the rearrangement target block. If it is the last sector, step S1014
If not the last sector, the process branches to step S1013. In step S1013, the pointer is moved to the next sector, the process returns to step S1002, and the above process is repeated for the next sector. Further, in step S1014, since processing has been completed for all the sectors in the rearrangement target block, the process returns to the garbage collection processing (flowchart in FIG. 24).

Next, the erasing process of the blocks to be rearranged (step S705) will be described. FIG. 28 is a flow chart showing a procedure for erasing erase blocks that have been arranged.

The process is started in step S1101. In step S1102, the erase count counter of the rearrangement target block is copied to the main memory. In step S1103, the rearrangement target block is erased. In step S1104, the value obtained by incrementing the value of the erase count counter copied to the main memory by 1 is written to the flash ROM. That is, the value of the erase counter of the block to be rearranged is incremented by 1 from the value before the erase process. Then, in step S1105, the process returns to the garbage collection process (flowchart in FIG. 24).

The garbage collection process shown in FIG. 24 is a process using the flash ROM as much as possible.
The safety of the saved data is high. However, as described in the above section <When there are no unused sectors>, when the data in the in-use sector is positively saved by using the main memory (DRAM 14) and a plurality of erase blocks are erased, the erase processing is performed. Is efficient. However, since the data is saved in the DRAM 14, the safety of the data being saved is lowered (for example, if the battery is removed and the power supply is stopped, the data saved in the DRAM will be lost). Therefore, the type of power supply is determined, and the safety of the saved data is emphasized when the power supply is a battery, and the efficiency of the erasing process is emphasized when the AC adapter is used because there is little risk of power supply interruption. You may. The processing in this case will be described with reference to FIG.

FIG. 36 is a flow chart for explaining the processing procedure when switching the garbage collection processing based on the power source type. In the figure, steps that perform the same processing as the processing shown in the flowchart of FIG. 24 are assigned the same step numbers, and detailed description thereof is omitted here.

When the garbage collection process is activated in step S1300, the flow advances to step S1301 to determine the form of power supply to the apparatus. Here, the power supply controller 9 of FIG. 1 determines whether the power supply source is the battery 7 or the AC adapter 23, and the CPU
Notify 5 If the power source type is the battery 7, the process advances to step S1304 to execute the garbage collection process shown in FIG.

On the other hand, if the power supply type is the AC adapter in step S1301, then step S1302.
Proceed to. In step S1302, step S in FIG.
702, S703, and S704 are executed,
The unused sectors in the selected blocks to be sorted out are used and the sectors in use are saved. Then, step S1
In 303, it is determined whether or not there is a sufficient free area in the main memory (DRAM 14) for saving the sector. If there is a sufficient free area, the process returns to step S1302. In step S1302, a rearrangement target block different from the previous rearrangement target block is selected, and the above processing is repeated.

When the DRAM 14 has no free space, the process advances from step S1303 to step S1304 to erase the rearrangement target block selected in the above process. Then, in step S706, the data saved in the main memory is returned to the flash ROM 15 and the present processing ends.

As described above, according to the processing of FIG. 36, when the power is supplied by the AC adapter, the free space of the main storage is positively used to save the data, and the plurality of blocks to be sorted are arranged. Can be selected and collectively erased, and the efficiency of the erase processing is improved.

In the above processing, the form of garbage collection is automatically switched based on the type of power source, but it goes without saying that the mode can be switched manually by operating the control panel 12.

Next, the procedure for releasing the logical sector, which is one of the basic services, will be described. FIG. 29 is a flowchart showing the procedure for releasing a logical sector.

In step S1201, release of N sectors is started. In step S1202, N sectors are locked.
As a result, the own task can occupy the logical sector until it is unlocked in step S1205. Subsequently, in step S1203, the storage of the sector is discarded. This storage discard processing is as described in the flowchart of FIG. In step S1204, DRA
The "absence" value is substituted into the storage location management table 140 of M14. The logical sector is unlocked in step S1205, and the process returns in step S1206.

In a general file system such as MS-DOS (trademark), for example, when erasing a file, the sectors belonging to the file can only be overwritten in the FAT, and each sector is not released. . Therefore, when the flash ROM management system according to the present embodiment is applied to such a file system, invalid data on the file system is left as a valid sector, which reduces the efficiency of garbage collection and the like. I will let you. Therefore, if the unnecessary sector is detected based on the file system instruction (for example, file deletion) and is released, the efficiency of garbage collection can be further improved.

FIG. 37 is a flow chart showing the procedure for releasing unnecessary sectors when a file erasing is instructed by the file system. In the figure, step S14
At 01, it is determined whether or not there is an instruction to delete a file from the file system. If there is an instruction to erase the file, the process advances to step S1402 to extract the sectors included in the file instructed to be erased. The sector can be extracted by referring to the FAT. Then, in step S1403, the sector releasing process described in the flowchart of FIG. 29 is executed for each sector extracted in the previous step S1402.

[Second Embodiment] Next, a second embodiment will be described.

<Disk Controller Emulation> The flash ROM storage management system described in the first embodiment is similar to the disk medium in the characteristics seen from the upper layer. Therefore, the disk controller and the disk medium are replaced by the disk controller emulation and the storage management system of the present embodiment (or an IC card that incorporates the storage management system of the present embodiment) by incorporating the disk controller into the system having the emulation function of the disk controller. It becomes possible. PC in recent years
IC cards represented by MCIA are widely used.
By incorporating the disk controller emulation function and the storage management system of the first embodiment in the C card, it becomes possible to use it as a removable storage medium. In the second embodiment, an IC card incorporating the storage management system of the first embodiment will be described.

FIG. 30 is a block diagram showing the structure of the IC card according to the second embodiment. In the figure, 200 indicates the entire IC card. A microcomputer 201 performs disk controller emulation and storage management. A ROM 202 stores the program of the microcomputer 201. 203 is a RAM
And functions as the main memory of the microcomputer 201. A flash ROM 204 stores data by the storage management system described in the first embodiment. That is, the flash ROM 204 is managed by the management area and the data area described in FIG.

Reference numeral 205 denotes a command / data latch section, which holds a command from the external bus received from the host device, a cylinder number, and the like. A FIFO memory 206 inputs and outputs data in a first-in first-out system. 20
A tuple ROM 7 stores the characteristics of the card and can be read only from an external bus.

The function of each configuration described above will become more apparent in the following description of the operation.

FIG. 31 is a simple block diagram of a host system for using the IC card of the second embodiment.
In the figure, reference numeral 301 is a microcomputer on the host system side. A card interface 302 connects the internal bus of the host system and the external bus of the IC card 200. In addition, card interface 3
02 is a power supply line for supplying power to the IC card 200, and an interrupt request (I
It also has a signal line for receiving (RQ output).

In FIG. 32, the host system of FIG. 31 is an IC.
It is a flowchart which shows the procedure at the time of connecting a card. When the processing is started in step S4100, power supply to the IC card is started in step S4101. In step S4102, the tuple RO in the IC card 200
The data stored in the tuple format is analyzed from M7. By analyzing the contents of the tuple ROM 7, the characteristics of the connected IC card can be known.

In step S4103, step S41
I connected by the tuple information analyzed in 02.
Judge whether the C card can be connected to the internal bus. If the connection is possible, the process branches to step S4104, and if the connection is not possible, the process branches to step S4105. In step S4104, the bus on the IC card side is mapped to the memory space and IO space of the internal bus of the host. At this point, the state is the same as when there is a disk controller in the bus space of the host device.

FIG. 33 is a flow chart showing the main sequence of the microcomputer 1 in the IC card 200. When the IC card is powered on in step S4201, the storage management system is initialized in step S4202. That is, the states of the logical sectors of all erase blocks in the flash ROM 204 are read once, and a storage location management table is created in the RAM 203 for main storage according to the read information. In step S4203, a ring-shaped buffer is prepared and initialized as a command buffer on the main memory, and interrupt processing is permitted. After this processing, the operation of the interrupt routine starts.

The sequence of the interrupt routine is shown in the flowchart of FIG. Understanding the operation of the interrupt routine facilitates the description of the flowchart of FIG. 33. Therefore, the flowchart of FIG. 34 will be described here.

When the host system writes a command to the address of the command to the command / data latch 205, an interrupt is generated from the command / data latch 205 to the microcomputer 201. The command / data latch 205 is mapped in the IO address space of the host bus and the bus inside the IC card, and IO addresses are assigned to the command / data as shown in FIG. FIG. 35 is a diagram showing IO allocation in the command / data latch of this embodiment. In this example, a command (for example, ReadSector (s) for instructing to read data) is assigned to the command address in FIG.
Is written, an interrupt occurs in the microcomputer 201.

When the interruption occurs, the software of the microcomputer 201 shifts the control to the step S4301 of the flowchart of FIG. Step S430
In 2, the data written in the command / data latch 205 is read and the data is stored in the ring buffer on the main memory. In step S4303, the interrupt routine is ended and the process returns to the flowchart in FIG.

Returning to the description of the flowchart in FIG. In step S4204, the microcomputer 201 determines the status of the command buffer. If data is stored in the command buffer, the process branches to step S4205, and if data is not stored, step S4213.
Branch to. In step S4213, the CPU is put into a sleep state. Many one-chip microcomputers have a function of suspending the execution of instructions to reduce current consumption, and the CPU of this embodiment also has this kind of function. When the interrupt request signal by IRQ is input, C
The PU 201 returns from the sleep state and executes the above-mentioned interrupt routine. When the execution of the interrupt program is completed, the process returns from step S4213 to step S420.
Return to 4.

If the data is stored in the command buffer in step S4204, the process moves to step S4205. In step S4206, data is read from the ring buffer. The command is interpreted in step S4206. In the case of the Seek command, step S4207, Read
In the case of the Sector (s) command, go to step S4208 and Wri
In the case of teSector (s), go to Step S4209, and identify D
In the case of the rv command, the process branches to step S4210. Although there are other commands, those that are not important for the description of the present embodiment are omitted and the flowchart is simplified.
When the execution of the commands in steps S4207 to 4210 is completed, the process returns to step S4204 to repeat the above process.

In step S4207, the Seek command is executed. Seek has no head in a flash ROM, unlike a disk device, so all you have to do is check the validity of the next command. If a head position that exceeds the number of heads supported by the IC card is specified, an error occurs as in the disk device.

In step S4208, processing for the ReadSector (s) command is performed. ReadSector (s) command
The number of sectors to be read is designated by SectorCount in FIG. Therefore, in step S4208, the sector at the designated location is read out in sectro counts. In the storage management system of this embodiment, since the management is performed using the linear logical sector number, the cylinder /
A linear logical sector number is calculated based on the head / sector number, the contents of the logical sector are transferred to the FIFO memory 206, and the SectorNumber of the command / data latch 205 is also incremented. The FIFO memory 206 is an IC
This is a FIFO memory configured so that the data written from the internal bus of the card 200 can be read from the external bus and the data written from the external bus can be read from the IC card internal bus.

Now, the above-mentioned linear logical sector number will be described. Generally, the number specified for a hard disk is a three-dimensional discontinuous number determined by the parameters of sector, cylinder, and head. For example, in the case of a hard disk having 1024 cylinders, 16 heads, and 63 sectors, the number of sectors is 1024 × 16 × 6.
3 = 1032192.

It is desirable that this sector can be accessed from 0 to 1032192, but it is designed to access by designating all of the above three parameters. For example, next to the cylinder 500 / head 16 / sector 63, the cylinder 501 / head 0 / sector 1 is accessed. Note that these three parameters are called CHS parameters by taking their initials.

In an operating system such as MS-DOS (trademark), a linear (continuous) sector number is used internally, but the device driver converts this into a CHS parameter. In the system of the present embodiment, since a linear sector number is used, the linear sector number is obtained based on the CHS parameter value. In the case of the hard disks listed above, cylinder number x (16 x 63) + head number x (63)
By calculating + sector number, a linear logical sector number can be obtained.

In step S4209, data is written to the sector at the location designated by the data latch. The data is received from the host system via the FIFO memory 206.

Step S4210 is for the IC card 200.
Process to return information about what hard disk is emulated by. That is, a process of writing data including specifications such as the number of cylinders and Model Number as a hard disk into the FIFO memory 206 is performed.

<Analysis of File System> As described above, by incorporating the storage management system described in the first embodiment into an IC card, it can be used for replacing an ATA hard disk or the like. However, FA such as ATA command
There is no method for receiving information from the host system for performing processing such as releasing unnecessary sectors generated by T cache or file deletion. The FAT cache and unnecessary sector release functions can be realized by additionally mounting a sector release command and a sector number designation command to be cached by utilizing the empty portion of the ATA command. Needless to say, it is better to realize the release of the FAT cache and the sector even in the current system such as MS-DOS which is not supposed to have such a function.

The FAT system stores information such as FAT location and size in the portion corresponding to logical sector number 0. In this embodiment, FA is read by reading this sector.
The location and size of T are acquired and used for FAT cache processing. Similarly, although it is an IC card that originally should not understand the contents of write data, by analyzing the information (directory entry or FAT) for the file system, the IC card autonomously determines and opens unnecessary sectors. Can be useful for processing. Of course, it is not limited to FAT, but HPFS and Macintosh (trademark).
Even with this file system, unnecessary sectors can be detected by analyzing the contents of the data to be written. With this configuration, even with an ATA hard disk interface,
It is possible to perform optimization processing that matches the operation of the file system.

The object of the present invention achieved by the function of the above apparatus or the function of the method can also be achieved by the storage medium in which the program of the above-described embodiment is stored. For example, by mounting the storage medium on a personal computer and executing the flash ROM management program read from the storage medium as described below, the flash ROM can be used in the same manner as the disk system, and Rewriting durability can be dispersed. The structural characteristics of the program according to the present invention for this purpose are as shown in FIG.

FIG. 49 is a diagram showing a control procedure of the control program stored in the storage medium in the present embodiment and a memory map of the storage medium.

In FIG. 49 (a), reference numeral 350 denotes a management process, in which a plurality of sectors including a data area and a management area corresponding to the data area are formed in the flash ROM, and the data area is stored in each sector. The status information (sector number 154, in-use flag 155, used flag 156) indicating the status is stored in the management area, and access to the flash ROM 15 is managed based on the status information. For example, as shown in the flowcharts of FIGS. 18 and 19, writing and reading of data to and from the flash ROM in units of sectors are controlled.

Reference numeral 351 denotes an erasing process, which is a flash RO.
With respect to the erase block in M, a sector in which valid data exists in the data area is extracted based on the state information, and the content is moved to erase the erase block.
This is the garbage collection process shown in the flowchart of FIG.

Reference numeral 352 denotes a count process, which is an erasing process 3
The number of erases performed by 51 is counted as the number of erases for each erase block, and the number of erases is stored in the erase count counter 152 of each erase block. this is,
This is the process shown in steps S1102 and S1104 of FIG.

Reference numeral 353 represents a decision process, which is an erasing process 351.
The erase block to be erased is determined on the basis of the value of the erase count counter. This is the process shown in the flowchart of FIG.

In the actual control procedure, when the start of the garbage collection process is instructed by the management process 350, the decision process 353 refers to the erase count counter 152 to decide the erase block to be erased. Erasing process 351
Then, when the erase process is executed for the erase block to be erased determined in the determination process, the count process 352 causes the erase count counter 15 of the erase block to be erased.
2 is incremented by 1.

The control program for realizing the above control procedure is stored in a storage medium such as a floppy disk, a hard disk, or a CD-ROM, for example, in FIG. 49 (b).
The memory map of FIG. The control program is read by an information processing device such as a personal computer, loaded into the main memory (RAM), and executed by the CPU. The control program may be loaded into the main memory via the LAN.

Incidentally, in FIG. 49B, the management processing module 350 ', the determination processing module 353', the deletion processing module 351 ', and the count processing module 35.
Reference numeral 2'denotes a program module that executes each of the management processing 350, the determination processing 353, the deletion processing 351, and the count processing 352 shown in the control procedure.

The present invention may be applied to a system composed of a plurality of devices or an apparatus composed of a single device. Further, it goes without saying that the present invention can be applied to the case where it is achieved by supplying a program to a system or an apparatus. In this case, the storage medium storing the program according to the present invention constitutes the present invention. Then, by reading the program from the storage medium to the system or device, the system or device operates in a predetermined manner.

[0208]

As described above, according to the present invention,
In the management system capable of adapting the flash ROM to the file system, it is possible to reduce the variation in the erase count for each erase unit.

[0209]

[Brief description of drawings]

FIG. 1 is a block diagram illustrating a configuration of a camera system according to a first embodiment.

FIG. 2 is a diagram showing a hierarchical structure of a file system in the electronic camera of this embodiment.

FIG. 3 is a diagram showing a declaration statement in which a management block of a device driver is described in C language.

FIG. 4 is a diagram showing an example of a sector structure on a flash ROM.

FIG. 5 is a diagram illustrating a configuration in which management area data and a data area are separately stored.

FIG. 6 is a diagram showing the meaning corresponding to the state of each flag.

FIG. 7 is a diagram illustrating a sector rewriting procedure in a flash ROM.

FIG. 8 is a diagram illustrating a garbage collection operation of the flash ROM according to the present embodiment.

FIG. 9 is a diagram for explaining the operation of garbage collection when there are no unused sectors.

FIG. 10 is a diagram illustrating a storage location management table created on a DRAM.

FIG. 11 is a diagram showing a hierarchical positioning of cache software.

FIG. 12 is a diagram showing a data structure on a main memory of a cache.

FIG. 13 is a flowchart showing a procedure for reading a FAT cache.

FIG. 14 is a flowchart showing a write procedure of a FAT cache.

FIG. 15 is a diagram expressing the operation procedure for confirming the completion of data writing in C language.

FIG. 16 is a diagram expressing a program for managing a power supply in C language so as not to exceed an output capacity of a DC / DC converter.

FIG. 17 is a flowchart showing an operation procedure from rebooting to starting a service according to the present embodiment.

FIG. 18 is a flowchart showing the procedure of a read service of a designated sector.

FIG. 19 is a flowchart showing the procedure of a logical sector write service.

FIG. 20 is a state of the saved data list acquired on the main memory.

FIG. 21 is a flowchart showing a procedure for discarding storage.

FIG. 22 is a flowchart showing a storage efficiency evaluation procedure.

FIG. 23 is a flowchart showing a procedure for acquiring a storage area of a flash ROM.

FIG. 24 is a flowchart showing a procedure of garbage collection.

FIG. 25 is a flowchart showing a procedure for selecting rearrangement target blocks.

FIG. 26 is a flowchart showing a procedure of converting unused sectors of a rearrangement target block into used sectors.

FIG. 27 is a flowchart showing a procedure of moving a used sector of a rearrangement target block.

FIG. 28 is a flowchart showing a procedure for erasing erase blocks that have been arranged.

FIG. 29 is a flowchart showing a procedure for releasing a logical sector.

FIG. 30 is a block diagram showing a configuration of an IC card according to the second embodiment.

FIG. 31 is a simple block diagram of a host system for using the IC card of the second embodiment.

32 is a flowchart showing a procedure when the host system in FIG. 31 connects an IC card.

FIG. 33 is a flowchart showing the main sequence of the microcomputer in the IC card.

FIG. 34 is a flowchart showing the procedure of interrupt processing of the microcomputer in the IC card.

FIG. 35 is a diagram showing an IO address allocation state.

FIG. 36 is a flowchart illustrating a processing procedure for switching garbage collection processing based on a power source type.

FIG. 37 is a flowchart showing a procedure of releasing unnecessary sectors when a file erase is instructed by the file system.

FIG. 38 is a flow chart showing a control procedure of preprocessing for improving the erase processing speed in the present embodiment.

FIG. 39 shows a flash ROM 1 in the present embodiment.
It is a flow chart showing a writing procedure of byte data.

FIG. 40 is a flowchart illustrating a procedure for sharing a power supply.

FIG. 41 is a diagram illustrating a storage state of a control program in a flash ROM according to the present embodiment.

FIG. 42 is a diagram showing an example of a program code expressed by a relative address.

43 is a diagram showing a table storing data of the relocation information record of FIG. 42. FIG.

44 is a diagram showing a program code when the program of FIG. 41 is mapped to address 8710 of the main memory.

FIG. 45 is a diagram illustrating characteristics of a directory slot.

FIG. 46 shows the Fi slot in the directory slot of FIG.
It is a figure which shows the state in which leB was deleted.

FIG. 47 is a diagram showing a state after deleting a file in the DOS compatible file system of the present embodiment.

FIG. 48 is a flow chart illustrating time division use of power source resources (semaphores) according to the present embodiment.

FIG. 49 is a diagram illustrating the contents of a storage medium that provides a control program that realizes the control of the present embodiment.

Claims (5)

[Claims] 1. A plurality of storage blocks each comprising a data area and a management area corresponding to the data area are formed in a flash ROM, and status information indicating a storage status of the data area in each storage block is stored in the management area. Management means for managing access to the flash ROM based on the status information, and a memory block having valid data existing in the data area based on the status information, for the erase block in the flash ROM, and its contents Erasing means for moving the erasing block to erase the erasing block, and counting means for counting the number of times erasing by the erasing means is performed for each erasing block and storing the erasing number in the storage area of the erasing block. A deciding unit for deciding an erasing block to be erased by the erasing means based on the erasing count A flash ROM management device comprising: a step. 2. The flash ROM management apparatus according to claim 1, wherein the determining unit determines an erase block having a small erase count among erase blocks including invalid data as an erase target. 3. A plurality of storage blocks each including a data area and a management area corresponding to the data area are formed in a flash ROM, and status information indicating a storage status of the data area in each storage block is stored in the management area. Then, a management step of managing access to the flash ROM based on the status information, and for an erase block in the flash ROM, a storage block in which valid data exists in a data area based on the status information is extracted, and the contents thereof are extracted. And an erasing step of erasing the erase block, and a counting step of counting the number of times of erasing in the erasing step as the erase number for each erase block and storing the erase number in the storage area of the erase block. A decision process for deciding an erase block to be erased in the erase step based on the erase count. And a flash ROM management method. 4. The flash ROM management method according to claim 3, wherein the deciding step decides an erasing block having a small erasing frequency among erasing blocks including invalid data as an erasing target. 5. A computer controller for controlling a computer by reading a predetermined program from a memory medium, the memory medium comprising a plurality of storage blocks each comprising a data area and a management area corresponding to the data area. In a flash ROM, stores status information indicating a storage status of a data area in each storage block in a management area, and manages access to the flash ROM based on the status information. For the erase block in the memory block, a storage block in which valid data exists in the data area is extracted based on the status information, and the contents are moved to erase the erase block. Is performed for each erase block, and the number of erase times A computer comprising a procedure code of a counting step of storing a number in a storage area of an erase block and a procedure code of a determining step of determining an erase block to be erased in the erase step based on the erase count. Control device.