JPH0983241A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH0983241A
JPH0983241A JP23535495A JP23535495A JPH0983241A JP H0983241 A JPH0983241 A JP H0983241A JP 23535495 A JP23535495 A JP 23535495A JP 23535495 A JP23535495 A JP 23535495A JP H0983241 A JPH0983241 A JP H0983241A
Authority
JP
Japan
Prior art keywords
substrate
ground conductor
antenna
conductor layer
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23535495A
Other languages
Japanese (ja)
Inventor
Kohei Moritsuka
宏平 森塚
Yoshio Konno
舜夫 昆野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP23535495A priority Critical patent/JPH0983241A/en
Publication of JPH0983241A publication Critical patent/JPH0983241A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To improve the gain and the directivity and to reduce the chip area by utilizing an antenna mirror image to increase the gain and the directivity and separating sufficiently circuit functions without causing the increase in inter-component distance associated therewith. SOLUTION: In an MMIC integrating an antenna, a 60GHz processing circuit 11 formed on a major side of a GaAs substrate 10 and consisting of an HBT, resistors and capacitive components, a line 14 formed on the major side of the substrate 10 and connecting to the processing circuit 11, a 2nd ground conductor layer 13 formed on the major side of the substrate 10 via a polyimide film 12 to form a slot antenna consisting of a reverse microstrip line with the line 14 and a 1st ground conductor layer 18 formed to a rear side of the substrate 10 are provided and the thickness of the substrate 10 is selected to be 330μm, that is 1/4 of a wavelength of an electromagnetic wave.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、アンテナ素子を内
蔵した半導体装置に係わり、特にマイクロ波・ミリ波の
処理機能を有する半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device incorporating an antenna element, and more particularly to a semiconductor device having a microwave / millimeter wave processing function.

【0002】[0002]

【従来の技術】近年、GaAsやInP等のIII-V族化
合物半導体を用いた超高速素子の開発が進み、マイクロ
波帯の処理機能を半導体基板上に集積化したいわゆるM
MIC(Monolithic Microwave Integrated Circuit )
技術の研究開発も活発に行われている。特に30GHz
以上のミリ波領域では、マイクロストリップ線路等の放
射損失が大きくなるので、回路素子間の相互の結線をで
きる限り短縮することが必要とされる。従って、ミリ波
の無線機器等においては、アンテナも半導体素子上に一
体に集積化したMMICが必要とされている。
2. Description of the Related Art In recent years, development of ultra-high-speed devices using III-V group compound semiconductors such as GaAs and InP has progressed, and so-called M in which microwave band processing functions are integrated on a semiconductor substrate.
MIC (Monolithic Microwave Integrated Circuit)
Research and development of technology is also actively carried out. Especially 30 GHz
In the above-mentioned millimeter wave region, the radiation loss of the microstrip line or the like becomes large, so it is necessary to shorten the mutual connection between the circuit elements as much as possible. Therefore, in a millimeter wave radio device or the like, an MMIC in which an antenna is integrally integrated on a semiconductor element is required.

【0003】図6に、従来のアンテナ一体型のMMIC
を示す。半絶縁性GaAs基板1上に、HBT(Hetero
Bipolar Transistor )素子2と抵抗,容量,インダク
タンス素子よりなる増幅器等の各機能回路3が集積化さ
れ、各機能回路3がマイクロストリップ線路4で結線さ
れている。増幅器の出力は、整合回路5を経由してマイ
クロストリップパッチアンテナ6に供給されている。ま
た、GaAs基板1の裏面には、接地導体7が設置され
ている。
FIG. 6 shows a conventional MMIC integrated with an antenna.
Is shown. On the semi-insulating GaAs substrate 1, HBT (Hetero
A bipolar transistor 2 and each functional circuit 3 such as an amplifier including a resistance, a capacitance, and an inductance element are integrated, and each functional circuit 3 is connected by a microstrip line 4. The output of the amplifier is supplied to the microstrip patch antenna 6 via the matching circuit 5. A ground conductor 7 is provided on the back surface of the GaAs substrate 1.

【0004】上記の構成において、増幅器より供給され
た高周波電力は、マイクロストリップパッチアンテナ6
に蓄積され、自由空間へと放射される。通常、マイクロ
ストリップ線路を構成する誘電体基板の厚みは、所望の
波長よりも十分低く設定される。例えば、60GHzの
周波数を伝送する線路では、GaAs基板1の厚みは5
0μm程度に設定される。これは、GaAs中での電磁
波の波長のおよそ1/28である。
In the above structure, the high frequency power supplied from the amplifier is the microstrip patch antenna 6.
Are stored in and radiated into free space. Normally, the thickness of the dielectric substrate that constitutes the microstrip line is set sufficiently lower than the desired wavelength. For example, in a line that transmits a frequency of 60 GHz, the GaAs substrate 1 has a thickness of 5
It is set to about 0 μm. This is about 1/28 of the wavelength of electromagnetic waves in GaAs.

【0005】図6の従来例において、アンテナ素子と回
路機能のモノシリック一体形成は可能になったが、まだ
未解決の問題が残されている。例えば図6の例では、一
つのパッチのみがある場合を図示したが、このような場
合、アンテナの放射パターンは接地面より上の半空間に
対してほぼ無指向性であるので、利得が小さい。指向性
をある程度持たせて、利得を上げることは多くの用途で
有効であるが、このためには複数のアンテナ素子を設け
る必要がある。
In the conventional example of FIG. 6, it is possible to integrally form an antenna element and a circuit function, but there is still an unsolved problem. For example, in the example of FIG. 6, the case where there is only one patch is illustrated, but in such a case, the radiation pattern of the antenna is almost omnidirectional with respect to the half space above the ground plane, so the gain is small. . It is effective in many applications to increase the gain by giving directivity to some extent, but for this purpose, it is necessary to provide a plurality of antenna elements.

【0006】図7に、複数個のアンテナ素子8,9を設
けて3dB程度の利得改善を行った例を示す。しかし、
GaAs基板は高価であるのでチップ面積はできるだけ
小さくする必要がある。60GHzの周波数を取り扱う
ことを考えると、マイクロストリップパッチの大きさは
およそ半波長程度にする必要があるので、GaAs基板
上の波長短縮率として0.3とすれば一辺が0.75m
mの大きさが必要である。さらに、複数個のアンテナ素
子を形成するには、その整数倍の面積が必要である。こ
れは、多くの用途において半導体基板の面積の大部分を
占める要素であり、従ってアンテナ利得と低価格化は両
立できないという問題を抱えていた。
FIG. 7 shows an example in which a plurality of antenna elements 8 and 9 are provided to improve the gain by about 3 dB. But,
Since the GaAs substrate is expensive, it is necessary to make the chip area as small as possible. Considering handling a frequency of 60 GHz, the size of the microstrip patch needs to be about a half wavelength, so if the wavelength shortening rate on the GaAs substrate is 0.3, one side is 0.75 m.
A size of m is required. Furthermore, in order to form a plurality of antenna elements, an area that is an integral multiple thereof is required. This is an element that occupies most of the area of the semiconductor substrate in many applications, and therefore there is a problem that the antenna gain and the cost reduction cannot be achieved at the same time.

【0007】アンテナの利得を改善する別の手段とし
て、アンテナの鏡像を用いることが考えられる。アンテ
ナより1/4波長離れた位置に導体層を設ければ、鏡像
電荷が半波長離れた位置に形成されるので、アンテナ利
得をおよそ3dB増し指向性も改善することができる。
60GHzの周波数を取り扱うことを考えると、GaA
s基板の厚みを1/4波長に相当する350μmとし、
基板表面に接地導体層を設ければ、アンテナの面積を増
やさずに指向性が増す。
As another means of improving the gain of the antenna, it is possible to use a mirror image of the antenna. If the conductor layer is provided at a position separated by ¼ wavelength from the antenna, the image charge is formed at a position separated by a half wavelength, so that the antenna gain can be increased by about 3 dB and the directivity can be improved.
Considering handling the frequency of 60 GHz, GaA
The thickness of the substrate is 350 μm, which corresponds to a quarter wavelength,
Providing the ground conductor layer on the surface of the substrate increases the directivity without increasing the area of the antenna.

【0008】一方、回路機能相互の結線において、電気
的な相互干渉を避けようとすると、例えばマイクロスト
リップ線路基板の5倍程度素子間隔や線路間隔をあける
必要があり、厚さ350μmの基板を用いた場合、60
GHzでは1.7mmにもなり、かえってチップ面積が
増加してしまう。
On the other hand, in order to avoid electrical mutual interference in the connection of the circuit functions, it is necessary to provide an element spacing and a line spacing of, for example, about 5 times that of the microstrip line substrate, and a substrate having a thickness of 350 μm is used. If yes, 60
At GHz, it becomes 1.7 mm, which rather increases the chip area.

【0009】[0009]

【発明が解決しようとする課題】このように従来、アン
テナ素子を内蔵したマイクロ波・ミリ波の処理機能を有
する半導体装置においては、アンテナの鏡像を利用して
利得及び指向性を改善することができるが、鏡像を利用
するために基板の厚みを厚くすると、回路機能相互の干
渉を避けるために素子間隔や線路間隔を大きく広げる必
要が生じ、チップ面積が増加してしまうという問題があ
った。
As described above, conventionally, in a semiconductor device having a microwave / millimeter wave processing function having an antenna element built-in, it is possible to improve gain and directivity by utilizing a mirror image of the antenna. However, if the thickness of the substrate is increased to use the mirror image, it is necessary to widen the element spacing and the line spacing in order to avoid mutual interference of circuit functions, which causes a problem of increasing the chip area.

【0010】本発明は、上記事情を考慮して成されたも
ので、その目的とするところは、アンテナ鏡像利用によ
り利得及び指向性を増すことができ、かつこれに伴う素
子間距離の増大を招くことなく回路機能相互間を十分に
分離することができ、利得及び指向性の向上とチップ面
積縮小の双方を達成し得るアンテナ素子内蔵型の半導体
装置を提供することにある。
The present invention has been made in consideration of the above circumstances. An object of the present invention is to increase gain and directivity by utilizing an antenna mirror image, and to increase the inter-element distance accordingly. An object of the present invention is to provide a semiconductor device with a built-in antenna element, which can sufficiently separate circuit functions without inviting each other and can achieve both improvement of gain and directivity and reduction of chip area.

【0011】[0011]

【課題を解決するための手段】[Means for Solving the Problems]

(概要)上記課題を解決するために本発明は、次のよう
な構成を採用している。即ち本発明は、アンテナ素子を
内蔵した半導体装置において、半絶縁性化合物半導体基
板の主面に形成された少なくとも一つの半導体素子を含
む回路素子と、前記基板の主面上に形成され電磁波を入
力又は出力するアンテナ素子と、前記基板の裏面に形成
された第1の接地導体層と、前記基板の主面に形成され
前記回路素子に接続された線路と、前記線路と共に伝送
路を構成する第2の接地導体層とを具備してなることを
特徴とする。
(Summary) In order to solve the above problems, the present invention employs the following configuration. That is, according to the present invention, in a semiconductor device having a built-in antenna element, a circuit element including at least one semiconductor element formed on a main surface of a semi-insulating compound semiconductor substrate and an electromagnetic wave formed on the main surface of the substrate are input. Alternatively, an antenna element for outputting, a first ground conductor layer formed on the back surface of the substrate, a line formed on the main surface of the substrate and connected to the circuit element, and a line that forms a transmission line together with the line. It is characterized by comprising two ground conductor layers.

【0012】ここで、本発明の望ましい実施態様として
は次のものがあげられる。 (1) 線路と第2の接地導体層との離間距離は、アンテナ
素子より入力又は出力する電磁波の波長λに対し(1/
8)λ以下であって、アンテナ素子と第1の接地導体層
との離間距離は(1/8)λ〜(3/8)λであるこ
と。 (2) 第2の接地導体層は基板の主面上に線路とは絶縁層
を挟んで形成され、アンテナ素子は第2の接地導体層の
開口部からなるスロットアンテナであること。 (3) 第2の接地導体層は基板の主面に前記線路と同一面
上に形成され、アンテナ素子は線路及び第2の接地導体
層が形成された面とは絶縁層を挟んで形成されたパッチ
アンテナであること。 (4) 半絶縁性化合物半導体基板として、GaAs基板を
用いたこと。 (5) 基板の主面に形成する半導体素子として、HBTや
HEMT(High Electron Mobility Transistor )を用
いたこと。 (6) 絶縁層として、ポリイミドを用いたこと。 (作用)本発明では、基板上に集積化したマイクロスト
リップアンテナの利得を改善するために、アンテナの鏡
像がアンテナより実効波長で半波長程度離れた位置に形
成されるように第1の接地導体層を設け、回路機能相互
の結線に用いる伝送線路の接地導体として第2の接地導
体層を設けている。第1の接地導体層は、アンテナ素子
が形成された半導体基板主面の裏面に形成されている。
The following are preferred embodiments of the present invention. (1) The distance between the line and the second ground conductor layer is (1/1) with respect to the wavelength λ of the electromagnetic wave input or output from the antenna element.
8) λ or less, and the distance between the antenna element and the first ground conductor layer is (1/8) λ to (3/8) λ. (2) The second ground conductor layer is formed on the main surface of the substrate with an insulating layer interposed between the line and the antenna element, and the antenna element is a slot antenna including an opening of the second ground conductor layer. (3) The second ground conductor layer is formed on the main surface of the substrate on the same surface as the line, and the antenna element is formed with the line and the surface on which the second ground conductor layer is formed sandwiching an insulating layer. It must be a patch antenna. (4) A GaAs substrate was used as the semi-insulating compound semiconductor substrate. (5) HBT or HEMT (High Electron Mobility Transistor) is used as a semiconductor element formed on the main surface of the substrate. (6) Polyimide was used as the insulating layer. (Operation) In the present invention, in order to improve the gain of the microstrip antenna integrated on the substrate, the first ground conductor is formed so that the mirror image of the antenna is formed at a position separated from the antenna by an effective wavelength of about a half wavelength. A layer is provided and a second ground conductor layer is provided as a ground conductor of a transmission line used for connecting circuit functions to each other. The first ground conductor layer is formed on the back surface of the main surface of the semiconductor substrate on which the antenna element is formed.

【0013】このような構成において、基板内における
電磁波の波長λに対し、第1の接地導体層とアンテナ素
子との実効的な距離を(1/8)λ〜(3/8)λ、よ
り望ましくは(1/4)λに選択することにより、アン
テナの鏡像が半波長離れた位置に生じるので、アンテナ
の指向性が増し利得が改善される。第1の接地導体層を
半導体基板の裏面に形成するように基板の厚みを選べ
ば、工程数とチップ面積を増やすことなく利得が改善さ
れるので、コスト低減が可能である。
In such a structure, the effective distance between the first ground conductor layer and the antenna element is (1/8) λ to (3/8) λ, with respect to the wavelength λ of the electromagnetic wave in the substrate. Desirably, by selecting (1/4) λ, a mirror image of the antenna occurs at a position separated by a half wavelength, so that the directivity of the antenna is increased and the gain is improved. If the thickness of the substrate is selected so that the first ground conductor layer is formed on the back surface of the semiconductor substrate, the gain can be improved without increasing the number of steps and the chip area, so that the cost can be reduced.

【0014】また、第2の接地導体層を、回路機能を相
互結線する伝送路の接地層として設けることで、回路機
能相互の電気的な分離を短距離で行え、チップ面積の縮
小が可能になり、コスト低減が行える。
Further, by providing the second ground conductor layer as the ground layer of the transmission line interconnecting the circuit functions, the circuit functions can be electrically separated from each other in a short distance, and the chip area can be reduced. Therefore, the cost can be reduced.

【0015】[0015]

【発明の実施の形態】以下、本発明の実施形態を図面を
参照して説明する。 (第1実施形態)図1及び図2は本発明の第1実施形態
に係わるアンテナ素子内蔵型半導体装置の概略構成を説
明するためのもので、図1は断面図、図2は斜視図であ
る。
Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIGS. 1 and 2 are for explaining a schematic configuration of a semiconductor device with a built-in antenna element according to a first embodiment of the present invention. FIG. 1 is a sectional view and FIG. 2 is a perspective view. is there.

【0016】この実施形態では、厚さ330μmのGa
As基板(半絶縁性化合物半導体基板)10上にHBT
と抵抗,容量素子よりなる60GHzの処理回路(回路
素子)11が集積化され、その基板表面に厚さ5μmの
ポリイミド膜12が積層され、その上に第2の接地導体
層13が積層されている。回路素子相互の結線は、Ga
As基板10上に形成された線路14と第2の接地導体
層13とで構成される、いわゆる逆マイクロストリップ
線路(伝送路)によって行われている。
In this embodiment, Ga having a thickness of 330 μm is used.
HBT on As substrate (semi-insulating compound semiconductor substrate) 10
A processing circuit (circuit element) 11 of 60 GHz including a resistor and a capacitor is integrated, a polyimide film 12 having a thickness of 5 μm is laminated on the substrate surface, and a second ground conductor layer 13 is laminated thereon. There is. The connection between circuit elements is Ga
This is performed by a so-called reverse microstrip line (transmission line) composed of the line 14 formed on the As substrate 10 and the second ground conductor layer 13.

【0017】第2の接地導体層13の所望の位置にはス
ロット15が開口され、処理回路11から延伸した逆マ
イクロストリップ線路がスロット下部16で第2の接地
導体層13に接続され、これによりスロット15から基
板上面方向に電磁波17を放射する構造となっている。
スロット15の形状は、所望の帯域が得られるように設
定するが、例えば60GHzを放射する場合、長辺2m
m程度の長方形等が用いられる。
A slot 15 is opened at a desired position of the second ground conductor layer 13, and an inverted microstrip line extending from the processing circuit 11 is connected to the second ground conductor layer 13 at the lower portion 16 of the slot, whereby The structure is such that the electromagnetic wave 17 is radiated from the slot 15 toward the upper surface of the substrate.
The shape of the slot 15 is set so as to obtain a desired band, but when radiating 60 GHz, for example, the long side is 2 m.
A rectangle of about m is used.

【0018】GaAs基板20の下面には、第1の接地
導体層18が設けられている。第1の接地導体層18と
第2の接地導体層13は、GaAs基板10を貫通する
導電体19で接続されている。
A first ground conductor layer 18 is provided on the lower surface of the GaAs substrate 20. The first ground conductor layer 18 and the second ground conductor layer 13 are connected by a conductor 19 penetrating the GaAs substrate 10.

【0019】このような構成であれば、スロットアンテ
ナを構成する第2の接地導体層13と基板裏面側の第1
の接地導体層18との距離が、60GHzにおけるGa
As中での電磁波の波長λの1/4となるので、アンテ
ナ鏡像のために利得及び指向性を増すことができる。さ
らに、第2の接地導体層13は厚さ5μmのポリイミド
膜12を介して基板主面の線路14とマイクロストリッ
プ線路を形成しているので、回路素子相互の分離はその
5倍程度でよく、回路素子相互の干渉防止のために間隔
を大きく開ける必要は無い。
With such a structure, the second ground conductor layer 13 forming the slot antenna and the first grounding layer on the back side of the substrate are formed.
The distance from the ground conductor layer 18 is 60 Ga
Since the wavelength is ¼ of the wavelength λ of the electromagnetic wave in As, the gain and directivity can be increased due to the mirror image of the antenna. Further, since the second ground conductor layer 13 forms the microstrip line with the line 14 on the main surface of the substrate via the polyimide film 12 having a thickness of 5 μm, the circuit elements may be separated from each other by about five times as much. It is not necessary to make a large gap to prevent interference between circuit elements.

【0020】ここで、第1及び第2の接地導体層の間隔
を変えるとアンテナ鏡像効果も変化するが、これらの間
隔、即ちGaAs基板の厚さは次の範囲が望ましい。ア
ンテナ主面に垂直な方向の放射電界強度を、GaAs基
板10の厚さの関数として図3に示した。なお、比較の
ために第1の接地導体層が無い場合の電界強度を図中に
破線で示す。
Here, when the distance between the first and second ground conductor layers is changed, the antenna image effect also changes, but the distance, that is, the thickness of the GaAs substrate is preferably in the following range. The radiated electric field strength in the direction perpendicular to the antenna main surface is shown in FIG. 3 as a function of the thickness of the GaAs substrate 10. For comparison, the electric field strength when there is no first ground conductor layer is shown by a broken line in the figure.

【0021】主面に垂直な方向では、アンテナ位置にあ
るダイポールと鏡像位置にある逆位相のダイポールから
の放射電界が足し合わされ、基板厚みが半波長変わる毎
に周期的に強度が変化する。図3より、GaAs基板の
厚みを1/8波長より大きく3/8より小さくとれば、
主面に垂直な方向の電界強度を第1の接地導体層が無い
場合に比べて増加させることができる。
In the direction perpendicular to the main surface, the radiated electric fields from the dipole at the antenna position and the dipole of the opposite phase at the mirror image position are added together, and the intensity periodically changes every time the substrate thickness changes by half a wavelength. From FIG. 3, if the thickness of the GaAs substrate is larger than 1/8 wavelength and smaller than 3/8,
The electric field strength in the direction perpendicular to the main surface can be increased as compared with the case without the first ground conductor layer.

【0022】このように本実施形態によれば、GaAs
基板10の厚さをGaAs中における電磁波の波長λの
1/4程度に設定し、GaAs基板10の裏面に第1の
接地導体層18を形成しているので、アンテナの鏡像が
半波長離れた位置に生じることになり、これによりアン
テナの指向性を増して利得を改善することができる。そ
して、このための工程はGaAs基板10の厚みを所望
の厚さに設定するだけなので、工程数とチップ面積を増
やすことなく指向性の制御と利得の改善が行え、コスト
低減が可能である。
As described above, according to this embodiment, GaAs
Since the thickness of the substrate 10 is set to about 1/4 of the wavelength λ of the electromagnetic wave in GaAs and the first ground conductor layer 18 is formed on the back surface of the GaAs substrate 10, the mirror image of the antenna is separated by half a wavelength. In the position, the directivity of the antenna can be increased and the gain can be improved. Since the step for this purpose is only to set the thickness of the GaAs substrate 10 to a desired thickness, the directivity can be controlled and the gain can be improved without increasing the number of steps and the chip area, and the cost can be reduced.

【0023】また、第2の接地導体層13を、回路機能
を相互接続する伝送路の接地層として設けることで、回
路機能相互の電気的な分離を短距離で行え、チップ面積
の縮小が可能になり、コスト低減が行える。本実施形態
では、伝送路を構成する絶縁層として厚み5μmのポリ
イミド膜12を用いており、素子間隔は電磁気的な相互
干渉なしにおよそ25μm程度まで縮小可能で、チップ
面積の縮小とコスト削減に有効である。また、アンテナ
を構成するスロットラインはGaAs(比誘電率=1
3)に比べ低誘電率のポリイミド(比誘電率=3)上に
構成されるので、GaAs上に直接アンテナを設けた場
合に比べアンテナ面積を大きくとれ空中の放射効率が増
す。 (第2実施形態)図4及び図5は本発明の第2実施形態
に係わるアンテナ素子内蔵型半導体装置概略構成を説明
するためのもので、図4は断面図、図5は斜視図であ
る。
Further, by providing the second ground conductor layer 13 as the ground layer of the transmission line interconnecting the circuit functions, the circuit functions can be electrically separated from each other in a short distance, and the chip area can be reduced. Therefore, the cost can be reduced. In the present embodiment, the polyimide film 12 having a thickness of 5 μm is used as the insulating layer forming the transmission line, and the element spacing can be reduced to about 25 μm without electromagnetic mutual interference, which reduces the chip area and cost. It is valid. In addition, the slot line forming the antenna is GaAs (relative permittivity = 1)
Since it is formed on polyimide having a lower dielectric constant (relative permittivity = 3) than 3), the antenna area can be made larger and the radiation efficiency in the air can be increased as compared with the case where the antenna is directly provided on GaAs. (Second Embodiment) FIGS. 4 and 5 are for explaining a schematic structure of a semiconductor device with a built-in antenna element according to a second embodiment of the present invention. FIG. 4 is a sectional view and FIG. 5 is a perspective view. .

【0024】この実施形態では、厚さ330μmのGa
As基板(半絶縁性化合物半導体基板)20上にHBT
と抵抗、容量素子よりなる60GHzの処理回路(回路
素子)21が集積化され、その基板表面に第2の接地導
体層23が積層され、その上に厚さ5μmのポリイミド
膜22が積層されている。回路素子相互の結線は、Ga
As基板表面に形成された線路24と第2の接地導体層
23とで構成されるコプレーナー線路(伝送路)によっ
て行われている。
In this embodiment, Ga having a thickness of 330 μm is used.
HBT on As substrate (semi-insulating compound semiconductor substrate) 20
A 60 GHz processing circuit (circuit element) 21 composed of a resistor and a capacitor is integrated, a second ground conductor layer 23 is laminated on the substrate surface, and a polyimide film 22 having a thickness of 5 μm is laminated thereon. There is. The connection between circuit elements is Ga
This is performed by a coplanar line (transmission line) composed of the line 24 formed on the surface of the As substrate and the second ground conductor layer 23.

【0025】ポリイミド膜22上にはパッチアンテナ2
5が形成され、このパッチアンテナ25はコプレーナー
線路の中心導体(線路24)と接続されている。そし
て、パッチアンテナ25の表面から基板上面方向に電磁
波27を放射する構造となっている。パッチの形状は、
所望の帯域が得られるように設定するが、特に接地導体
層の位置が第2の接地導体層23から後述する第1の接
地導体層へ不連続的に変換する部位での反射が抑えられ
るように設計する。
The patch antenna 2 is provided on the polyimide film 22.
5 is formed, and the patch antenna 25 is connected to the center conductor (line 24) of the coplanar line. The electromagnetic wave 27 is radiated from the surface of the patch antenna 25 toward the upper surface of the substrate. The shape of the patch is
It is set so that a desired band can be obtained, but in particular, the reflection of the position of the ground conductor layer is suppressed so that it is discontinuously converted from the second ground conductor layer 23 to the later-described first ground conductor layer. To design.

【0026】また本実施形態では、パッチアンテナ25
をポリイミド膜22の上に構成したが、パッチアンテナ
25をGaAs基板20上に直接形成してポリイミド膜
22を省くことも可能である。
Further, in the present embodiment, the patch antenna 25
However, it is also possible to omit the polyimide film 22 by directly forming the patch antenna 25 on the GaAs substrate 20.

【0027】GaAs基板20の下面には、第1の接地
導体層28が設けられている。第1の接地導体層28と
第2の接地導体層23は、GaAs基板20を貫通する
導電体29で接続されている。図5においては、アンテ
ナに電力を供給するGaAs基板上の回路構成を明示す
るために、回路部分の最上層のポリイミド膜を省いて図
示した。
A first ground conductor layer 28 is provided on the lower surface of the GaAs substrate 20. The first ground conductor layer 28 and the second ground conductor layer 23 are connected by a conductor 29 penetrating the GaAs substrate 20. In FIG. 5, in order to clearly show the circuit configuration on the GaAs substrate that supplies power to the antenna, the uppermost polyimide film in the circuit portion is omitted.

【0028】このような構成であっても、パッチアンテ
ナ25と第1の接地導体層28との間隔を60GHzに
おけるGaAs中での電磁波の1/4波長程度とするこ
とができ、しかも線路24と第2の接地導体層23とで
極めて短い間隔でコプレーナー線路を形成しているの
で、回路素子間を大きく離す必要無しに回路素子相互の
干渉防止をはかることができる。従って、第1の実施形
態と同様の効果が得られる。
Even with such a configuration, the distance between the patch antenna 25 and the first ground conductor layer 28 can be set to about 1/4 wavelength of the electromagnetic wave in GaAs at 60 GHz, and the line 24 and Since the coplanar line is formed with the second ground conductor layer 23 at an extremely short interval, it is possible to prevent the mutual interference of the circuit elements without the need to greatly separate the circuit elements. Therefore, the same effect as in the first embodiment can be obtained.

【0029】なお、本発明は上述した各実施形態に限定
されるものではない。実施形態では空中へ電磁波を放射
する場合を例にとったが、本発明は電波を受信・増幅す
る機能を有する半導体装置の構成にも適用できる。ま
た、実施形態では第1の接地導体層をアンテナ主面より
実効波長にて1/4波長程度離す位置に置いたが、所望
の放射パターンやアンテナ利得を得る範囲にてこの距離
は適宜変更可能である。
The present invention is not limited to the above embodiments. In the embodiments, the case of radiating electromagnetic waves into the air has been taken as an example, but the present invention can also be applied to the configuration of a semiconductor device having a function of receiving and amplifying radio waves. Further, in the embodiment, the first ground conductor layer is placed at a position separated from the antenna main surface by about 1/4 wavelength at the effective wavelength, but this distance can be changed as appropriate within a range where a desired radiation pattern and antenna gain are obtained. Is.

【0030】また、基板はGaAsに限るものではな
く、HBTやHEMTを形成するのに適した半絶縁性化
合物半導体基板を用いることができる。さらに、絶縁層
は必ずしもポリイミドに限るものではなく、各種の絶縁
体を用いることができる。但し、半導体基板上に直接ア
ンテナを設けた場合よりも空中の放射効率を増すために
は、基板よりも誘電率の低いものが望ましい。その他、
本発明の要旨を逸脱しない範囲で、種々変形して実施す
ることができる。
The substrate is not limited to GaAs, and a semi-insulating compound semiconductor substrate suitable for forming HBT or HEMT can be used. Further, the insulating layer is not necessarily limited to polyimide, and various insulating materials can be used. However, in order to increase the radiation efficiency in the air as compared with the case where the antenna is directly provided on the semiconductor substrate, it is desirable that the dielectric constant is lower than that of the substrate. Other,
Various modifications can be made without departing from the scope of the present invention.

【0031】[0031]

【発明の効果】以上詳述したように本発明によれば、半
絶縁性化合物半導体基板の裏面にアンテナ鏡像形成のた
めの第1の接地導体層を設けると共に、基板の主面側に
伝送路形成のための第2の接地導体層を設けることによ
り、アンテナ鏡像利用により利得及び指向性を増すこと
ができ、かつこれに伴う素子間距離の増大を招くことな
く回路機能相互間を十分に分離することができる。従っ
て、利得及び指向性の向上とチップ面積縮小の双方を達
成し得るアンテナ素子内蔵型の半導体装置を実現するこ
とが可能となる。
As described above in detail, according to the present invention, the first ground conductor layer for forming the antenna mirror image is provided on the back surface of the semi-insulating compound semiconductor substrate, and the transmission line is provided on the main surface side of the substrate. By providing the second ground conductor layer for formation, the gain and directivity can be increased by utilizing the antenna mirror image, and the circuit functions can be sufficiently separated from each other without causing the increase in the distance between the elements. can do. Therefore, it is possible to realize a semiconductor device with a built-in antenna element that can achieve both improvement of gain and directivity and reduction of chip area.

【図面の簡単な説明】[Brief description of drawings]

【図1】第1実施形態に係わるアンテナ内蔵型半導体装
置の概略構成を示す断面図。
FIG. 1 is a sectional view showing a schematic configuration of a semiconductor device with a built-in antenna according to a first embodiment.

【図2】第1実施形態に係わるアンテナ内蔵型半導体装
置の概略構成を示す斜視図。
FIG. 2 is a perspective view showing a schematic configuration of a semiconductor device with a built-in antenna according to the first embodiment.

【図3】GaAs基板厚さ/GaAs内波長と電界強度
との関係を示す特性図。
FIG. 3 is a characteristic diagram showing the relationship between GaAs substrate thickness / wavelength in GaAs and electric field strength.

【図4】第2実施形態に係わるアンテナ内蔵型半導体装
置の概略構成を示す断面図。
FIG. 4 is a sectional view showing a schematic configuration of a semiconductor device with a built-in antenna according to a second embodiment.

【図5】第2実施形態に係わるアンテナ内蔵型半導体装
置の概略構成を示す斜視図。
FIG. 5 is a perspective view showing a schematic configuration of a semiconductor device with a built-in antenna according to a second embodiment.

【図6】第1の従来例に係わるアンテナ一体型のMMI
Cを示す図。
FIG. 6 is an antenna integrated MMI according to a first conventional example.
The figure which shows C.

【図7】第2の従来例に係わるアンテナ一体型のMMI
Cを示す図。
FIG. 7 is an antenna integrated MMI according to a second conventional example.
The figure which shows C.

【符号の説明】[Explanation of symbols]

10,20…GaAs基板 11,21…処理回路 12,22…ポリイミド膜 13,23…第2の接地導体層 14,24…線路 15…スロット 16…スロット下部 17,27…電磁波 18,28…第1の接地導体層 19,29…導電体 25…パッチアンテナ 10, 20 ... GaAs substrate 11, 21 ... Processing circuit 12, 22 ... Polyimide film 13, 23 ... Second ground conductor layer 14, 24 ... Line 15 ... Slot 16 ... Slot lower part 17, 27 ... Electromagnetic wave 18, 28 ... 1. Ground conductor layer 19, 29 ... Conductor 25 ... Patch antenna

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】半絶縁性化合物半導体基板の主面に形成さ
れた少なくとも一つの半導体素子を含む回路素子と、前
記基板の主面上に形成され電磁波を入力又は出力するア
ンテナ素子と、前記基板の裏面に形成された第1の接地
導体層と、前記基板の主面に形成され前記回路素子に接
続された線路と、前記線路と共に伝送路を構成する第2
の接地導体層とを具備してなることを特徴とする半導体
装置。
1. A circuit element including at least one semiconductor element formed on a main surface of a semi-insulating compound semiconductor substrate, an antenna element formed on the main surface of the substrate for inputting or outputting electromagnetic waves, and the substrate. A first ground conductor layer formed on the back surface of the substrate, a line formed on the main surface of the substrate and connected to the circuit element, and a second line forming a transmission line together with the line.
2. A semiconductor device comprising the ground conductor layer of.
【請求項2】半絶縁性化合物半導体基板の主面に形成さ
れた少なくとも一つの半導体素子を含む回路素子と、前
記基板の主面上に形成され電磁波を入力又は出力するア
ンテナ素子と、前記基板の裏面に形成された第1の接地
導体層と、前記基板の主面に形成され前記回路素子に接
続された線路と、前記線路と共に伝送路を構成する第2
の接地導体層とを具備してなり、 前記線路と第2の接地導体層との離間距離は、前記アン
テナ素子より入力又は出力する電磁波の波長λの1/8
以下であって、前記アンテナ素子と第1の接地導体層と
の離間距離は、前記波長λの1/8以上3/8以下であ
ることを特徴とする半導体装置。
2. A circuit element including at least one semiconductor element formed on a main surface of a semi-insulating compound semiconductor substrate, an antenna element formed on the main surface of the substrate for inputting or outputting electromagnetic waves, and the substrate. A first ground conductor layer formed on the back surface of the substrate, a line formed on the main surface of the substrate and connected to the circuit element, and a second line forming a transmission line together with the line.
And a separation distance between the line and the second ground conductor layer is 1/8 of a wavelength λ of an electromagnetic wave input or output from the antenna element.
The semiconductor device is characterized in that the distance between the antenna element and the first ground conductor layer is 1/8 or more and 3/8 or less of the wavelength λ.
【請求項3】第2の接地導体層は、前記基板の主面上に
前記線路とは絶縁層を挟んで形成され、前記アンテナ素
子は、第2の接地導体層の開口部からなるスロットアン
テナであることを特徴とする請求項1又は2記載の半導
体装置。
3. A slot antenna having a second ground conductor layer formed on the main surface of the substrate with an insulating layer sandwiched between the line and the antenna element, the slot element comprising an opening of the second ground conductor layer. The semiconductor device according to claim 1 or 2, wherein
【請求項4】第2の接地導体層は、前記基板の主面に前
記線路と同一面上に形成され、前記アンテナ素子は、前
記線路及び第2の接地導体層が形成された面とは絶縁層
を挟んで形成されたパッチアンテナであることを特徴と
する請求項1又は2記載の半導体装置。
4. A second ground conductor layer is formed on the same main surface of the substrate as the line, and the antenna element is different from the surface on which the line and the second ground conductor layer are formed. The semiconductor device according to claim 1 or 2, which is a patch antenna formed with an insulating layer sandwiched therebetween.
JP23535495A 1995-09-13 1995-09-13 Semiconductor device Pending JPH0983241A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23535495A JPH0983241A (en) 1995-09-13 1995-09-13 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23535495A JPH0983241A (en) 1995-09-13 1995-09-13 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH0983241A true JPH0983241A (en) 1997-03-28

Family

ID=16984854

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23535495A Pending JPH0983241A (en) 1995-09-13 1995-09-13 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0983241A (en)

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WO2004042947A1 (en) * 2002-11-07 2004-05-21 Matsushita Electric Industrial Co., Ltd. Communication terminal
JP2006345042A (en) * 2005-06-07 2006-12-21 Hitachi Ltd Antenna, radio module provided with the antenna, radio unit, and radio apparatus
US7298029B2 (en) 1998-12-17 2007-11-20 Hitachi, Ltd. Semiconductor devices and manufacturing method therefor
JP2008510425A (en) * 2004-08-18 2008-04-03 テレフオンアクチーボラゲット エル エム エリクソン(パブル) Waveguide notch antenna
JP2011086284A (en) * 2009-09-17 2011-04-28 Semiconductor Energy Lab Co Ltd Semiconductor device
US8624373B2 (en) * 2004-12-20 2014-01-07 United Monolithic Semiconductor S.A. Miniature electronic component for microwave applications

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7298029B2 (en) 1998-12-17 2007-11-20 Hitachi, Ltd. Semiconductor devices and manufacturing method therefor
JP2002271133A (en) * 2001-03-09 2002-09-20 Sharp Corp High-frequency antenna and high-frequency communications equipment
WO2004042947A1 (en) * 2002-11-07 2004-05-21 Matsushita Electric Industrial Co., Ltd. Communication terminal
US7519174B2 (en) 2002-11-07 2009-04-14 Panasonic Corporation Communication terminal with casing conductors for reducing antenna gain degradation
JP2008510425A (en) * 2004-08-18 2008-04-03 テレフオンアクチーボラゲット エル エム エリクソン(パブル) Waveguide notch antenna
US8624373B2 (en) * 2004-12-20 2014-01-07 United Monolithic Semiconductor S.A. Miniature electronic component for microwave applications
JP2006345042A (en) * 2005-06-07 2006-12-21 Hitachi Ltd Antenna, radio module provided with the antenna, radio unit, and radio apparatus
US7817094B2 (en) 2005-06-07 2010-10-19 Hitachi, Ltd. Antenna, and wireless module, wireless unit and wireless apparatus having the antenna
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