JP2008061158A - Antenna device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To propose a novel antenna structure in which integration of an antenna is realized at low cost so that a conductive material can be placed at the immediate vicinity of an antenna element, so as to solve a problem wherein, as an antenna characteristic is considerably deteriorated by adjacent conductive materials, a conductive circuit component needs to be arranged apart from the antenna element, which causes increase in size of a current IC substrate and thereby resulting in the cost increase, while an immeasurable effect would be gained if the antenna element could be mounted on an IC substrate together with a circuit. <P>SOLUTION: The antenna device comprises a non-conductive slit formed on a conductive layer on the IC circuit substrate, electric power is fed and received at both opposing ends on the slit. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an antenna device formed on a semiconductor integrated circuit substrate.

In recent years, the progress of semiconductor manufacturing technology has been remarkable, and the degree of integration has been increasing as a system-on-chip, and there is a tendency to mount all semiconductor circuits within one chip. Therefore, the number of pins for connecting the semiconductor chip and the external circuit is enormous, and it is not uncommon to exceed several hundreds.
In addition, the operating frequency of the semiconductor circuit is increased, and in the conventional method of connecting to the outside through wire bonding, high frequency characteristics become a problem, and it is difficult to correctly exchange signals with the outside. In order to deal with such a problem, Non-Patent Documents 1 and 2 and Patent Documents 1 to 4 report research on wireless connection between semiconductor chips or circuit blocks. Attempts to form are reported.

Japanese Patent Laid-Open No. 10-256478 JP 2000-124406 A JP 2000-68904 A JP 2003-101320 A 161 page of the Nikkei Microdevice December 2003 issue 'A 20GHz CMOS RF Down-Converter with an On-chip Antenna' Yu Su et.al.ISSCC2005 P.270

However, forming an antenna on a semiconductor chip is a very difficult task,
Patent documents 1 to 4 do not show any effective solutions. For example, in Patent Document 2, a quarter-wave antenna using a 1.5 GHz radio wave is integrated on an integrated circuit, but the wavelength of the 1.5 GHz radio wave is 20 cm, which is a quarter wavelength, that is, 5 cm. It is clearly impossible to integrate the antennas on an integrated circuit. Patent Documents 3 and 4 show a structure in which an insulating film is formed on a semiconductor chip and a planar antenna radiator is provided thereon. Those skilled in the art can easily understand that electromagnetic waves are not efficiently radiated from the radiator placed on the insulating film.

In Non-Patent Document 2, the loss between antennas with a distance of 5 m at a frequency of 20 GHz is 9%.
It is reported to be 9 dB. This is a path loss 7 in free space at 20 GHz.
27 dB compared to 2 dB, and 1/1 of the energy considering the antenna directivity gain
It shows that only about 000 is used. Attempting to use such an antenna at a lower frequency results in a further inefficiency due to the fundamental limit of the antenna, and an antenna on a semiconductor chip formed by conventional techniques usually at a frequency of several GHz. Then, the efficiency is about 0.01%.

FIG. 10 shows a typical example when an antenna is formed on a conventional semiconductor chip. Figure (
a) is a perspective view showing an antenna on a semiconductor chip. The antenna element 1001 is formed over the semiconductor substrate 1003 by a conductive layer such as a metal layer used for wiring of a semiconductor integrated circuit. In the figure, a bent dipole antenna having a power supply / reception point 1002 is illustrated. A meandering dipole or an inverted-F monopole antenna is often used due to the linear pattern of the metal layer.

FIG. 2B is a sectional view showing the mounting state at the same time. In order to avoid duplication of description, the same reference numerals as those in FIG. The semiconductor substrate 1003 is cut into chips for each unit, enclosed in a package or the like, and mounted. This figure shows the case where the chip is directly mounted on the printed circuit board 1005, and sealing for protection is omitted. The semiconductor substrate 1003 has a wiring pattern 100 on the printed circuit board 1005 for fixing the potential.
4 is bonded.

Silicon is often used as a material for the semiconductor substrate, but silicon germanium or other semiconductors may be used. A material having conductivity of about 10 Ωcm is often used. In addition, aluminum is often used for the metal layer forming the antenna element 1001, but other materials such as copper may be used. An insulating layer 1006 having a thickness of about 1 μm is placed between the antenna element 1001 and the semiconductor substrate 1003 to insulate them. As a material for the insulating layer, silicon dioxide is generally used. In a normal semiconductor integrated circuit process, a plurality of metal layers for wiring are formed, but considering the radiation efficiency of the antenna, it is best to use the uppermost layer.

In general, in the case of such an antenna, the presence of a conductive object in the vicinity of the antenna element significantly affects its characteristics. Preferably, conductive objects should not be placed within a range of several wavelengths or more from the antenna element, but it is extremely difficult to keep the conductive material away from the antenna element from the structure of the semiconductor integrated circuit, and it must be placed near the antenna element. Conductive objects get in. In particular, only a thin insulating layer 1006 exists between the antenna element 1001 and the semiconductor substrate 1003, and the loss due to the conductivity of the semiconductor substrate 1003 is very large.

In order to eliminate the loss due to the conductivity of the semiconductor substrate 1003, it is conceivable to improve the efficiency of the antenna by adopting an integrated circuit structure that can use a substrate having low conductivity, that is, a high resistance substrate. Triple well structure integrated circuit and SOI (Silocon On Ins
In an integrated circuit having a (ulator) structure, a high-resistance substrate can be used, and the efficiency of the on-chip antenna can be improved by these integrated circuit processes.

FIG. 9 shows an example in which the radiation efficiency of the two conventional examples described above is simulated by a finite integration method. The figure also shows the characteristics of the antenna device according to the present invention so that the improvement effects in the embodiments according to the present invention can be compared. The explanation will be given later.

If there is a mismatch between the input / output impedance and the radiation impedance of the antenna's power supply / reception circuit, there will be a return loss, but in this figure, this part is removed and the energy received / powered to the antenna is radiated in the air or It shows the ratio of energy sent from the air, that is, radiation efficiency. For the return loss, matching characteristics can be improved by a conventional method.

The specifications common to each example are listed below.
Antenna conductive layer material: Aluminum, thickness 1μm
Antenna element: Bending dipole with a total length of 8.4 mm and a line width of 10 μm Insulating film; SiO ₂ thickness of 7 μm, dielectric constant = 3.8
Integrated circuit board; material = Si, dielectric constant = 11, size = 3 mm × 3 mm
Conductivity = 6.6 Siemens / m or conductivity = 0 (high resistance substrate)
Mounting format of integrated circuit chip with antenna; conventional mounting format shown in FIG.

A characteristic 901 in FIG. 9 shows radiation efficiency when the folded dipole antenna shown in FIG. 10A is formed on a conventional conductive substrate (conductivity = 6.6 Siemens / m). FIG. 10 (c)
As can be seen, the resonance point of this antenna is in the vicinity of 7 GHz. Looking at this, 10GHz
The radiation efficiency is very bad at 0.001 or less (that is, 0.1% or less) over the entire area.
Although only up to 10 GHz is plotted in the figure, the radiation efficiency tends to increase as the frequency of any antenna increases, but the radiation efficiency is not dramatically improved even in this frequency band.

The characteristics 902 and 903 shown in the figure are in the case of the conventional example using the above-described high-resistance substrate, and a bent dipole antenna having the same dimensions as described above is formed on an SOI with a high-resistance substrate having the same shape (conductivity = 0). The radiation efficiency at the time is shown. The length g from the antenna element to the SOI was calculated for two values of 20 μm and 150 μm in order to see the influence when the SOI layer is in the vicinity of the antenna element. That is, the characteristic 902 indicates g = 20 μm, and the characteristic 903 indicates g = 150 μm. The resonance point of the antenna is in the vicinity of 7 GHz as described above. From these, it can be seen that when the antenna is formed on the SOI with the high resistance substrate, the radiation efficiency is improved by one digit or more than the above. In addition, it is possible to confirm that the length g must be increased in order to obtain a large improvement effect, and therefore the chip cost of the integrated circuit increases.

Thus, it can be seen that the efficiency of the antenna formed on the integrated circuit using the high resistance substrate can be remarkably improved. However, the disadvantage of the prior art in which the antenna is formed on the integrated circuit board with the above-described structure is that a non-doped area must be set over a relatively large area in the vicinity of the antenna element, and this place constitutes a semiconductor integrated circuit. It cannot be used as an area for building elements such as transistors. This inevitably increases the area of the integrated circuit chip and thus increases the cost.

Therefore, in the present invention, a new antenna capable of placing a conductive material as close as possible to the antenna element is intended to eliminate the cost increase factor when the antenna element is also formed on the integrated circuit board and to enable the antenna to be integrated at low cost. Propose structure. An object of the present invention is to increase the area on an integrated circuit substrate on which an integrated circuit element can be formed by making it possible to dispose a conductor as close as possible to the antenna element, thereby reducing the cost of the integrated circuit.

The antenna device according to the present invention includes a non-conductive slit formed in a conductive layer on an integrated circuit board, and receives and feeds power to both opposing ends of the slit.

According to the above-described configuration of the present invention, power is supplied to and fed to both opposing ends on the slit, so that a magnetic current flows in the longitudinal direction of the slit to form a magnetic current antenna. The slit becomes an antenna element, and the slit is surrounded by a conductor. That is, a conductor can be disposed in contact with the antenna element (slit). Magnetic current antennas are less affected by nearby conductors and can be used efficiently near the antenna.

The antenna device of the present invention is characterized in that an impurity is not doped immediately below the slit of the integrated circuit board.

According to the above configuration of the present invention, since impurities are not doped immediately below the slit, the loss directly below the slit as the antenna element is small, and the efficiency of the antenna can be increased.

  The antenna device according to the present invention is characterized in that the slit is linear or polygonal.

According to the above configuration of the present invention, since the slit is linear, the area occupied on the integrated circuit is small, and a wide area on the integrated circuit board is mounted with a circuit for receiving and supplying power to the antenna and other integrated circuit elements. It can be used as an area, and the factor of cost increase due to the mounting of the antenna can be eliminated.

The antenna device of the present invention is characterized in that the slit is formed along a linear or broken line-shaped closed curve surrounding the conductor.

According to the above configuration of the present invention, since the linear or broken slit surrounds the conductor, the conductor surrounded by the slit is insulated from the outer conductor in a DC manner. Since power supply / reception is performed between the inner conductor surrounded by the slit and the outer conductor, a circuit for cutting DC is not required and efficient power supply / reception is possible.

In the antenna device of the present invention, the slit width of the slit is different from the slit width at the power supply / reception point in at least one place.

According to the above-described configuration of the present invention, it is possible to freely set the radiation impedance of the antenna by adjusting the slit width, and antenna matching becomes easy and the antenna can be used efficiently.

An antenna device according to the present invention includes an integrated circuit board, a conductor surrounding the integrated circuit board, a nonconductive slit formed in a conductive layer on the integrated circuit board, a conductive layer on the integrated circuit board, and the integrated circuit. It is comprised from the slit formed of the conductor surrounding a board | substrate.

According to the above configuration of the present invention, the antenna is configured by the slit formed by the slit formed on the integrated circuit board, the integrated circuit board, and the conductor outside the integrated circuit board. It is possible to make it larger than the size of the substrate, increasing the degree of freedom in antenna design. Therefore, it is possible to realize an antenna that can be used at a low frequency or an efficient antenna.

An antenna device according to the present invention includes an integrated circuit board, a conductor surrounding the integrated circuit board, a conductive layer on the integrated circuit board, and a slit formed by the conductor surrounding the integrated circuit board. .

According to the above configuration of the present invention, the antenna element is mounted on the integrated circuit board in order to use the slit formed between the conductor surrounding the integrated circuit chip and the conductor formed on the integrated circuit board. The integrated circuit board can be effectively used for other circuits. In addition, since the antenna element has the maximum integrated circuit chip size, it is possible to use the antenna at a low frequency and to form an efficient antenna in a wide band.

The antenna device according to the present invention includes a semiconductor integrated circuit on the semiconductor substrate for receiving and feeding power to the antenna using the slit as an antenna.

According to the above configuration of the present invention, an antenna, a circuit using the antenna, and a power supply / reception circuit can be integrally formed on a semiconductor substrate, and can be highly integrated as a SoC (System on Chip), which has high utility value.

As described above, according to the above configuration of the present invention, a circuit for receiving and feeding power to the antenna and a circuit for using a signal transmitted and received through the antenna can be incorporated on the integrated circuit board. Wiring between them becomes easy. At that time, the characteristics of the conductive element mounted on the integrated circuit substrate are not deteriorated even in the immediate vicinity of the antenna element, and the incorporated antenna can realize high efficiency without increasing the cost of the integrated circuit.
This makes it easy to ensure communication quality and design link margins.

  Embodiments of the present invention will be described below with reference to the drawings.

1A is a perspective view showing an embodiment according to the present invention, FIG. 1B is a partially enlarged view enlarging a circle E shown in FIG. 1A, and FIG. The straight line H- shown in FIG.
A cross-sectional view taken along a plane including H ′, FIG. 4D is an enlarged view of the vicinity of the power supply / reception unit in the circle F.

In the antenna device 1 according to the present invention, a portion where the conductive layer 102 is not provided is provided in the conductive layer 102 as a conductor on the integrated circuit substrate 101 forming the integrated circuit, and the portion where the conductive layer 102 is not provided. Is referred to as slit 103. A power receiving / feeding point A as a power receiving / feeding portion is formed by two points on the conductive layer 102 facing each other across the slit 103 at an arbitrary portion of the slit 103.
A 'is configured. As the conductive layer 102, a metal layer for wiring an integrated circuit can be used. In a normal integrated circuit process, there are a plurality of metal layers for wiring, and one of them is applied to the conductive layer 102. An integrated circuit can be formed by using another metal layer for wiring of the integrated circuit.

FIG. 1C is a cross-sectional view taken along a plane perpendicular to the integrated circuit substrate 101 including the straight line indicated by BB ′ in FIG. Hereinafter, the antenna device 1 according to the present invention will be referred to as SOI (Si
A case of forming on a semiconductor integrated circuit using a licon on insulator) will be described in detail by way of example. Elements using the same numbers as those in FIGS. 4A and 4B represent the same items, and redundant descriptions are omitted.

In the SOI, a silicon single crystal layer (a silicon single crystal layer to be doped) is formed on an insulating film 104 such as silicon dioxide (SiO ₂ ) on an integrated circuit substrate 101 such as silicon.
SOI layer) 105 or a silicon single crystal layer as an undoped silicon single crystal layer (
An SOI layer 108 is provided. As the integrated circuit substrate 101, a conductive semiconductor substrate is often used, but it is desirable to use a high-resistance substrate or an insulator. In the SOI, the integrated circuit substrate 101 is integrated regardless of the conductivity of the integrated circuit substrate 101 because the integrated circuit elements are not formed in the integrated circuit substrate 101 but in the silicon single crystal layer (SOI layer) 105. It is possible to create circuit elements. The silicon single crystal layer (SOI layer) 105 is selectively doped with trivalent or pentavalent impurities for each area, and a P-type or N-type semiconductor layer (body)
And an integrated circuit element such as a transistor is formed therein. Silicon single crystal layer (S
The (OI layer) 108 is directly below the slit 103 as an antenna element, and this portion is kept low in conductivity without being doped with impurities. It is desirable to dispose the silicon single crystal layer (SOI layer) 108 so that the width thereof is larger than the width of the slit 103. Silicon single crystal layer (SO
An insulating film 106 is disposed so as to be stacked on the (I layer) 105 or the silicon single crystal layer (SOI layer) 108. The conductive layer 102 provided by being laminated on the insulating film 106 is a metal wiring layer for connecting the integrated circuit elements. Usually, a plurality of layers are formed, but only one layer is shown in the figure. A slit 103 is formed in the conductive layer 102, and this slit 103 serves as an antenna element. When the slit 103 is used as an antenna, it is desirable that the conductive layer 102 has an infinite extent. However, since this is impossible when forming an integrated circuit, the conductive layer 102 is arranged to be as wide as possible. The protective film 107 improves the moisture resistance of the antenna device 1 and the integrated circuit board 101 as a whole and protects against disturbance.

FIG. 1 (d) describes in detail the vicinity of the power supply / reception points A and A ′. The power supply / reception points A and A ′ are arranged at two points on the conductive layer 102 facing each other across the slit 103 at an arbitrary position of the slit 103.
Connected to 0. The port 110 is an input port of the receiving circuit when the antenna device 1 is used as a receiving antenna, and represents an output port of the transmitting circuit when used as a transmitting antenna.

Compared with the conventional antenna element shown in FIG. 10, the slit 103 as the antenna element configured as described above has a complementary relationship between the conductive part and the non-conductive part. That is, in the conventional example, the antenna element is conductive. Although it is comprised with a certain metal etc. and the circumference | surroundings are space | gap, in this invention, an antenna element is the space | gap which was the same shape as the conductor which comprises the conventional antenna element, and the circumference | surroundings are comprised with a conductor. In the conventional example, the antenna element is composed of a conductive portion, and it is desirable to exclude conductive elements as much as possible in portions other than the antenna element, whereas in the present invention, the antenna element is composed of a gap (slit 103). The other parts are covered with highly conductive materials.

As is well known, from the symmetry of the electric field and magnetic field in Maxwell's equations, when the conductive part and the non-conductive part are in a complementary relationship, an antenna having a characteristic in which the electric field and the magnetic field are interchanged can be obtained. An antenna having a complementary relationship with an antenna constituted by a linear conductor is configured by cutting a slit on a conductor plate. The antenna characteristics of a linear conductor can be determined by the current flowing through the linear conductor, but it is assumed that a magnetic current flows along the slit of an antenna with a complementary slit. Thus, it is known that the characteristics can be easily obtained by switching the electric and magnetic fields.

In the present embodiment, the case where the slit 103 is disposed so as to be complementary to the conventional example shown in FIG. In this case, since the conventional example is composed of a conductive antenna element, if there is a conductive object in the vicinity of the element, its characteristics are greatly disturbed. 103 is non-conductive. The vicinity is a conductive plate (
Even if a conductive object is present in the vicinity of the slit 103, the antenna characteristics and radiation efficiency are not greatly affected. Therefore, when the slit 103 as the antenna element having such a structure is formed on the integrated circuit substrate 101, the integrated circuit element can be disposed as close as possible to the slit 103 as the antenna element. The upper area can be used effectively, and the cost of the integrated circuit can be reduced.

Further, in the antenna device 1 that receives and feeds power at the feed and feed points A and A ′ facing each other across the slit 103 as in the present embodiment, the antenna, electric field, and magnetic field are replaced by a linear element, so that The normalized radiation impedance (impedance normalized by the vacuum characteristic impedance) has an inverse relationship to each other. On the other hand, the radiation impedance value of the small antenna by the linear conductor element tends to be small, whereas the radiation impedance value of the antenna device 1 by the slit 103 as in this embodiment increases. This is a preferable characteristic from the circuit side, and it is easy to design impedance matching with the circuit.

FIG. 2 shows a simulation result of the antenna characteristics of this example by the finite integration method. The specifications of the simulation are as follows. The antenna element dimensions and the materials used are aligned so as to be complementary to the conventional example shown above.
Material of the conductive layer 102: aluminum, thickness 1 μm
Antenna element (slit 103): Bending magnetic current dipole with slit 103 having a total length of 8.4 mm and a width of 10 μm Insulating film 106; SiO ₂ thickness 7 μm, dielectric constant = 3.8
Integrated circuit board 101; material = Si, dielectric constant = 11, size = 3.3 5 mm × 3.3 5 m
m, conductivity = 0 (SOI)

Note that the thickness of the insulating film 104 having an SOI structure and the thickness of the silicon single crystal layer (SOI layer) 105 or the silicon single crystal layer (SOI layer) 108 were each set to 1 μm in order to reduce calculation time. Actually, it is even thinner, so it seems that the effect of improving the efficiency will be significant. Further, in order to obtain a complementary shape as much as possible, the distance X from the center line of the slit 103 shown in FIG. 1A to the end of the conductive layer 102 is set to 450 μm.

2 (a) shows the reflectance S _11. A characteristic 201 is a reflectance at a power receiving / feeding point of the antenna when power is fed with a characteristic impedance of 50Ω, and a characteristic 202 is a characteristic impedance of 1000.
Reflectance when Ω is used. 2B and 2C show the radiation impedance of the antenna calculated from FIG. 1A, and FIG. 2C is an enlarged view of the vicinity of the frequency of 13 GHz in FIG. In the figure, r, x, and z are the real part r and the imaginary part x of the radiation impedance, respectively.
, The absolute value z.

As can be seen from these drawings, the antenna apparatus 1 of the present embodiment using the antenna having the conventional linear antenna element shown in FIG. 10 and the slit 103 complementary to the antenna is approximately the same at around 7.5 GHz. A resonance point, and the radiation impedance at the resonance point is about 1000;
High value with Ω. This coincides with the fact that the radiation impedances normalized by the vacuum characteristic impedance described above have a reciprocal relationship. In this embodiment, a resonance point also appears in the vicinity of 13 GHz, which is about twice the frequency, and can be used as an antenna even at this frequency.

In this embodiment, it is not exactly complementary to the antenna shown in FIG. In order to achieve a complementary relationship, the conductive layer 102 as an infinite conductor is necessary. Infinite conductive layer 10
Since 2 is practically impossible, the slit 103 is disposed in the finite conductive layer 102.
When the antenna device 1 is mounted on an integrated circuit as in this embodiment, the size is extremely small, and thus the shape as in this embodiment must be taken. FIG. 2D shows the antenna reflectivity characteristics depending on the distance from the slit 103 to the end of the conductive layer 102, that is, the distance from the center line of the slit 103 indicated by X in FIG. 1A to the end of the conductive layer 102. The result of simulating how it changes is shown. The size and shape of the slit are constant and the value of X is changed. The values of X are 200 μm for the characteristic 203, 900 μm for the characteristic 204, and 205 for the characteristic 205.
Is 1600 μm and the characteristic 206 is 2300 μm. As can be seen from the figure, the antenna characteristics vary greatly depending on this value. It can also be seen that a complementary antenna cannot be formed with the conductive layer 102 of the size of an integrated circuit. However, as described above, in the antenna device 1 constituted by the slit 103 as in the present embodiment, the characteristics are hardly affected even in the immediate vicinity of the slit 103 as an antenna element. The efficiency of the antenna device 1 can be kept high.

FIG. 9 shows a comparison result in which the radiation efficiency of the antenna device 1 of the conventional example and the embodiment of the present invention is simulated by the finite integration method. A characteristic 904 indicates the radiation efficiency of this embodiment. If there is a mismatch between the input / output impedance and the radiation impedance of the antenna's power supply / reception circuit, there will be a return loss, but in this figure, this part is removed and the energy received / powered to the antenna is radiated in the air or It shows the ratio of energy sent from the air, that is, radiation efficiency.

As can be seen from the figure, a very good characteristic equivalent to or better than the characteristic 903 of the conventional example can be obtained. In FIG. 2A, the second resonance point is in the vicinity of 13 GHz. In this frequency band, radiation efficiency of several tens of percent or more is obtained, and the characteristics are very good. Moreover, the slit 103
Since a semiconductor element or a conductive material can be placed as close as possible, it does not increase the cost of the integrated circuit.

However, the antenna device 1 having such a slit 103 assumes a conductive layer 102 as an infinitely wide conductor, and as described in FIG. 2D, the value of X shown in FIG. Greatly changes the characteristics. In this embodiment, X = 450 μm. The three simulation results of the conventional example shown above are the results obtained by setting the distance from the antenna element to the edge of the semiconductor substrate, that is, the dimension corresponding to X of this example to 100 μm.

If the antenna device 1 as in the present embodiment is made on a semiconductor substrate having the same dimensions, the same degree of X is required and the length of the antenna element is shortened. Therefore, the resonance point shifts to the higher side. In order to have a resonance point at the same frequency, the entire length of the slit may be secured by further bending. It may be bent in a meander line shape, or the U-shaped tip may be further bent inward to form a C shape.

In order to make a fair comparison, the same material is used as much as possible and the element sizes are set to be the same. Therefore, tuning or the like according to the target frequency is not performed.
Therefore, in this embodiment, tuning can be performed according to specific design specifications, and it is considered that better characteristics can be obtained by performing the tuning.

As in the present invention, this is an optimum configuration for integrating antenna elements and other circuit elements in a limited area such as an integrated circuit.

FIG. 3A is a diagram showing the concept of another embodiment of the antenna device 1 according to the present invention.
b) is a cross-sectional view taken along the plane including the alternate long and short dash line GG ′ in FIG. Since the same numbered parts as those in FIG. 1 are the same as those in the first embodiment, their description is omitted.

In the first embodiment, the slit 103 is surrounded by the conductive layer 102 as wide as possible. However, since this structure uses the entire conductive layer 102 used for wiring when forming the integrated circuit, the structure of the integrated circuit is used. The degree of freedom of wiring is reduced, making design difficult. In order to avoid this difficulty, in this embodiment, as shown in FIG. 3A, the conductive layer 102 surrounds at least the periphery of the slit 103, and the conductive layer of the same layer is used as another wiring in any other region. Can be used.
The conductive layer 102 surrounding the slit 103 must be wide, but in this embodiment, it is narrow as shown in the figure. In order to remove this influence, the conductive layer 102 is connected to a conductive layer distributed over a wide range on the integrated circuit substrate 101 with a low impedance at least at a frequency used by the antenna device 1.

For example, as shown in FIG. 3B, contact is made with a conductive silicon single crystal layer (SOI layer) 105 over a wide range on the integrated circuit substrate 101 using a via 301. The silicon single crystal layer (SOI layer) 105 is distributed over a wide range on the integrated circuit substrate 101 and is fixed to the power supply potential. The power supply potential is fixed to the power supply line with a low impedance even at a high frequency. As a result, the power supply line functions to expand the area of the conductive layer 102. As the power supply line, a wiring layer that is the same layer as the conductive layer 102 may be used, or another wiring layer (not shown) may be used. Further, the power source may be either a positive power line or a ground power line, or may be connected to both. Needless to say, when connecting to both power lines, it is necessary to take measures to prevent DC shorting. This method can be easily realized by using a conventional method such as capacitive coupling.

By adopting the method as described above, the wiring layer can be effectively utilized without degrading the performance of the antenna device 1.

FIG. 4 shows a third embodiment. FIG. 4A is a perspective view of the present embodiment, and FIG. 4B is a diagram showing an antenna that is complementary to the antenna device 1 of the present embodiment. Since the same numbered parts as those in FIG. 1 are the same as those in the first embodiment, their description is omitted.

In this embodiment, the slit 103 is cut into an H shape as shown in the figure. When the slit 103 is provided in this manner, the antenna device 1 having a high efficiency can be configured by surrounding both sides of the central portion of the slit through which a large amount of magnetic current flows with the wide conductive layer 102.

As shown in FIG. 4B, the antenna complementary to the antenna device 1 of this embodiment is a T-shaped element 4.
This is a dipole in which two 01s are placed across a power supply / reception point 402.

If the slit 103 is arranged in the center in this way, it may be considered that the integrated circuit is divided into two and it is difficult to design the integrated circuit. However, when actually simulating, it can be seen that the antenna performance is not drastically reduced even if there are wirings straddling the slit 103 or some integrated circuit elements directly under the slit. The object of the present invention is 0.01-0.1%
It was about how to improve the radiation efficiency of the antenna, which is extremely bad. For this purpose, it is easy to increase the efficiency to several percent, and a sufficient effect can be obtained.

A radiation efficiency of the present embodiment is shown in a characteristic 905 in FIG. It can be seen that the radiation efficiency is further improved as compared with the first embodiment because the vicinity of the power receiving and feeding point where a large amount of magnetic current flows is placed in the center. The distance from the antenna element to the edge of the integrated circuit board 101 (corresponding to X in the first embodiment) is the same as in the first embodiment.
0 μm. Further, the size of the antenna element is set to the same occupied area as the conventional example and the first embodiment, that is, the length of one side of the minimum square including the antenna element is set to 2.8 mm,
Other specifications were in accordance with the simulation specifications of Example 1 above. Therefore, in this antenna device 1, the equivalent length of the dipole element is shorter than that in the first embodiment, but good characteristics are obtained even at a low frequency. Even in the simulation results, although the resonance frequency slightly increased as compared with the conventional example and Example 1 based on the present invention, it hardly changed.

FIG. 5 shows a fourth embodiment. FIG. 4A is a perspective view of the present embodiment, and FIG. 4B is a diagram showing an antenna that is complementary to the antenna device 1 of the present embodiment. Portions with the same numbers as those in FIG. 1 or FIG.

In the antenna device 1 of this embodiment, a slit 103 on a loop is formed in a conductive layer 102 on an integrated circuit substrate 101, and this is used as an antenna element. Assuming that the power supply / reception unit is the power supply / reception points A and A ′, the antenna complementary to this is a loop antenna as shown in FIG. In this way, when the slit 103 is cut in a loop shape, the conductive layer 102 is separated by the slit, so that the impedance on the antenna element side viewed from the power supply / reception points A and A ′ becomes infinite at DC. This is similar to the antenna device 1 of the first to third embodiments.
It has the following advantages over the case where 'is short-circuited in a DC manner. That is, in the above example, the bias of the connected power supply / reception circuit may be short-circuited, and thus a capacitor for cutting direct current may be required. However, in this embodiment, this is not necessary and the design of the power supply / reception circuit is easy. become.

A characteristic 906 in FIG. 9 shows the radiation characteristic of this embodiment. Integrated circuit board 101 from antenna element
The distance to the edge (corresponding to X above) is 450 μm, the same as above. The size of the antenna element was set so as to have the same occupied area as in Example 1 and Example 3, that is, the length of one side of the smallest square containing the antenna element was 2.8 mm. A dipole antenna resonates at a half wavelength of the entire antenna element, whereas a loop antenna generally resonates at a frequency at which the entire loop length becomes one wavelength. For this reason, in this embodiment, the resonance point rises to around 12 GHz. There is a significant improvement in radiation efficiency at frequencies around that.

FIG. 6 shows a fifth embodiment. FIG. 4A is a perspective view of the present embodiment, and FIG. 4B is a diagram showing an antenna that is complementary to the antenna device 1 of the present embodiment. 6 (c) and 6 (d)
Shows a cross-sectional view. Since the same numbered parts are the same as in the description of the first embodiment, they are omitted.

As described above, it has been explained that the conductive layer 102 as a conductor in which the slit 103 is disposed needs to be as large as possible, and that it is difficult to realize it on the integrated circuit substrate 101. In this embodiment, in order to solve this problem, a second conductive plate 601 serving as a conductor surrounding the outside of the integrated circuit chip 602 is disposed. That is, as shown in FIG.
A second conductive plate 601 serving as a surrounding conductor is placed so as to surround the integrated circuit chip 602 integrated with the slit 103 as an antenna element, and the second conductive plate 601 is formed between the integrated circuit chip 602 and the second conductive plate 601. The slit 603 is also used as a parasitic element of the antenna device 1. That is, as shown in FIG. 6B, the antenna device 1 is in a complementary relationship with an antenna including at least a folded dipole 604 that receives and supplies power by the power supply / reception port 605 and a quadrangular loop-shaped parasitic element 606. Is done.

Since the second conductive plate 601 is formed outside the integrated circuit substrate 101, the second conductive plate 601 can have a sufficient size, and the antenna device 1 can be easily designed. In addition, the electrical size of the antenna device 1 can be increased, so that the antenna characteristics can be widened and the antenna device 1 can be used at a low frequency.

FIG. 6C is a cross-sectional view illustrating a method of forming the second slit 603 by mounting the integrated circuit chip 602 and the second conductive plate 601 on the printed circuit board 607. Integrated circuit board 10
A second slit 603 is formed between the antenna element formed by the slit 103 on the first layer and the printed pattern 610 on the conductive layer 102 and the second conductive plate 601.
3 is a parasitic element.

This figure also illustrates a method of extracting input / output signals to a circuit integrated together. These signals are taken out by the bonding wire 612 and connected to the printed pattern 608 on the second conductive plate 601 through the via 611. In this embodiment, the second conductive plate 601 is used.
In order to secure a large area, the pad to which the bonding wire 612 is bonded is made as small as possible, and is immediately connected to another printed pattern 608 provided on the back surface of the second conductive plate 601 through the via 611. The insulating layer 609 is a two-layer printed pattern 610.
, 608 is an insulating layer 609 for separating.

The pad to which the bonding wire 612 on the integrated circuit board 101 side is bonded can be formed by the conductive layer 102 on the integrated circuit board 101 that forms an antenna element by the slit 103. The figure exemplifies the case where pads for wire bonding are formed using the same conductive layer 102 (the conductive layer 102 is swung in two places).
.

As described above, when there is an unnecessary pattern such as a bonding pad on the conductive layer 102 or the second conductive plate 601, or when a conductive object, that is, a bonding wire 612 exists across the second slit 603, the antenna Although the characteristics are affected, these influences are not so great that they can be ignored from the initial purpose of increasing the radiation efficiency of the antenna device 1.

FIG. 6D illustrates another mounting method different from the above. In this embodiment, signal input / output to the integrated circuit is taken out by bumps 616 instead of wire bonding and connected to the print pattern 608. The second slit 603 includes the printed pattern 610 disposed on the second conductive plate 601 and the conductive layer 10 on the integrated circuit substrate 101, as in FIG.
2 is constituted. Also in this case, the conductive print pattern 608 exists across the second slit 603, but it is desirable to use a thin line as much as possible in order to reduce the influence on the antenna characteristics. The influence on the antenna characteristics can be easily suppressed to a level that can be ignored from the initial purpose of increasing the radiation efficiency of the antenna device 1.

A radiation characteristic of the fifth embodiment according to the present invention is shown as a characteristic 907 in FIG. In this way, a significant improvement in the radiation efficiency of about two orders of magnitude can be seen over the entire frequency range only by disposing the second conductive plate 601 as the surrounding conductor in the first embodiment.

The case where the second slit 603 formed by the second conductive plate 601 and the conductive layer 102 on the integrated circuit substrate 101 is a parasitic antenna element has been described. Power may be supplied. In that case, a loop antenna having the same shape as that of the fourth embodiment is formed by the second slit 603, and a larger and wider outer conductor can be used. The antenna device 1 can be configured. The power supply to the second slit 603 can be easily realized by connecting a signal to the second conductive plate 601 by a bonding wire 612 or a bump 616 as shown in FIG. 6C or 6D.

FIG. 7 shows two more embodiments of the antenna device 1 according to the present invention. These antenna devices 1 can adjust the radiation impedance of the antenna and facilitate impedance matching of the circuit.

The antenna device 1 shown in FIG. 7A forms an antenna complementary to an antenna obtained by folding a folded dipole antenna as shown in FIG. As is well known, a folded dipole antenna is a dipole antenna that feeds power from the center of a parallel transmission line with both ends short-circuited. In FIG. 7B, the power supply / reception unit is the power supply / reception points B and B ′. The folded dipole antenna is bent as shown in the figure so as to be housed on the integrated circuit board 101, and formed on the integrated circuit board 101 so as to have a complementary relationship. That is, two slits 701 are arranged in parallel in a U-shape, and the tip is further slit 70.
1 to form an antenna element by a slit 701 having a shape as shown in FIG.
The power supply / reception unit is defined as power supply / reception points A and A ′. In this case, the radiation impedance of the antenna device 1 can be changed by the width of the inner and outer slits 701, that is, the ratio between the width w1 and the width w2 shown in the drawing. The width w1 is the inner slit width, and in this case, is equal to the slit width at the feeding point. Since these widths w1 and w2 can be easily changed, the radiation impedance can be freely set, and the matching design with the circuit is facilitated.

In addition, the conductive layer is separated into an inner conductive layer 703 and an outer conductive layer 702 and is insulated in terms of direct current, so that it is easy to set a bias to the circuit.

FIG. 7C shows an antenna device 1 according to the present invention capable of adjusting the radiation impedance of the antenna.
It is a figure explaining other examples, The figure (d) shows the antenna which has a complementary relationship with the antenna. The antenna device 1 according to this embodiment includes an integrated circuit chip 720 and a second conductive plate 707 as a conductor surrounding the integrated circuit chip 720. Integrated circuit chip 7
20 denotes a slit 70 formed by conductive layers 706 and 708 on the integrated circuit substrate 101.
5 is provided. A loop-like slit 711 is formed by the same method as in the fifth embodiment, that is, the conductive layers 706 and 708 on the integrated circuit substrate 101 of the integrated circuit chip 720 and the second conductive plate 707 as a conductor surrounding the integrated circuit chip 720. Has been. The power supply / reception unit is the power supply / reception points C and C ′.

The antenna having a complementary relationship with the antenna device 1 is composed of a loop-shaped conductor 709 and a stub 710 as shown in FIG. It is possible to change the radiation impedance of the antenna by changing the position of the connection point of the stub 710, that is, the dimension indicated by the length d in the drawing.

Similarly, in the antenna device 1 of the present embodiment, which is complementary to the antenna of FIG. 6D, the position of the connection point between the slit 705 and the slit 711, that is, the dimension indicated by the length d in the figure is changed to change the radiation of the antenna. Impedance can be changed. Since this dimension can be easily changed, the radiation impedance can be set freely to some extent, and matching design with a circuit becomes easy. Similarly to FIG. 5A, the conductive layer is composed of two conductive layers 7.
06 and the conductive layer 708 are separated from each other in terms of direct current. For this reason, the degree of freedom for bias setting and the like is increased, and the design of the power supply / reception circuit becomes easy.

In the first to sixth embodiments described above, the case where an SOI integrated circuit using a high-resistance substrate is used has been described as an example. In the present embodiment, an example is shown in which the antenna device 1 according to the present invention is implemented by a normal CMOS process having no SOI structure.

FIG. 8 shows a cross-sectional view thereof. As described in the first to sixth embodiments, the slit 806 is formed by the conductive layer 801 for wiring on the integrated circuit substrate 802 to form an antenna element.
A high resistance substrate such as silicon is used as the integrated circuit substrate 802, and a P well 803 and an N well 804 are selectively formed on the integrated circuit substrate 802 by implanting impurities, etc.
Among them, an element such as a transistor constituting an integrated circuit is formed. A P well 803 and an N well 804 are formed depending on the type of impurities to be implanted.
Make a channel transistor. When a high-resistance substrate is used, an integrated circuit having a CMOS structure can be formed by adopting a double well structure in which N, P, and two types of wells are formed.

Unless a well is formed immediately below the slit 806 as an antenna element, there is no conductive object in the vicinity of the antenna element, and the efficient antenna device 1 can be configured. The insulating layer 805 is an insulating layer 805 that separates the power lines 811 and 812 for wiring with the P well 803, the N well 804, integrated circuit elements formed therein, and the like.

The conductive layer 801 constituting the slit 806 is desirably as wide as possible. When a plurality of conductive layers for wiring are formed, it is one method to cover the entire area of the integrated circuit board 802 using one of them, but when such a method cannot be taken, A portion that is equipotentially equivalent over a wide range is used. For example, a power supply line or the like, and the positive power supply line 811 is connected to the N well 804 through a high-concentration N-type semiconductor 809 and a via 810. Further, the negative power line 812 is connected to the P well 803 with a high concentration P type semiconductor 80.
8 and via 807. Although only one well, via, and high-concentration N-type semiconductor or P-type semiconductor are shown in the figure, the integrated circuit substrate 80 is actually shown.
2 is distributed over a wide range, and the impedance is designed to be as low as possible to keep the equipotential. Further, since the two power lines 811 and 812 on the plus side and the minus side are also designed to have the same potential in terms of high frequency, a conductive layer 801 that forms a slit 806 is connected to one of the power lines 811 and 812. By doing so, a wide range of equipotential surfaces can be secured. In this embodiment, the case where the conductive layer 801 is connected to the negative power supply line 812 is illustrated.

According to the above configuration of the present invention, a highly efficient antenna device 1 can be realized on the CMOS type integrated circuit substrates 101 and 802 without using SOI by using a low concentration substrate.

Although the present invention has been described by taking an integrated circuit process using SOI or CMOS as an example, the present invention is not limited to this. For example, the same implementation is possible using a BiCMOS or bipolar integrated circuit process. According to the above configuration of the present invention, the antenna device 1 can be incorporated together with a transmission / reception circuit for wireless communication on an integrated circuit board at a low cost, and this is a great effect for saving space, reducing component parts costs, and improving reliability. There is.

The figure explaining the structure of Example 1 of this invention. The figure explaining the characteristic of Example 1 of this invention. The figure explaining the structure of Example 2 of this invention. The figure explaining the structure of Example 3 of this invention. The figure explaining the structure of Example 4 of this invention. The figure explaining the structure of Example 5 of this invention. The figure explaining the structure of Example 6 of this invention. The figure explaining the structure of Example 7 of this invention. The figure which compares the Example of this invention and the characteristic of the antenna device by a prior art. The figure explaining the structure of the antenna device comprised on the conventional integrated circuit. The figure explaining the structure of the antenna device comprised on the other conventional integrated circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Antenna apparatus, 101,802 ... Integrated circuit board, 102,706,708,801
... conductive layer as conductor, 103, 701, 806 ... slit as antenna element, 60
2... Integrated circuit chip 603... Second slit as antenna element 601 707.
Second conductive plate as a conductor surrounding the integrated circuit substrate, 803... P well, 804... N well, 105... Silicon single crystal layer (SOI layer) as a silicon single crystal layer to be doped, 1
08: A silicon single crystal layer (SOI layer) as a silicon single crystal layer that is not doped.

Claims (8)

An antenna device comprising a non-conductive slit formed in a conductive layer on an integrated circuit substrate, wherein power is supplied to and received from opposite ends of the slit. The antenna device according to claim 1, wherein an impurity is not doped immediately below the slit of the integrated circuit substrate. The antenna device according to claim 1, wherein the slit is linear or polygonal. The antenna device according to claim 1, wherein the slit is formed along a linear or broken line-shaped closed curve surrounding the conductor. The antenna device according to claim 4, wherein the slit width of the slit is different from the slit width at the power supply / reception point in at least one place. An integrated circuit board, a conductor surrounding the integrated circuit board, a non-conductive slit formed in a conductive layer on the integrated circuit board, and a conductor surrounding the integrated circuit board and the conductive layer on the integrated circuit board. An antenna device comprising a formed slit. An antenna device comprising: an integrated circuit board; a conductor surrounding the integrated circuit board; a conductive layer on the integrated circuit board; and a slit formed by a conductor surrounding the integrated circuit board. The antenna device according to claim 1, further comprising a semiconductor integrated circuit on the semiconductor substrate for receiving and supplying power to the antenna with the slit as an antenna.

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