JPH0870475A - Method and device for encoding and decoding stereoscopic animation - Google Patents

Abstract

PURPOSE: To improve the compression efficiency of a stereoscopic animation signal by synthesizing a right-eye animation signal with a left-eye animation signal at every horizontal scanning line by means of a frame unit. CONSTITUTION: A left-eye animation 1 and a right-eye animation 2 have plural frames formed by plural line pictures obtained by non-interlace scanning system. A compositing unit M respectively inputs the left animation 1 and the right animation 2 and merges one frame of the left animation 1 with one frame of the right one 2. By this merge processing, a frame picture 3 is generated by alternately merging the line L1 of the left animation 1 and the line L2 of the right one 2. An encoder 4 inputs the frame picture 3 merged by the compositing unit M and encodes it. That is, the line L1 of the left animation 1 and the line L2 of the right one 2 are alternately merged and one frame picture 3 is generated so that the stereoscopic animation is efficiently encoded by utilizing the encoder 4 corresponding to publicly known MPEG(Moving Picture Image Coding Experto Group) standard.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and apparatus for encoding / decoding a stereoscopic moving image signal composed of moving images for the right eye and the left eye.

[0002]

2. Description of the Related Art For example, there are the following three methods for encoding a stereoscopic moving image composed of digital moving images for the right eye and the left eye. In the first method, for example, in Japanese Patent Laid-Open No. 6-153239, the main image (right-eye image) is encoded as it is, and the sub-image (left-eye image) is compensated for parallax while referring to the main image. Encode the compressed data. In the second method, the main image is encoded as it is, the sub-image is referred to the main image or another sub-image to perform parallax compensation and motion compensation, and the data obtained as a result of these compensations is encoded. The third method is MPEG (Moving P
icture Image Coding Experts Group) method, each of the main image and the sub-image is independently encoded. When decoding the encoded data of the stereoscopic moving image signal obtained by the above-described first to third methods, a process reverse to the encoding is performed to obtain a reproduced image.

In the third method, MPEG is ISO
(International Organization for Standardization)
Name of the image compression standardization committee established under the umbrella, "Movi
ng Picture Experts Group ”. MPEG currently has two standards, MPEG-1 and MPEG-2, mainly due to the difference in encoding rate. MP
EG-1 is specified as a standard in ISO / IEC 11172, and MPEG-2 is ISO / IEC 1
3818 as a draft standard. USP
5231484, USP 5293229 and USP 53
25125 discloses a technique related to this MPEG. An encoder that performs encoding in accordance with the MPEG standard handles image data in a format called bitstream syntax. The syntax is a block, a macroblock including a plurality of blocks, a slice including a plurality of macroblocks, a picture including a plurality of slices, and a GOP (Group of Picture) including a plurality of pictures.
And has a hierarchical structure composed of a sequence including a plurality of GOPs. A macro block is data that is a unit of predictive coding, and includes 16 × 16 pixels.

The MPEG encoder is a predictive coding with motion compensation, a discrete cosine transform (DCT; Discrete C).
osine transformation), adaptive quantization, and Huffman coding to generate I picture, P picture, and B picture. In motion-compensated prediction for generating a B picture, the MPEG-1 encoder first illuminates a current screen and a reference screen temporally preceding and / or temporally preceding the current screen. To match. Next, the encoder searches the reference screen for a reference macroblock in the region of the reference screen that most resembles the current macroblock in the region of the current screen for data compression. Then, the encoder obtains a difference value between the found reference macroblock and the current macroblock. At this time, the encoder detects a vector (called a motion vector) indicating the position of the reference macroblock from the position of the current macroblock. For example, JP-A-4-145777, JP-A-4-79484, JP-A-3-40687, JP-A-4-207790, and JP-A-4-234.
Japanese Patent Laid-Open No. 276 and Japanese Patent Laid-Open No. 40193/1992 disclose a technique of detecting a motion vector. MPEG standard I
SO / IEC 11172 describes a motion vector detection method such as a full search method, a logarithmic search method, and a telescopic search method.

The encoder performs DCT, quantization, and variable length coding on the difference data between the current macroblock and the reference macroblock obtained by the motion-compensated prediction, and compresses the data. 16x16 for MPEG-1 encoder
DCT is performed in 8 × 8 pixel units (blocks) obtained by dividing a pixel (macroblock) into four. The encoder expands the compressed difference data, adds the image data of the reference macroblock (this macroblock is designated in the reference screen by the motion vector) to the expanded difference data, and adds the current macro. The image data of the block can be reproduced. The encoder performs variable length decoding, inverse quantization, and inverse DCT when decompressing the difference data. The encoder stores, in its memory, image data of at least one screen temporally preceding the current screen and at least one screen temporally subsequent thereto.

[0006]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
When the main image and the sub-image are separately processed in the above method, there is a problem in that timing control at the time of encoding both images and management of the code amount of both images become complicated. Further, in both methods, it is difficult to manage and control the code amount of both images in order to equalize the image quality of the right-eye image and the left-eye image.

In the above-mentioned third method, independently encoding each of the right-eye moving images and the left-eye moving images, even though they have an average correlation with each other, is effective in reducing the compression efficiency of the encoding process. Hinder improvement. The stereoscopic image has a stereoscopic effect as the difference between the right-eye moving image and the left-eye moving image increases. However, it is rare that the two images are completely different over the entire screen, and such different screens do not last for a long time.
Therefore, both images are similar, and encoding these similar images separately reduces compression efficiency.

The present invention has been made to solve the above problems, and an object of the present invention is to provide an encoding method and apparatus capable of increasing the compression efficiency of a stereoscopic moving image signal.

A second object is to provide a method and apparatus for decoding a stereoscopic moving image signal, which can efficiently decode (decompress) a stereoscopic moving image signal encoded (compressed) by the method and apparatus. Especially.

[0010]

In order to solve the above-mentioned problems, the invention according to claims 1 to 6 uses a synthesizer to generate a moving image signal for the right eye in frame units and a moving image signal for the left eye in frame units. Is merged for each horizontal scanning line, and the merged moving image signal is encoded with a frame structure by an MPEG2 system encoder. In this case, the frame-based moving image signal may be a non-interlaced scanning moving image signal or a non-interlaced moving image signal obtained by combining two fields of interlaced scanning field images. Further, the non-interlaced moving image signal may be subjected to vertical filtering using a vertical filter. This filtering process may be performed when the vertical difference component of the non-interlaced video signal is large. Further, the combiner merges the moving image signal for the right eye in the field unit and the moving image signal for the left eye in the field unit for each horizontal scanning line, and the merged moving image signal is framed by the MPEG2 encoder. It may be encoded with a structure (claims 6 to 8 correspond to the first method).

According to a seventh aspect of the present invention, a moving image signal for the left eye and a moving image signal for the right eye are alternately merged for each screen, and the merged moving image signal is field-structured by an MPEG2 encoder. Encode with. According to the invention of claim 8, the moving image signal for the right eye in field units and the moving image signal for the left eye in field units are combined for each field to form a combined moving image signal. The signal is encoded by a field structure MPEG2 encoder (claims 7 and 8 correspond to the second method).

The present invention according to claims 9 and 10 is a method for encoding a stereoscopic moving image signal using a left moving image and a right moving image, wherein each of the left and right moving images is a picture, and a left moving image is displayed. The picture in the image comprises a first field formed from an interlaced scanned odd line image and a second field formed from an interlaced scanned even line image, and the picture in the right moving image is A third field formed from the interlaced-scanned odd line image and a fourth field formed from the interlaced-scanned even line image, and the line image in the first and third fields Synthesizing to generate a first synthesized field in which odd lines of the first and third fields are alternately arranged; Combining line images in a field to generate a second composite field in which even lines of the second and fourth fields are arranged alternately, and using an MPEG-2 compatible encoder Encoding the second combined field. The encoder used in this encoding step may be an encoder adapted to the frame structure of MPEG-2 (claims 9 and 10 correspond to the third method).

According to the eleventh and twelfth aspects of the present invention, in the first to third methods, the information related to the encoding of the stereoscopic moving image is added to the encoded stereoscopic moving image information. This related information is information indicating whether or not the encoded information is stereoscopic image information, information indicating the specification of a predetermined unit when the left and right moving images are combined, and whether or not the original image signal is interlaced scanning. At least one of the represented information is included.

The invention described in claims 13 and 14 is the second aspect.
The encoding device used in the method of 1), which includes a combiner that combines the moving image signal for the right eye and the moving image signal for the left eye for each screen, and the combined image signal of 16 × 16.
An encoder for performing image compression coding in macroblock units of pixels is provided. Further, this encoder includes a first predictive coding means for compressing and coding the combined moving picture signal by motion-compensating inter-field predictive coding in macroblock units of 16 × 16 pixels, and a 16 × 16 pixel macro. A block with an upper block of 16 × 8 pixels on top of it,
Second predictive coding means for compressing and coding individually by motion compensation inter-field predictive coding in units of lower blocks of 16 × 8 pixels in the lower part, coded image data by this first predictive coding means, and this second A selection unit that selectively outputs image data determined to have a small code amount among the image data encoded by the predictive encoding unit is provided.

The invention according to claims 15 and 16 further comprises:
The encoder includes an inserter for adding information related to the encoding of a stereoscopic moving image to the stereoscopic moving image information encoded by the encoding device.

According to a seventeenth aspect of the present invention, a composite moving image encoded by the first encoding method according to the first aspect is decoded by a frame structure MPEG2 system decoder (6), and the decoding is performed. The generated combined image is alternately separated for each horizontal scanning line to separately form a moving image signal for the right eye in frame units and a moving image signal for the left eye in frame units (second decoding method). ).

According to the eighteenth aspect of the present invention, a composite moving image encoded by the second encoding method according to the eighth aspect is decoded by a field structure MPEG2 system decoder, and the decoded combination is obtained. The moving image is alternately separated for each field, and the moving image signal for the right eye in the field unit and the moving image signal for the left eye in the field unit are separately formed (third decoding method).

The invention described in claim 19 is the decoding device used in the first decoding method according to claim 17, wherein the decoding device has a frame structure for decoding the encoded composite moving image. An MPEG2 system decoder and a composite image decoded by the decoder are alternately separated for each horizontal scanning line to generate a moving image signal for the right eye in frame units and a moving image signal for the left eye in frame units. And a separator for forming separately.

The invention described in claim 20 is a decoding device used in the second decoding method according to claim 18, which has a field structure for decoding the encoded composite moving image. An MPEG2 system decoder and a composite moving image decoded by the decoder are alternately separated for each field, and a moving image signal for the right eye in field units and a moving image signal for the left eye in field units are separately provided. And a separator for forming.

[0020]

According to the first encoding method, the moving image signal for the right eye in frame units and the moving image signal for the left eye in frame units are combined for each horizontal scanning line, so that the combined moving image is obtained. An image can be efficiently coded by an MPEG2 system encoder having a frame structure.

According to the second encoding method, the moving image signal for the left eye and the moving image signal for the right eye are combined for each field, and the left and right screens are a combined moving image having a plurality of sets of combined screens. Is formed. Therefore, the composite moving image is
It is possible to perform efficient encoding by the MPEG2 encoder having a field structure.

According to the encoding device used in this second encoding method, either the first or the second predictive encoding means is selectively performed according to the encoding efficiency. In the first predictive coding means, the combined moving image signal is 16 × 16.
It is compressed by motion compensation inter-field predictive coding in units of macroblocks of pixels. That is, the inter-field predictive coding is performed between the macro block of the right image or the left image and the right screen and the left screen forming one combined screen.
Therefore, for example, it is possible to perform motion compensation predictive coding between the same type of images of the right image macroblock and the right screen, or parallax compensation predictive coding between different types of images of the right image macroblock and the left screen. Becomes Also, in the second predictive coding means, the 16 × 16 pixel macroblock is individually motion compensated inter-field prediction in units of an upper 16 × 8 pixel upper block and a lower 16 × 8 pixel lower block. It is compressed by encoding. Encoding in units of such macroblocks enables higher-density compression.

According to the third encoding method, the moving image signal for the right eye in the field unit and the moving image signal for the left eye in the field unit are combined for each horizontal scanning line.
The composite moving image signal can be efficiently coded by an MPEG2 system encoder having a field structure.

According to the first decoding method, the composite moving image signal encoded by the first encoding method is decoded by the MPEG2 system decoder having the frame structure, and the decoded image is one line. The left and right moving images are separately formed by alternately separating them. Therefore, the stereoscopic moving image signal encoded by the first encoding method is efficiently expanded.

According to the second decoding method, the composite moving image coded by the second coding method is decoded by the field structure MPEG2 decoder, and the decoded composite image is one field. The moving image signal for the right eye in frame units and the moving image signal for the left eye in frame units are separately formed for each frame. Therefore, the stereoscopic moving image signal encoded by the second encoding method is efficiently expanded.

[0026]

【Example】

[First Embodiment] A first embodiment of the present invention will be described below with reference to the drawings. As shown in FIG. 1, the left image (left-eye moving image) 1 and the right image (right-eye moving image) 2 are
It has a plurality of frames (pictures) formed by a plurality of line images obtained by a non-interlaced (also called progressive) scanning method. The pictures of the left-eye moving image 1 and the right-eye moving image 2 may be formed by interlaced line images instead of non-interlaced scanning.

The synthesizer M inputs the left image 1 and the right image 2, respectively, and receives one frame of the left image 1 and 1 of the right image 2.
Merge with the frame. This merge process is performed on the left image 1
Line L1 and the line L2 of the right image 2 are alternately merged to form the frame image 3.

The encoder 4 inputs the frame image 3 merged by the synthesizer M and encodes it. The encoder 4 is a well-known MPE which is an international standard method for moving images.
It corresponds to the G-1 or MPEG-2 standard. The encoder 4 can encode two types of images, that is, an image having a frame structure shown in the frame image 3 and an image having a field structure including an odd field image and an even field image.

The encoder handles image data in a format called a syntax. The syntax is a block, a macroblock including a plurality of blocks, a slice including a plurality of macroblocks, a picture including a plurality of slices, and a GOP (Group of Groups) including a plurality of pictures.
Picture) and a sequence including multiple GOPs. The macro block is composed of four luminance signal blocks and two chrominance signal blocks, that is, a total of six blocks.

The encoder 4 has a discrete cosine transform: Disc
Rete Cosine Transform (DCT), inter-frame prediction with motion compensation, quantization, and Huffman coding are mainly performed.
In the DCT, the encoder 4 orthogonally transforms the luminance signal and the color difference signal of the image in block units of 8 × 8 pixels to reduce the redundancy in the spatial direction of the image data, and as a result, the space of the luminance signal and the color difference signal. The low frequency component of the frequency is large and the high frequency component is small. The encoder 4 is a DCT
After the processed signal is quantized, Huffman coding is performed.

In the inter-frame prediction with motion compensation, the encoder 4 removes the redundancy of the image data in the time direction. That is, the encoder 4 obtains a difference between a frame image (picture) at a certain time point and a frame image several frames before or after the frame image, and encodes the difference. At this time, the encoder 4 detects the direction and magnitude (motion vector) of the motion of the frame image in macroblock units as motion compensation, and performs encoding based on the motion vector.

The encoder 4 performs variable length coding according to the Huffman coding method. Then, the encoder 4 outputs the encoded frame image 3 to a recording device having an optical pickup (not shown), and the optical pickup encoded data is used as a magneto-optical disk 5 as a recording medium.
To record.

As described above, by alternately merging the line L1 of the left image 1 and the line 2 of the right image 2 to form one frame image 3, the encoder 4 corresponding to the well-known MPEG standard is used, It is possible to efficiently encode a stereoscopic moving image.

When reproducing the left image 1 and the right image 2, an optical pickup (not shown) reads the coded data recorded on the magneto-optical disk 5, and the decoder 6 inputs the read signal of the coded data. Decode encoded data.
The decoder 6 is compatible with the MPEG-1 or MPEG-2 standard similarly to the encoder 4, and performs a decoding process such as variable length decoding, inverse quantization and inverse DCT on the encoded data to form an image. Reproduce.

The decoder 6 decodes the motion vector included in the encoded data when the motion compensation is performed in the inter-frame encoding process, and the decoding stored in the reference memory (not shown) of the decoder 6 is included in the decoder 6. The motion-compensated image is reproduced using the encoded reference image. In this way, the decoder 6 performs the decoding process of the encoded data according to the MPEG standard, and outputs the same reproduction frame image 7 as the frame image 3 in which the line L1 and the line L2 are alternately merged to the separator S. To do.

The separator S separates the reproduced frame image 7 into a reproduced left image 1A and a reproduced right image 2A. In the separator S, the even line L1 of the reproduction frame image 7 constitutes the left image 1,
Each line L so that the odd line L2 constitutes the right image 2.
Distribute 1, L2 alternately. In this way, the decoding and reproduction of the left image 1 and the right image 2 recorded on the magneto-optical disk 5 are completed. In this way, the decoder 6 compatible with the MPEG standard can efficiently decode the frame image 3 in which the left image 1 and the right image 2 are combined and encoded by the encoder 4.

[Second Embodiment] Next, a second embodiment of the present invention will be described. In this example, left image 1 and right image 2 are interlaced images. As shown in FIG. 2, the left image 1 has an odd field image OF1 and an even field image EF1. The right image 2 has an odd field image OF2 and an even field image EF2.

When encoding the left image 1 and the right image 2,
The synthesizer Ma uses the line OL1 of the odd field image OF1 and
The line OL2 of the odd field image OF2 is alternately merged to form the first field image 8. The combiner Mb alternately merges the line EL1 of the even field image EF1 and the line EL2 of the even field image EF2 to form the second field image 9.

The encoder / decoder 10 includes an encoder section and a decoder section, and the encoder section includes first and second encoder sections.
The field images 8 and 9 are input respectively and encoded. This encoder / decoder 10 uses the first field image 8 as an odd-numbered frame image and the second field image 9 as an even-numbered frame image, and has a frame structure MP.
Encoding is performed according to the EG-2 standard.

The encoder / decoder 10 performs DCT on each frame image at the time of encoding, and adaptively performs interframe motion compensation coding and interfield motion compensation coding between the frame images. To do. The encoder / decoder 10 outputs the encoded data to a recording device having an optical pickup (not shown), and the optical pickup records the encoded data on a magneto-optical disk.

In the second embodiment, the combiner Ma uses the two odd field images OF1 and OF2 of the left and right images respectively.
Are combined to form the first field image 8 and the combiner M
b merges the two even field images EF1 and EF2 to form the second field image 9.

As described above, the three-dimensional moving image signal can be efficiently encoded by using the encoder / decoder 10 corresponding to MPEG-2 for each field image. Left image 1
And when reproducing the right image 2, the encoder / decoder 1
0 receives the encoded data of the magneto-optical disk read by an optical pickup (not shown), and the decoder unit decodes the encoded data to reproduce the first and second field images 11,
12 is generated. The encoder / decoder 10 outputs these image data to the separator S1.

The separator S1 is used for the reproduction first field image 11
Are separated into an odd field image OF1 and an odd field image OF2, respectively. Separator S1 has multiple lines OL1
An odd field image OF1 consisting of multiple lines OL2
The lines OL1 and OL2 are distributed so as to form the odd-numbered field image OF2, respectively. The separator S2 separates the reproduced second field image 12 into an even field image EF1 and an even field image EF2.

The separator S2 distributes the lines EL1 and EL2 to form an even field image EF1 composed of a plurality of lines EL1 and an even field image EF2 composed of a plurality of lines EL2. In this way, a reproduced left image 1A composed of the odd field image OF1 and the even field image EF1 and a reproduced right image 2A composed of the odd field image 0F2 and the even field image EF2 are obtained.

The encoder / decoder 10 is MPEG-2.
Decoding is performed according to the standard to obtain reproduced first and second field images 11 and 12. Separators S1 and S2 separate the images into odd field images OF1 and OF2 and even field images EF1 and EF2, respectively. Thus, the reproduced left image 1A and the reproduced right image 2A can be easily obtained by the encoder / decoder 10 and the separators S1 and S2.

[Third Embodiment] Next, a third embodiment of the present invention will be described. In this example, left image 1 and right image 2 are interlaced images, respectively. But,
The odd field images and the even field images of the images 1 and 2 are not merged.

As shown in FIG. 3, the left image 1 and the right image 2
, The two vertical filters 13 correct the phase shifts of the individual images 1 and 2 to generate a left filter image 14 and a right filter image 15, respectively. The vertical filter 13 corrects the deviation of signals in the vertical direction of the images 1 and 2 to make them pseudo non-interlaced images.

The vertical filter 13 determines whether the image is a still image or a moving image. If the image is a still image, the phase shift is not corrected, and if the image is a moving image, the motion detection is performed. The deviation is corrected based on the size of.
By the vertical filter 13 performing such an operation,
The need for filter processing of non-interlaced images is eliminated, and deterioration of the image quality can be prevented.

Similar to the first embodiment, the synthesizer M uses the line L1 of the left filter image 14 and the line L2 of the right filter image 15
Are alternately merged to form a frame image 16 equivalent to an interlaced image. Then, as in the first embodiment, an encoder (not shown) encodes the frame image 16, and a pickup (not shown) records the encoded data on the magneto-optical disk.

When reproducing the left image 1 and the right image 2, a decoder (not shown) decodes the encoded data read from the magneto-optical disk to generate a reproduced frame image 17. The separator S reproduces the reproduction frame image 17 and reproduces the left image 1
A and the reproduction right image 2A are separated.

In the third embodiment, the vertical filter 1
3 is used to generate a pseudo non-interlaced image of the left image 1 and the right image 2, thereby synthesizing Ma and Mb for merging the images 1 and 2 field by field as in the second embodiment. It is not necessary to use, and the labor for merging can be saved.

[First Example Corresponding to First Embodiment] Next,
A more detailed first example corresponding to the first embodiment is shown in FIGS.
This will be described with reference to FIG. FIG. 4 shows a schematic stereoscopic video signal encoding apparatus, which is provided with a synthesizer 20 and a well-known MPEG-1 type encoder 22.

As shown in FIG. 5, the synthesizer 20 inputs the right-eye moving image RV and the left-eye moving image LV at the same time, and synthesizes them alternately line by line to produce a combined image signal having twice the number of lines in the vertical direction. Generate DV.

The MPEG-1 encoder 22 is the synthesizer 20.
The composite image signal DV output from is input and encoded. Encodes the composite signal DV, and the optical pickup 24 inputs the encoded data output from the MPEG-1 encoder 22 and records it on a magneto-optical disk 26 as a recording medium.

FIG. 6 shows a block circuit diagram of the synthesizer 20. The synthesizer 20 includes a first line memory 32 for storing the right-eye image signal captured by the first camera 28,
A second line memory 34 for storing the left-eye image signal LV photographed by the second camera 30, a clock generator 36, and a memory control circuit 38 are provided.

The first camera 28 sends the synchronization signal SYNC to the second signal.
It is output to the camera 30 and the clock generator 36.
The second camera 30 operates in synchronization with the synchronization signal SYNC. The clock generator 36 generates a clock signal in synchronization with the synchronization signal SYNC and outputs this to the memory control circuit 38.

The memory control circuit 38 generates the write clock signal f ₁ shown in FIG. 7 in response to the clock signal from the clock generator 36, and outputs this to the first and second write clock signals f ₁ .
It outputs to the line memories 32 and 34, respectively. The first line memory 32 stores the right image signal RV for each line (shown by R1-1, R1-2 ...) In response to the write clock signal f ₁ . Similarly, the second line memory stores the left image signal LV for each line (illustrated by L1-1, L1-2 ...).

[0058] Further, the memory control circuit 38 is synchronized with the write clock signal f ₁ in response to a clock signal, and generates the first read clock signal f ₂ having a frequency twice the frequency of the signal f ₁ , This is the first line memory 3
Output to 2. The memory control circuit 38 delays the first read clock signal f ₂ in response to the clock signal and generates a second read clock signal f ₃ having a frequency twice the frequency of the write clock signal f ₁ . This is output to the second line memory 34.

The first line memory 32 outputs the right image signal RV compressed to 1/2 to the encoder 22 line by line in response to the first read clock signal f ₁ . Second
In response to the second read clock signal f ₃ , the line memory 34 outputs the left image signal LV delayed to the right image signal RV, which is also compressed to ½, to the encoder 22 line by line. As a result, the synthesizer 20 outputs to the encoder 22 the synthesized image signal DV obtained by alternately synthesizing the right and left moving image signals for each line.

FIG. 8 shows a block circuit diagram of the MPEG1 encoder 22. The encoder 22 includes a screen rearrangement circuit 110, a macroblock converter 112, a subtractor 11
4, block converter 115, DCT 116, quantization circuit 118, variable length coding circuit 120, inserter 121, buffer 122, bit rate control circuit 124, inverse quantization circuit 126, adder 130, image memory 132, motion compensation A read control circuit 134, a mode determination circuit 136, and a motion detection circuit 138 are provided.

The screen rearrangement circuit 110 receives the composite image signal DV output from the combiner 22, and rearranges the order of screens (pictures) forming the composite image. For example,
When encoding is performed using a reference screen that temporally follows the current screen, the rearrangement circuit 110 rearranges the current screen and the reference screen so that the subsequent reference screen is output first.

As shown in FIG. 9, there are 3 screens to be encoded.
There are two types, and the first is a screen called an I picture that performs coding only within a frame without using a reference screen. The second is a screen that temporally follows the I picture, and is a screen called a P picture that performs interframe predictive coding using the I picture as a reference screen. The third is a screen that temporally precedes and / or follows an I picture or a P picture, and a screen called a B picture that performs interframe predictive coding using the I picture or P picture as a reference screen. is there.

Inter-frame predictive coding is targeted for macroblock units obtained by dividing P or B pictures. A macroblock that is interframe predictive coded is called an inter macroblock, and a macroblock that is not interframe predictive coded is called an intra macroblock.

The macroblock converter 112 divides each screen output from the screen rearrangement circuit 110 into a plurality of macroblocks of 16 × 16 pixels by scanning conversion, and outputs this to the motion detection circuit 138 and the subtractor 114. To do.

The subtractor 114 is the macroblock converter 1
The current macroblock of the current screen output from 12 and the reference macroblock of the reference screen output from the image memory 132 are subtracted to output difference data. (This image memory 132 will be described later.) The block converter 115 is 16 × 1 as shown in FIG.
Each macroblock of 6 pixels is divided into 4 blocks of 8x8 pixels. The DCT 116 performs a discrete cosine transform on a block-by-block basis, decomposes each block into frequency components from low frequency terms to high frequency terms, and forms a coefficient of 8 rows and 8 columns consisting of coefficients Cij of each frequency term. Matrix [Cij]
Respectively (processing of (a) → (b)). The quantization circuit 118 divides each coefficient Cij converted by the DCT 116 by a divisor Qij (= Kij × q) and quantizes it. Kij is a constant given by the quantization matrix table, and q
Is a quantization step width output from the bit rate control circuit 124. The quantization circuit 118 sequentially outputs the coefficient data Cij in the order of the low frequency terms and the high frequency terms.

The variable length coding circuit 120 is the quantization circuit 1
The coefficient data Cij output from 18 is variable-length coded to generate a bitstream. Bit rate control circuit 1
24 is an inserter 121 via the variable length coding circuit 120.
The bit-rate value of the bit stream output from is compared with the target value, and the quantization step width q is determined so that the bit-rate value becomes the target value. Control circuit 12
No. 4 reduces the quantization step width q when the bit rate is smaller than the target value, and increases the quantization step width q when the bit rate is larger than the target value. The target value of this bit rate is output from an encoding control circuit (not shown).

Inverse quantization circuit 126 and inverse DCT 128
Performs the reverse operation of the quantization circuit 118 and the DCT 116, decodes the quantized image data into original image data, and outputs this to the adder 130.

The adder 130 performs the following processing when the decoded image data is an inter macroblock (difference data generated by the subtractor 114). The adder 130 is
The reference screen macroblock data (this data will be described later) added from the image memory 132 is added to the difference data to reproduce the reference screen. Adder 13
0 stores the reproduced reference screen in the image memory 132. The image memory 132 can store at least two reference screens. This reference screen combination is I
A picture and an I picture, an I picture and a P picture, or a P picture and a P picture.

The image memory 132 has a read control circuit 134.
Under the control of, the reference screen or the reference macroblock data is output to the motion detection circuit 138, the mode determination circuit 136, the subtractor 114, and the adder 130.

Next, the motion detection circuit 138, the mode determination circuit 136 and the read control circuit 13 shown in FIGS.
4 will be described in detail. Here, for example, the image memory 13
2 stores the decoded I picture RL1 and P picture RL3. The macroblock converter 112 uses the macroblock S of the B picture shown in FIG.
MB is output to the motion detection circuit 138 and the mode determination circuit 136.

The motion detecting circuit 138 includes an averaging circuit 200,
First to third motion vector detection circuits 210, 212, 21
It is equipped with 4. The averaging circuit 200 includes an image memory 132
I picture and P picture output from are input, both pictures are averaged, and the averaged picture is the third picture.
It is output to the motion vector detection circuit 214.

The first detection circuit 210 compares the current macroblock SMB with the P picture, and searches the P picture for the reference macroblock most similar to the SMB.
Then, the first detection circuit 210 detects the motion vector MV (B) indicating the position of the searched reference macroblock. That is, the first detection circuit 210 calculates the difference between the coordinate position (first position) in the reference picture P picture corresponding to the coordinate position of the current macroblock SMB and the coordinate position (second position) of the reference macroblock as a motion vector. It is detected as MV (B). This motion vector MV (B) is shown in FIG. 14C.
It corresponds to the backward prediction shown in.

The second motion vector detection circuit 212 searches the I picture for a reference macroblock most similar to the current macroblock SMB, and detects a motion vector MV (F) indicating the position of the reference macroblock. This motion vector MV (F) corresponds to the forward prediction shown in FIG. 14A.

The third motion vector detection circuit 214 searches for a reference macroblock similar to the current macroblock SMB from the picture obtained by averaging the I picture and P picture by the averaging circuit 200, and a motion vector indicating the reference macroblock position. MV (F + B) is detected. This motion vector MV (F + B) corresponds to the bidirectional prediction shown in FIG. 14B. In this way, the first to third detection circuits 210, 212 and 214 are operated by the motion vector MV.
(F), MV (F + B), and MV (B) are output to the mode determination circuit 136 and the read control circuit 134.

The read control circuit 134 uses the motion vector MV.
Based on (F), the reference macroblock of the corresponding I picture is read from the memory 132 and output to the mode determination circuit 136. The read control circuit 134 also reads the reference macroblocks of the corresponding I picture and P picture from the memory 132 based on the motion vector MV (F + B), and outputs them to the mode determination circuit 136. Further, the read control circuit 134 determines that the motion vector MV
Based on (B), the reference macroblock of the corresponding P picture is read from the memory 132 and output to the mode determination circuit 136.

The mode determination circuit 136 is the averaging circuit 22.
0, first to fourth variance value calculation circuits 216, 226, 22
8, 230, a variance value comparison circuit 232, first to third subtractors 218, 222, 224, and a switching circuit 234.

The first calculation circuit 216 calculates the variance value (activity) of the current macroblock SMB (intra macroblock) output from the macroblock converter 112. This dispersion value indicates the flatness of the screen.

The first subtractor 218 uses the current macroblock SM.
The difference between B and the reference macroblock obtained by the forward prediction is calculated, and the second calculation circuit 226 calculates the variance value according to this difference. The second subtractor 222 detects the current macroblock SMB.
And a reference macroblock by bidirectional prediction averaged by the averaging circuit 220, and the third calculation circuit 228
Calculates the variance value according to this difference. Third subtractor 22
4 calculates the difference between the current macroblock SMB and the reference macroblock by backward prediction, and the fourth calculation circuit 230
Calculates the variance value according to this difference.

The variance value comparison circuit 232 includes circuits 216 and 216.
The respective variance values output from 226, 228, and 230 are compared, and the macroblock type information MBT corresponding to the variance value having the smallest value is output. This macroblock type information MBT indicates any one of four encodings of the current macroblock (intra mode), forward prediction, backward prediction, and bidirectional prediction (inter mode). . In the inter mode, the comparison circuit 232 outputs the control signal to the switching circuit 234.

The switching circuit 234 outputs the corresponding motion vector to the read control circuit 148 and the inserter 121 in response to the control signal. For example, when the variance value of the calculation circuit 230 is the smallest, the comparison circuit 232 outputs the inter prediction macroblock type MBT by backward prediction, and the switching circuit 234 outputs the motion vector MV (B) to the read control circuit 134. . Read control circuit 134
Outputs a read control signal of the corresponding reference macroblock to the memory 132 based on the motion vector MV. As described above, the mode determination circuit 136 uses the intra mode,
Of the forward predictive coding shown in FIG. 14A, the bidirectional predictive coding shown in FIG. 14B, and the backward predictive coding shown in FIG. 11C, the method with the highest compression efficiency is automatically selected. By this mode selection, the compression efficiency of the stereoscopic moving image can be improved.

As shown in FIG. 8, the inserter 121 inserts various information for decoding by a decoder (not shown) into the bit stream output from the variable length coding circuit 120. These various types of information are: 1) information indicating a screen size output from an external input device (not shown), 2) information related to the encoding of a stereoscopic image output from the input device, and 3) from the mode determination circuit 136. The macro block type information MBT is output, 4) the motion vector information MV is output from the mode determination circuit 136, and 5) the bit rate target value output from an encoding control circuit (not shown) is included. Further, 2) information includes 2a) information indicating whether or not the encoded data is stereoscopic image data, 2b) information indicating a method of merging left and right moving images, and 2c) whether or not the image before encoding is an interlaced image. Including information that represents. The buffer memory 122 temporarily stores a bitstream including various kinds of information, and then outputs the bitstream at a predetermined bit rate.

As described above, in the first example, the synthesizer 20 synthesizes the left image and the right image having strong correlation (high similarity) line by line into one image (picture), Encoding is performed by a known MPEG-1 encoder 22. At this time, the MPEG-1 encoder 22 detects the correlation between both images from the difference between the current screen and the reference screen, and selects the coding method with the highest degree of compression based on the detection. Then, the encoder 22 encodes (DCT) the combined image in block units of 8 × 8 pixels by a method according to the selection. In this way, the MPEG1 encoder 22
By using, it is possible to improve the compression efficiency of the stereoscopic moving image signal.

[Second Example Corresponding to First Embodiment] Next,
A more detailed second example corresponding to the first embodiment is shown in FIG.
5 will be described. As shown in FIG.
Includes a horizontal pulse generator 42 and a changeover switch 44.

The horizontal pulse generator 42 is used for the first camera 28.
In response to the synchronization signal SYNC provided by the above, a pulse signal that is inverted every horizontal scanning period is generated, and this signal is output to the switch 44. The changeover switch 44 inputs the left and right moving image signals from the first and second cameras 28 and 30,
The switching operation is performed every horizontal scanning period in response to the pulse signal, and the left and right moving image signals are alternately output for each line.

The second example is different from the first example in which the left and right moving image signals are read out at a double speed and synthesized, and the right eye image and the left eye image are simply output alternately line by line. As a result,
A combined image having the same size as the left and right moving image screen is formed. The MPEG1 encoder 22 receives this combined image from the combiner 40 and encodes it. At this time,
Since the screen size of the composite image of the second example is different from that of the first example, the set value of the processing screen size in the MPEG-1 encoder 22 is changed.

[Third Example Corresponding to the First Embodiment] Next,
A more detailed third example corresponding to the first embodiment will be described with reference to FIGS.

As shown in FIG. 16, the stereoscopic image coding apparatus uses the MP corresponding to the synthesizer 20 and the frame structure mode.
An EG-2 type encoder 46 is provided. Synthesizer 2
In the case of 0, as in the first example, the right moving image RV and the left moving image LV are alternately combined for each line to form a combined image DV (combined picture) having twice the number of lines in the vertical direction. MPEG
The -2 encoder 46 encodes the composite image DV. The optical pickup section 24 records the encoded data on a magneto-optical disk 26 as a recording medium.

FIG. 17 shows a block circuit diagram of the MPEG-2 encoder 46. The encoder 22 of the first example
The same components as those of the above are denoted by the same reference numerals and the description thereof will be omitted. The encoder 46 further comprises a frame / field block converter 145 and an inverse frame / field block converter 146.

The block converter 145 includes first and second block converters 115 and 140, a switch circuit 142, and a mode selection circuit 144. As shown in FIG. 18, the first block converter 115 converts a macro block of 16 × 16 pixels into four blocks of 8 × 8 pixels (frame block) for DCT, as in the block converter 115 of the first example. ). In this conversion, each frame block has an odd line of a right image and an even line of a left image.

As shown in FIG. 17, the second block converter 140 converts a macro block of 16 × 16 pixels into two first blocks (first field block) of 8 × 8 pixels.
Then, it is converted into two second blocks (second field blocks) of 8 × 8 pixels. In this conversion, each line of each first field block is composed of a right image, and each line of each second field block is composed of a left image.

The mode selection circuit 144 receives the frame block and the first and second field blocks from the first and second block converters 115 and 140, respectively, and calculates the variance value (or activity) of these blocks. . The mode selection circuit 144 compares the variance value of the frame block with the variance value of the first and second field blocks and generates a mode signal indicating a block type having a smaller value. The selection circuit 144 outputs this mode signal to the switch circuit 142, the inserter 121, and the inverse frame / field block converter 146. In response to the mode signal, the switch circuit 142 selectively outputs the entire frame block or one of the first and second field blocks to the DCT 116. The inverse block converter 142 converts the first and second field blocks output from the inverse DCT 128 according to the mode signal into a macro block into which left and right images are merged, and adds the macro block to the adder 1
Output to 30. The inverse block converter 142 converts the frame block output from the inverse DCT into a macroblock according to the mode signal, and outputs the macroblock to the adder 130.

Next, details of the motion detection circuit 150 and the mode determination circuit 152 shown in FIG. 21 will be described. Here, for example, the image memory 132 is assumed to store the decoded I picture RL1 and P picture RL3 shown in FIG. Furthermore, the macroblock converter 11
2 outputs the macroblock SMB of the B picture RL2 between the I picture RL1 and the P picture RL3 to the motion detection circuit 150 and the mode determination circuit 152.

(Motion Detection) The motion detection circuit 150 includes a first circuit 240 for detecting and generating a motion vector by inter-frame prediction, a second circuit 242 for detecting and generating a motion vector by inter-field prediction, and first and second circuits. Two separation circuits 250 and 260 are provided.

(1) Motion Vector Detection by Inter-frame Prediction The first circuit 240 includes first and second motion vector detection circuits 244, 246 and an averaging circuit 248. The first detection circuit 244 includes the macroblock converter 112 in the P picture RL3 output from the image memory 132.
The reference macroblock that is most similar to the macroblock SMB output from Then, the first detection circuit 2
As shown in FIG. 22, 44 detects the backward motion vector MV (B) indicating the position of the reference macroblock.

Similarly, the second detection circuit 246 detects the forward motion vector MV (F) using the current macroblock SMB and the I picture RL1. The averaging circuit 248 is
The two motion vectors MV (F) and MV (B) are averaged to obtain a bidirectional (or interpolative) motion vector MV (F +
B) is generated. In this way, the first circuit 240 outputs the three types of motion vectors based on the inter-frame prediction to the read control circuit 148 and the mode determination circuit 152.

(2) Motion Vector Detection by Inter-field Prediction The second circuit 242 is the 16 × 8 pixel output circuit 270, the first circuit.
~ Eighth motion vector detection circuit 252, 254, 256,
258, 262, 264, 266, 268, and first and second motion vector generation circuits 272, 274.

The first separation circuit 250 uses the P picture RL3.
Is divided into a right image R3 composed of the odd lines and a left image L3 composed of the even lines. The first separation circuit 250 is
The right image R3 is output to the first and second detection circuits 252 and 254, and the left image L3 is output to the third and fourth detection circuits 256 and 25.
Output to 8.

The second separation circuit 260 uses the I picture RL1.
Is separated into a right image R1 composed of the odd lines and a left image L1 composed of the even lines. The second separation circuit 260 outputs the right image R1 to the fifth and sixth detection circuits 262 and 264, and the left image L1 to the seventh and eighth detection circuits 266 and 268.
Output to.

As shown in FIG. 23, the 16 × 8 pixel output circuit 270 converts the current macroblock SMB into a right image half macroblock R2B of 16 × 8 pixels consisting of odd lines.
Then, the left image half macroblock L2B of 16 × 8 pixels including even lines is separated.

The output circuit 270 is the right half macroblock R2.
B is the first, third, fifth and seventh detection circuits 252, 25
6,262,266 to the left half macroblock L2
B is the second, fourth, sixth and eighth detection circuits 254, 25
It outputs to 8,264,266. Motion vector detection is performed using these right images R1, R3, left images L1, L3, and left and right image half macroblocks R2B, L2B.

As shown in FIG. 24C, the first detection circuit 252 detects the backward motion vector MV1 (Be) from the right image R3 and the right image half macroblock R2B. Third
The detection circuit, as shown in FIG. 24D, includes left images L3 and R2.
The backward motion vector MV1 (Bo) is detected from B and B. As shown in FIG. 24A, the fifth detection circuit 262 detects the forward motion vector MV1 (F) from the right images R1 and R2B.
e) is detected. As shown in FIG. 24B, the seventh detection circuit 266 detects the forward motion vector MV1 (Fo) from the left images L1 and R2B.

As shown in FIG. 25C, the second detection circuit 254 detects the backward motion vector MV2 (Be) from the left image L2 and the left image half macroblock L2B. Fourth
As shown in FIG. 25D, the detection circuit 258 displays the left image L3.
And L2B, the backward motion vector MV2 (Bo) is detected. As shown in FIG. 25A, the sixth detection circuit 264 determines the forward motion vector MV from the right images R1 and L2B.
2 (Fe) is detected. The eighth detection circuit 268 is shown in FIG.
As shown in B, the forward motion vector MV2 (Fo) is detected from the left images L1 and L2B.

The first motion vector generation circuit 272 includes the first, third, fifth and seventh detection circuits 252, 256, 25.
8 and 266 detected four types of motion vector MV1
From (Be, Bo, Fe, Fo), FIGS.
4 types of bidirectional motion vectors MV1 (Fe
+ Be, Fe + Bo, Fo + Be, Fo + Bo) are generated.

The second motion vector generation circuit 274 includes the second, fourth, sixth and eighth detection circuits 254, 258, 26.
4 and 268 detect four types of motion vectors MV2
From (Be, Bo, Fe, Fo), FIGS.
4 types of bidirectional motion vectors MV2 (Fe
+ Be, Fe + Bo, Fo + Be, Fo + Bo) are generated. In this way, the second circuit 242 reads the 16 types of motion vectors by the inter-field prediction and reads out the control circuit 1.
48 and the mode determination circuit 152.

The read control circuit 148 includes the first circuit 240.
16 × 16 corresponding to the three types of motion vectors from
The image memory 132 is controlled to output the reference macroblock of the pixel to the mode determination circuit 152. The reference macroblock is taken out of the I picture RL1 and / or the P picture RL3, and the odd line is the right image,
Even lines are composed of the left image.

Further, the read control circuit 148 includes the second circuit 2
16 corresponding to 16 kinds of motion vectors from 42
The reference half macroblock of × 8 pixels is used as the mode determination circuit 15
The image memory 132 is controlled so that the image data is output to the image memory 2. The reference macroblock is extracted from the I picture RL1 and / or the P picture RL3, and all lines are composed of the right image or the left image.

(Coding Mode Judgment) Mode Judging Circuit 15
Reference numeral 2 denotes a first variance value detection circuit 278 for inputting the current macroblock SMB, and second to fourth variance value detection circuits 280, 284, 28 corresponding to three types of reference macroblocks.
8 and first to third subtractors 282, 286, 290. The mode determination circuit 152 further includes the fifth, sixth variance value detection circuits 294, 300 (the remaining 14 detection circuits are not shown) and the fourth, fourth number corresponding to 16 types of reference half macroblocks. 5 subtractors 296, 298 (remaining 1
4 subtractors are not shown), 16 × 8 pixel output circuit 29
2. A dispersion value comparison circuit 302 and a selection circuit 276 are provided.

(1) Calculation of variance value in inter-frame prediction The first variance value calculation circuit 278 is used for the macroblock converter 1
The current macroblock SMB is received from 12, and a variance value indicating the compression efficiency of the macroblock SMB is calculated. The first subtractor 282 calculates the difference (or prediction error) between the current macroblock SMB and the 16 × 16 reference macroblock corresponding to the motion vector MV (F).

The second calculation circuit 280 uses the first subtractor 282.
The difference is received from and the variance value indicating the compression efficiency of the forward inter-frame prediction is calculated. The second subtractor 286 is the SMB
And the reference macroblock corresponding to the motion vector MV (F + B) are calculated.

The third calculation circuit 284 is connected to the second subtractor 286.
The difference is received from and the variance value indicating the compression efficiency of bidirectional inter-frame prediction is calculated. The third subtractor 290 is an SMB
And the reference macroblock corresponding to the motion vector MV (B) are calculated.

The fourth calculation circuit 284 is connected to the third subtractor 290.
The difference value is received from and the variance value indicating the compression efficiency of the backward frame prediction is calculated. (2) Calculation of variance value in inter-field prediction The 16 × 8 pixel output circuit 292, as shown in FIG.
The current macroblock SMB is made up of 16 × consisting of odd lines.
Right image half macroblock R2B of 8 pixels and left image half macroblock L2B of 16 × 8 pixels consisting of even lines
To separate. The output circuit 292 is the right half macro block R2.
B is output to eight subtractors (not shown) including the fourth subtractor 296, and the left half macroblock L2B is output to the fifth subtractor 298.
To eight other subtracters (not shown).

The fourth subtracter 296 includes the right half macroblock R2B and the motion vector MV1 (Fe) shown in FIG. 24A.
The difference with the reference half macroblock corresponding to is calculated.
The fifth calculation circuit 294 receives the difference from the fourth subtractor 296 and calculates the variance value indicating the compression efficiency of the forward inter-field prediction of the right image.

Similarly, seven subtractors not shown are
The right half macroblock R2B and each motion vector MV1 (Fo, Be, Bo, Fe + B shown in FIGS. 24B to 24H).
e, Fe + Bo, Fo + Be, Fo + Bo) and the difference with each reference half macroblock are calculated.
Seven calculation circuits (not shown) receive each difference and calculate the variance value thereof.

The fifth subtractor 298 is arranged to detect the left half macroblock L2B and the motion vector MV2 (Fe) shown in FIG. 25A.
The difference with the reference half macroblock corresponding to is calculated.
The sixth calculation circuit 294 receives the difference from the fifth subtractor 298 and calculates a variance value indicating the compression efficiency of the forward inter-field prediction of the left image.

Similarly, seven subtractors (not shown)
The left half macroblock L2B and each motion vector MV2 (Fo, Be, Bo, Fe + B shown in FIGS. 25B to 25H).
e, Fe + Bo, Fo + Be, Fo + Bo) and the difference with each reference half macroblock are calculated.
Seven calculation circuits (not shown) receive each difference and calculate the variance value thereof.

(3) Determination of Optimum Coding Mode The variance value comparison circuit 302 includes the first to sixth calculation circuits 27.
8, 280, 284, 288, 294, 300, and each variance value output from 14 calculation circuits (not shown) are compared to identify the macroblock having the smallest value,
Type information MBT indicating the specified macroblock
Is output to the selection circuit 276 and the inserter 121. This information MBT indicates the coding of any of the intra mode (intra-frame coding that does not use a motion vector) and the six types of inter modes. The six types of inter modes are shown in Table 1.
As shown in

[0117]

[Table 1] i) interframe predictive coding using forward motion vector MV (F), ii) interframe predictive coding using backward motion vector MV (B), iii) bidirectional motion vector MV (F + B) Inter-frame predictive coding, iv) Forward motion vector M of pair included in group 1
Inter-field predictive coding using V1 and MV2, v) backward motion vector M of a pair included in group 2
Inter-field predictive coding using V1 and MV2, vi) Paired bidirectional motion vector M included in group 3
Inter-field predictive coding using V1 and MV2 is set.

The selection circuit 276 has three types of inter-frame predicted motion vectors MV (F, B, F + B) and 16 types of inter-field predicted motion vectors MV1 (Fe ...),
In response to the input of MV2 (Fe ...) And the input of the information MBT indicating the inter mode, the corresponding motion vector is selectively output to the read control circuit 148 and the inserter 121.

As described above, in the third example, two types of motion compensation can be selectively obtained in predictive coding of left and right composite images. The first type is motion compensation by inter-frame prediction using the left and right composite images RL1 and / or RL3 and a macro block SMB of 16 × 16 pixels. The second is left and right separate images R1, R3, L1,
L3 and left and right half macro blocks R2B, L of 16 × 8 pixels
This is motion compensation by inter-field prediction using 2B, that is, parallax compensation.

Therefore, it is possible to improve the coding efficiency of a planar composite image having a high degree of correlation between the left and right images under the motion compensation, and to increase the degree of correlation of the left and right images under the parallax compensation. It is possible to improve the coding efficiency of a low stereoscopic composite image. Further, by providing the frame / field block converter 145, the DCT processing can be efficiently performed according to the variance values of the left and right combined macroblocks and the variance values of the left and right separate half macroblocks. [Fourth Example Corresponding to First Embodiment] Next, a more detailed fourth example corresponding to the first embodiment will be described with reference to FIGS. As shown in FIG. 26, the stereoscopic image coding apparatus according to the fourth example includes a synthesizer 48 and an MPEG-2 system encoder 50 compatible with the field structure mode.

As shown in FIG. 27, the synthesizer 48 has a first
A first image memory 52 for storing the right-eye image signal captured by the camera 28, a second image memory 54 for storing the left-eye image signal LV captured by the second camera 30, a clock generator 58, and a memory. A control circuit 60 is provided.

The clock generator 58 generates a clock signal in synchronization with the synchronization signal SYNC output from the first camera 28, and outputs this to the memory control circuit 60. The memory control circuit 60 outputs a write signal to the first and second image memories 52 and 54 in synchronization with the clock signal. Both memories 52 and 54 respond to the write signal to display the left and right moving images in a predetermined cycle (1/30 seconds in this case).
Are stored for each screen (picture).

The memory control circuit 60 includes a first read signal which is synchronized with the clock signal and has a frequency twice that of the signal, and a second read signal which is delayed by the first read signal and has a frequency twice that of the first read signal. To generate.

The first image memory 52 responds to the first read signal to display the right moving image in a predetermined cycle (in this case, 1/60 second).
To read every screen. The second image memory 54 reads out the left moving image delayed to the right moving image for each screen in a predetermined cycle in response to the second read signal. As shown in FIG. 28, the combiner 48 outputs the left and right combined image signal DV2 having a vertical scanning period of ½ to the encoder 50 by reading the both memories 52 and 54.

FIG. 29 shows a block circuit diagram of the MPEG-2 encoder 50. The encoder 2 of the first example
The same components as those in No. 2 are designated by the same reference numerals and the description thereof is omitted. Here, for example, the image memory 132 is the same as that shown in FIG.
From the decoded I picture consisting of the right picture I picture (field) R1 and the left picture I picture (field) L1 of the field structure shown in 0, and the right picture P picture (field) R3 and the left picture P picture (field) L3 It is assumed that the decoded P picture is stored. Further, the macroblock converter 112
Outputs the macro block SMB2 of the right image B picture R2 between the I picture R1 and the P picture R3 to the motion detection circuit 150 and the mode determination circuit 152.

(Motion Detection) As shown in FIG. 31, the motion detection circuit 156 includes first and second circuits 400 and 402 and a separation circuit 414. The first circuit 400 is 16 × 1
A 6-pixel macroblock is used to detect and generate a motion vector by inter-field prediction. Second circuit 402
Detects and generates a motion vector by inter-field prediction using a 16 × 8 pixel half macroblock.

(1) Motion vector detection by 16 × 16 inter-field prediction The first circuit 400 is composed of the first to fourth motion vector detection circuits 4
04, 406, 408, 410 and a motion vector generation circuit 412.

The first detection circuit 404 is connected to the image memory 132.
In the left P-picture L3 output from, the reference macroblock most similar to the current macroblock SMB2 of 16 × 16 pixels output from the macroblock converter 112 is searched for. The first detection circuit 404 detects a backward motion vector MV (Bo) indicating the position of the reference macroblock as shown in FIG. 32D.

Similarly, the second detection circuit 406 detects that the SM
The backward motion vector MV (Be) shown in FIG. 32C is detected from B2 and the right P picture R3. Third detection circuit 40
8 detects the forward motion vector MV (Fo) shown in FIG. 32B from the SMB2 and the left I picture L1. The third detection circuit 410 detects the forward motion vector MV (Fe) shown in FIG. 32A from the SMB2 and the right I picture R1.

The motion vector generation circuit 412 extracts the four motion vectors MV (Fe, Fo, Be, Bo) from FIG.
2E, F, G, H four types of bidirectional motion vectors (Fe + Be, Fe + Bo, Fo + Be, Fo + Bo)
Generate In this way, the first circuit 400 is 16 ×
The eight types of motion vectors detected and generated between the reference macroblock SMB2 of 16 images and four pictures are output to the read control circuit 158 and the mode determination circuit 160.

(2) Motion Vector Detection by 16 × 8 Inter-field Prediction The second circuit 402 shown in FIG. 31 is the first and second motion vector detection circuits 416, 41 for inputting the right P picture R3.
8 and the third and fourth motion vector detection circuits 420 and 422 for inputting the left P picture L3, and the fifth and sixth motion vector detection circuits 424, 4 for inputting the right I picture R1.
26, and seventh and eighth motion vector detection circuits 428 and 430 for inputting the left I-picture L1 and first and second motion vector generation circuits 432 and 434.

Separation circuit 414 receives the current macroblock SMB as shown in FIG.
Pixel upper macroblock U2B and lower macroblock S2B are separated. The separation circuit 414 outputs the upper-macro block U2B to the first, third, fifth and seventh detection circuits 416, 420, 424, 428, and the lower macro block S2B as the second, fourth, sixth and sixth. 8 detection circuits 418, 422, 426 and 430.

The first detection circuit 416 detects the backward motion vector MVU (Be) shown in FIG. 33C from the upper macroblock U2B and the right P picture R3. The third detection circuit 420 includes the U2B and the left P picture L3 as shown in FIG.
The backward motion vector MVU (Bo) shown in 3D is detected. The fifth detection circuit 424 controls the U2B and the right I-picture R1.
From the forward motion vector MVU (F
e) is detected. The seventh detection circuit 428 has U2B and left I
The forward motion vector MVU (Fo) shown in FIG. 33B is detected from the picture L1.

The second detection circuit 418 detects the backward motion vector MVS (Be) shown in FIG. 34C from the lower macroblock S2B and the right P picture R3. The fourth detection circuit 422 uses the S2B and the left P picture L3 as shown in FIG.
The backward motion vector MVS (Bo) shown in 4D is detected. The sixth detection circuit 426 detects S2B and right I-picture R1.
From the forward motion vector MVS (F
e) is detected. The eighth detection circuit 430 includes S2B and left I
The forward motion vector MVS (Fo) shown in FIG. 34B is detected from the picture L1.

The first motion vector generation circuit 432 includes the first, third, fifth and seventh detection circuits 416, 420, 42.
4 and 428 detected four types of motion vector MVU
From (Be, Bo, Fe, Fo), four types of bidirectional motion vectors MVU (Fe + B) as shown in FIGS.
e, Fe + Bo, Fo + Be, Fo + Bo).

The second motion vector generation circuit 432 includes the second, fourth, sixth and eighth detection circuits 418, 422, 42.
4 and 6 types of motion vectors MVS detected by 430
From (Be, Bo, Fe, Fo), four types of bidirectional motion vectors MVS (Fe + B) as shown in FIGS.
e, Fe + Bo, Fo + Be, Fo + Bo).

In this way, the second circuit 402 is 16 ×
8-pixel upper and lower macroblocks U2B,
The 16 types of motion vectors detected and generated between S2B and the four pictures R1, R3, L1, L3 are output to the read control circuit 148 and the mode determination circuit 152.

The read control circuit 158 includes the first circuit 400.
16 × 16, the number corresponding to 8 types of motion vectors from
The image memory 132 is controlled to output the reference macroblock of the pixel to the mode determination circuit 160. The read control circuit 158 also outputs to the mode determination circuit 152 the reference half macroblocks of 16 × 8 pixels, the number of which corresponds to the 16 types of motion vectors from the second circuit.
Control 2

(Coding Mode Judgment) Mode Judging Circuit 16
0 is the first variance value detection circuit 438 that inputs the current macroblock SMB2, and the second and third variance value detection circuits 440 and 445 (the remaining six detection circuits) corresponding to eight types of reference macroblocks. (Not shown) and first and second subtractors 442 and 443 (the remaining six subtractors are not shown).

The mode determination circuit 152 further includes the third and fourth variance value detection circuits 446 and 452 (the remaining 14 detection circuits are not shown) and the number corresponding to 16 types of reference half macroblocks. It is provided with third and fourth subtractors 448 and 450 (the remaining 14 subtractors are not shown), a separation circuit 444, a variance value comparison circuit 454 and a selection circuit 436.

(1) Calculation of variance value in 16 × 16 inter-field prediction The first calculation circuit 438 calculates a variance value indicating the compression efficiency of the current macroblock SMB2. Second calculation circuit 440
Is the current macroblock SM calculated by the first subtractor 442.
B2 and 1 corresponding to the forward motion vector MV (Fe)
The variance value of the difference from the reference macroblock of 6 × 16 pixels is calculated. The third calculation circuit 440 calculates the variance value of the difference between the SMB2 calculated by the second subtractor 442 and the reference macroblock corresponding to the forward motion vector MV (Fo).

Similarly, six calculation circuits (not shown)
Backward motion vector MV (Be, Bo), bidirectional prediction vector MV (Fe + Be, Fe + Bo, Fo + Be, F
With respect to (o + Bo), variance values of differences from six subtractors (not shown) are calculated.

(2) Calculation of variance value in 16 × 8 inter-field prediction The separation circuit 444 separates the current macroblock SMB2 into an upper macroblock U2B and a lower macroblock S2B, as shown in FIG. Are output to eight subtractors including the third subtractor 448, and S2B is output to the fourth subtractor.
It outputs to eight subtractors including the subtractor 452.

The fourth calculation circuit 446 includes a third subtractor 446.
Then, the variance value of the difference between the upper macroblock U2B calculated by the above step and the reference half macroblock of 16 × 8 pixels corresponding to the forward motion vector MVU (Fe) is calculated. Similarly, seven calculation circuits (not shown) are used for the backward motion vector MVU (Fo, Be, Bo) and the bidirectional prediction vector M.
VU (Fe + Be, Fe + Bo, Fo + Be, Fo + B
For o), the variance value of the difference from each of the seven subtracters (not shown) is calculated.

The fifth calculation circuit 452 includes a fourth subtractor 450.
Then, the variance value of the difference between the lower macroblock S2B calculated by the above step and the reference half macroblock of 16 × 8 pixels corresponding to the forward motion vector MVS (Fe) is calculated. Similarly, seven calculation circuits (not shown) are used for the backward motion vector MVS (Fo, Be, Bo) and the bidirectional motion vector M.
VS (Fe + Be, Fe + Bo, Fo + Be, Fo + B
For o), the variance value of the difference from each of the seven subtracters (not shown) is calculated.

(3) Judgment of Optimal Coding Mode The variance value comparison circuit 454 has the first to fifth calculation circuits 43.
8,440,445,446,452 and 2 not shown
The variance values output from the 0 calculation circuits are compared with each other to identify the macroblock having the smallest value, and the type information MBT indicating the identified macroblock is provided to the selection circuit 436 and the inserter 121. Output. This information M
BT indicates encoding of either the intra mode or the six types of inter modes. Table 2 shows the six types of inter modes
As shown in

[0147]

[Table 2] i) Any forward motion vector MV (Fe, Fo)
Inter-field predictive coding using ii) any backward motion vector MV (Be, Bo)
Encoding by inter-field prediction using iii) any bidirectional motion vector MV (Fe + B
e, Fe + Bo, Fo + Be, Fo + Bo) inter-field predictive coding, iv) Forward motion vector M of the pair included in group 1
Inter-field predictive coding using VU and MVS, v) backward motion vector M of a pair included in group 2
Inter-field predictive coding using VU and MVS, vi) Paired bidirectional motion vector M included in group 3
It is set as inter-field predictive coding using VU and MVS.

The selection circuit 436 responds to the input of the 24 types of inter-field prediction motion vectors output from the motion detection circuit 156 and the input of the information MBT indicating the inter mode, and reads out the corresponding motion vector from the control circuit 15.
8 and the inserter 121 are selectively output.

As described above, in the fourth example, three types of motion compensation can be selectively obtained in predictive coding of left and right composite images. The first type is, for example, 2
This is motion compensation by inter-field prediction using one right image R1 and R3 and a 16 × 16 pixel right macroblock SMB2 (or 16 × 8 pixel upper and lower macroblocks U2B and S2B). The second is two left images L1 and L3 and a right macroblock S of 16 × 16 pixels.
This is motion compensation by inter-field prediction using MB2 (16 × 8 pixel upper and lower macroblocks U2B and S2B), that is, parallax compensation. The third is
Intermediate between the first motion compensation and the second parallax compensation (or
Interpolative) motion compensation.

Therefore, by these compensations, the macroblock type having the highest compression efficiency can be selected according to the correlation between the left and right images. Further, by using the upper and lower macro blocks U2B and S2B of 16 × 8 pixels, the current macro block S of 16 × 16 pixels is
Higher-density predictive coding can be performed as compared with the case of using MB2.

The present invention is not limited to the above embodiment, but may be carried out as follows. (1) As shown in FIG. 36, the line L1 of the left image 1 and the line L2 of the right image 2 may be alternately merged every fixed number of lines (four lines in this case).

(2) As shown in FIG. 37, the left image 1 and the right image 2 may be alternately merged in a predetermined number of blocks B1 and B2 vertically or horizontally. In this case, it is preferable that the left image 1 and the right image 2 are non-interlaced images from the viewpoint of easy blocking.

(3) In the fourth example, the moving image signal for the left eye and the moving image signal for the right eye are displayed on one screen (frame).
Instead of alternately synthesizing for each field, a moving image signal for the right eye formed for each field and a moving image signal for the left eye formed for each field are synthesized for each field,
This composite moving image signal may be encoded by the MPEG-2 encoder 50 having a field structure.

(4) A magneto-optical disk as a medium for recording encoded data is an optical disk, a phase change disk,
It may be replaced with a storage medium such as a hard disk. Regarding the inventions other than the claims that can be understood from the above embodiment,
The effect will be described below.

(1) A moving image for the right eye and a moving image for the left eye are combined for each two-dimensional block having a predetermined number of pixels to form a combined moving image, and the combined moving image is MPEG-
A method for encoding a stereoscopic moving image, which is encoded according to the 1 system or the MPEG-2 system. By doing so, the left and right moving images can be efficiently combined.

(2) The moving image for the right eye and the moving image for the left eye are divided into a plurality of two-dimensional blocks each having a predetermined number of pixels in the horizontal direction, and the divided blocks are combined to form a composite moving image. A three-dimensional moving image encoding method for forming an image and encoding a composite image thereof according to the MPEG-1 system or the MPEG-2 system. Even in this case, the left and right moving images can be efficiently combined.

(3) A moving image for the right eye and a moving image for the left eye are divided into a plurality of two-dimensional blocks each having a predetermined number of pixels in the vertical direction, and the divided blocks are combined to form a composite moving image. A three-dimensional moving image encoding method for forming an image and encoding a composite image thereof according to the MPEG-1 system or the MPEG-2 system. Even in this case, the left and right moving images can be efficiently combined.

(4) The composite moving image encoded by the method described in (1) above is converted into the MPEG-1 system or MPEG-system.
A method of decoding a stereoscopic moving image in which the decoded combined moving image is decoded according to two methods, and the decoded combined moving image is separated into 22-dimensional blocks to form left and right moving images separately. This way,
The efficiency of separating the decoded combined moving image is improved.

(5) The composite moving image encoded by the method described in (2) above is converted into the MPEG-1 system or MPEG-
A method for decoding a stereoscopic moving image in which the decoded moving image is decoded according to two methods, and the decoded combined moving image is horizontally separated into blocks to form left and right moving images separately. By doing this, the separation efficiency of the decoded combined moving image is improved.

(6) The composite moving image encoded by the method described in (3) above is converted into the MPEG-1 system or the MPEG-system.
A method of decoding a stereoscopic moving image in which decoding is performed according to two methods, the decoded combined moving image is vertically separated into blocks, and left and right moving images are separately formed. By doing this, the separation efficiency of the decoded combined moving image is improved.

[0161]

As described above in detail, according to the present invention, left and right moving images are combined to form a combined moving image, and the combined moving image is encoded by an MPEG-1 or MPEG-2 type encoder. Therefore, the coding efficiency of the stereoscopic moving image can be improved.

Further, according to the present invention, the left and right moving images are integrally coded according to the correlation between the left and right moving images at the time of encoding, that is, the left and right moving images are integrated and the left and right moving images are encoded. Since the encoding with the separate images is selectively performed, the encoding efficiency of the stereoscopic moving image can be improved.

Further, the composite moving image coded as described above is efficiently decoded by an MPEG-1 or MPEG-2 system decoder, and the decoded composite moving image is separated into left and right moving images. Can be formed separately.

[Brief description of drawings]

FIG. 1 is a diagram showing encoding and decoding of a stereoscopic moving image according to a first embodiment.

FIG. 2 is a diagram showing encoding and decoding of a stereoscopic moving image according to a second embodiment.

FIG. 3 is a diagram showing encoding and decoding of a stereoscopic moving image according to a third embodiment.

FIG. 4 is a block diagram showing an encoding device of a first example corresponding to the first embodiment.

FIG. 5 is a diagram for explaining composition of left and right moving images.

FIG. 6 is a block diagram showing a synthesizer.

FIG. 7 is a time chart for explaining formation of a composite image.

FIG. 8 is a block diagram showing an MPEG-1 encoder.

FIG. 9 is a diagram for explaining the operation of the screen rearrangement circuit.

FIG. 10 is a diagram showing conversion from macroblocks to blocks.

FIG. 11 is a diagram showing a block encoding procedure.

FIG. 12 is a block diagram showing a motion detection circuit and a mode determination circuit.

FIG. 13 is a diagram for explaining a screen used for predictive coding.

FIG. 14A is a diagram for explaining forward prediction;
(B) is a figure for demonstrating bidirectional prediction, (C) is a figure for demonstrating backward prediction.

FIG. 15 is a block diagram showing an encoding device of a second example corresponding to the first embodiment.

FIG. 16 is a block diagram showing an encoding device of a third example corresponding to the first embodiment.

FIG. 17 is a block diagram showing a frame structure MPEG-2 encoder.

FIG. 18 is a diagram showing conversion from macroblocks to frame blocks.

FIG. 19 is a diagram showing conversion from a macro block to a field block.

FIG. 20 is a diagram for explaining a screen used for predictive coding.

FIG. 21 is a block diagram showing a motion detection circuit and a mode determination circuit.

FIG. 22 is a diagram for explaining interframe predictive coding.

FIG. 23 is a diagram showing separation of macroblocks into left and right half macroblocks.

24A to 24H are views for explaining field prediction using the right half macroblock.

25A to 25H are views for explaining field prediction using a left half macroblock.

FIG. 26 is a block diagram showing an encoding device of a fourth example corresponding to the first embodiment.

FIG. 27 is a block diagram showing a synthesizer.

FIG. 28 is a diagram for explaining composition of left and right moving images.

FIG. 29 is a block diagram showing a field structure MPEG-2 encoder.

FIG. 30 is a diagram for explaining a screen used for predictive coding.

FIG. 31 is a block diagram showing a motion detection circuit and a mode determination circuit.

32A to 32H are views for explaining field prediction using a macro block of 16 × 16 pixels.

33 (A) to (H) are 16 × 8 pixel upper parts.
The figure for demonstrating the field prediction using a macroblock.

34A to 34H are views for explaining field prediction using a lower macroblock of 16 × 8 pixels.

FIG. 35 is a diagram showing conversion from macroblocks to upper and lower macroblocks.

FIG. 36 is a diagram showing encoding and decoding of a stereoscopic moving image according to another embodiment.

FIG. 37 is a diagram showing encoding and decoding of a stereoscopic moving image according to yet another embodiment.

[Explanation of symbols]

1 ... Left image, 2 ... Right image, 3 ... Frame image, 4 ... Encoder, 6 ... Decoder, 13 ... Vertical filter, 40 ... Combiner, 46 ... Frame structure encoder, 50 ... Field structure encoder, 114 ... Subtractor, 116 ... DCT circuit, 121 ... Inserter, 158 ... Motion compensation read control circuit, 160 ... Mode determination circuit as selection means, 400
... first circuit (114, 116, 158, and 400 constitute first predictive coding means), 402 ... second circuit, 414
... Separation circuit (114, 116, 158, 402, 414
Constitutes a second predictive coding means), L1, L2 ... Lines,
OF1, OF2 ... Odd field image, EF1, EF2 ... Even field image, M ... Combiner, S ... Separator, SMB2 ... Macro block, U2B ... Upper macro block, S2B ...
Lower macroblock.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Etsuko Sugimoto 2-5-5 Keihanhondori, Moriguchi-shi, Osaka Sanyo Electric Co., Ltd. (72) Inventor Tomoko Kobayashi 2-chome, Keihanhondori, Moriguchi-shi, Osaka No. 5 Sanyo Electric Co., Ltd.

Claims (20)

[Claims] 1. A synthesizer (M) merges a moving image signal for the right eye in frame units and a moving image signal for the left eye in frame units for each horizontal scanning line, and the merged moving image signal is merged. A three-dimensional moving image encoding method in which an MPEG2 encoder (4) encodes a frame structure. 2. The three-dimensional moving image encoding method according to claim 1, wherein the moving image signal in frame units is a non-interlaced scanning moving image signal. 3. The stereoscopic moving image encoding method according to claim 1, wherein the frame-based moving image signal is a non-interlaced moving image signal obtained by combining two fields of interlaced scanning field images. 4. The method for encoding a stereoscopic moving image according to claim 3, wherein the non-interlaced moving image signal is filtered in a vertical direction by using a vertical filter (13). 5. The non-interlaced video signal has a vertical filter (13) when a vertical difference component is large.
The method for encoding a stereoscopic moving image according to claim 3, wherein the vertical filtering process is performed by. 6. A combiner (M) merges a moving image signal for the right eye in a field unit and a moving image signal for the left eye in a field unit for each horizontal scanning line, and the merged moving image signal is merged. A three-dimensional moving image encoding method in which an MPEG2 encoder (4) encodes a frame structure. 7. A moving image signal for the left eye and a moving image signal for the right eye are alternately merged for each screen, and the merged moving image signal is encoded in a field structure by an MPEG2 encoder (50). Encoding method of stereoscopic moving image. 8. A right-eye moving image signal in field units and a left-eye moving image signal in field units are combined for each field to form a combined moving image signal, and the combined moving image signal is of a field structure. An encoding method of a stereoscopic moving image encoded by an encoder (50) of MPEG2 system. 9. A method for encoding a stereoscopic moving image signal using a left moving image and a right moving image, wherein each of the left and right moving images is a picture, and the picture in the left moving image is interlaced scanned. And a second field (EF1) formed from an interlaced even-numbered line image, and a picture in the right moving image is an interlaced image. Third field formed from scanned odd line image
(OF2) and a fourth field (EF2) formed from an even line image subjected to interlaced scanning. The line images in the first and third fields are combined to generate the first and third lines. Generating a first composite field (8) in which odd lines of fields are arranged alternately, and combining the line images in the second and fourth fields so that the even lines of the second and fourth fields alternate. Generating a second composite field (9) arranged in, and using an MPEG-2 compatible encoder (10),
A method for encoding a stereoscopic moving image, comprising: encoding the first and second combined fields. 10. A method according to claim 9, wherein the encoder (10) used in the encoding step.
Is a stereoscopic moving image encoding method that is an encoder conforming to the frame structure of MPEG2. 11. The method for encoding a stereoscopic moving image according to claim 1, wherein information related to the encoding of the stereoscopic moving image is added to the encoded stereoscopic moving image information. . 12. The related information is information indicating whether or not the encoded information is stereoscopic image information, information indicating a specification of a predetermined unit when the left and right moving images are combined, and an original image signal is an interlace. The stereoscopic moving image encoding method according to claim 11, comprising at least one of information indicating whether or not scanning is performed. 13. A synthesizer (48) for synthesizing a moving image signal for the right eye and a moving image signal for the left eye for each screen, and an image of the synthesized image signal in macro block units of 16 × 16 pixels. An encoder (50) for compression encoding, and a moving image signal provided in the encoder (50) and combined is compression encoded by motion compensation inter-field prediction encoding in macroblock units of 16 × 16 pixels. First predictive coding means (114, 116, 158, 400) and the encoder (50), the 16 × 16
A macroblock of pixels is individually compression-coded by motion compensation inter-field prediction coding in units of an upper block (U2B) of 16 × 8 pixels in the upper portion and a lower block (S2B) of 16 × 8 pixels in the lower portion. 2 predictive coding means (114, 116, 158, 402, 414), coded image data by the first predictive coding means, and coded image data by the second predictive coding means A stereoscopic moving image encoding apparatus, comprising: a selecting unit (160) that selectively outputs image data determined to have a small amount. 14. A synthesizer (48) for synthesizing a moving image signal for the right eye and a moving image signal for the left eye for each screen, and moving the synthesized moving image signal in macroblock units of 16 × 16 pixels. First predictive coding means (114, 116, 15) for compression coding by inter-compensation field predictive coding.
8400) and the macro block of 16 × 16 pixels,
× 8 pixel upper block (U2B) and lower 16 ×
Second predictive encoding means (114, 116, 158, 402,) that individually perform compression encoding by motion compensation inter-field predictive encoding in units of lower blocks (S2B) of 8 pixels.
414), the image data encoded by the first predictive encoding means, and the image data encoded by the second predictive encoding means, the image data determined to have a small code amount is selectively output. An apparatus for encoding a stereoscopic moving image, comprising: selecting means (160). 15. The device according to claim 13 and 14,
A three-dimensional moving image encoding apparatus comprising an inserter (121) for adding information related to encoding of a three-dimensional moving image to encoded three-dimensional moving image information. 16. The encoding device according to claim 15, wherein the inserter specifies information indicating whether or not the encoded information is stereoscopic image information, and a specification of a predetermined unit when synthesizing the left and right moving images. A stereoscopic moving image encoding apparatus for adding the related information including at least one of information indicating whether the original image signal is interlaced scanning or not to the encoded stereoscopic moving image information. 17. A composite moving image encoded by the encoding method according to claim 1 is decoded by a frame structure MPEG2 system decoder (6), and the decoded composite image is set for each horizontal scanning line. A method for decoding a stereoscopic moving image, in which the moving image signal for the right eye in frame units and the moving image signal for the left eye in frame units are separately formed by alternately separating them. 18. A composite moving image encoded by the encoding method according to claim 8 is a field structure MPEG2.
Decoding by a system decoder, and the decoded combined moving image is alternately separated for each field to separately form a moving image signal for the right eye in field units and a moving image signal for the left eye in field units. Method for decoding stereoscopic video. 19. A decoding device for use in the decoding method according to claim 17, comprising a frame structure MPEG2 system decoder (6) for decoding an encoded composite moving image, The composite image decoded by the decoder (6) is alternately separated for each horizontal scanning line to separately form a moving image signal for the right eye in frame units and a moving image signal for the left eye in frame units. And a separator (S) for decoding a stereoscopic moving image. 20. A decoding device for use in the decoding method according to claim 18, wherein a field structure MPEG-2 system decoder for decoding an encoded composite moving image and the decoder are provided. The composite moving image decoded by is alternately separated for each field, and a separator for separately forming a moving image signal for the right eye in field units and a moving image signal for the left eye in field units is provided. A stereoscopic moving image decoding device provided.