JPH086910A - Cluster type computer system - Google Patents

Abstract

PURPOSE:To prevent a user from being conscious of the generation of a fault by solving a neck in the number of I/O ports, eliminating the necessity of resending of a telegraphic message between plural processor modules at the occurance of a fault and shortening system recovery time. CONSTITUTION:A telegraphic message processing function in a system is divided into a communication process, a transaction process and a file process. A current process and a stand-by process are prepared in each process and respective processes are mounted on respectively different processor modules 11 to 16. At the time of transmitting a telegraphic message from each of the current processor modules 11, 13, 15 to processor modules for another function, the message is transmitted to both current and stand-by processor modules of the function. When each of the stand-by processor modules 12, 14, 16 detects a fault generated in its corresponding current processor module, the stand-by processor module succeeds the processing of the current process.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a distributed processing server in which a plurality of processor modules are connected by a LAN or a bus, and can shorten the system recovery time when a processor module failure occurs and improve the processing capacity. The present invention relates to a cluster computer system that can be used.

[0002]

2. Description of the Related Art Computer systems, which are mainly large-scale general-purpose machines, are being downsized by a downsizing system to a distributed system in which a distributed processing server is connected via a network. In addition, online transaction processing is becoming mainstream as the processing mode of computer systems. For this reason, when the distributed processing server executes online transaction processing, not only high availability that can be restored immediately even if the computer system is not stopped, but also high processing capability is required.

However, in the conventional distributed processing server, Nikkei Electronics (1992.5.18, No. 55) is used.
4, p. 87-p. 96), 2
Up to general-purpose servers (processor modules) and standby servers for backing them up are connected by LAN. When the general-purpose server fails, the standby server performs the takeover process to improve the availability.

On the other hand, as an example of a cluster type computer system, there is one conventionally applied to a control system such as a plant. This is the Hitachi review (1979.8,
VOL. 61, No. 8, p. 59-p. 62) as described in 62).
It is connected by N. For each processor module, availability was improved by an n: 1 backup system in which a common spare processor module was provided.

An example of the control system is the Hitachi review (1986.6, VOL.68, No. 6, p. 9-).
p. 14) "Function hierarchy autonomous type system unit distributed control system". This system is composed of a plurality of system controllers (processor modules) and a large number of device group controllers (processor modules). Further, the device group controller has the function of the system controller in advance, and when a failure occurs in the system controller, the device group controller substitutes the function of the system controller.

[0006]

First, in the conventional distributed processing server, as described above, the hot standby configuration is constituted by several (n: n = 3) general-purpose servers (processor modules). That is, all the functions are mounted on the (n-1) processor modules to execute online transaction processing. The remaining one is used as a spare device (processor module). This common spare machine is equipped with all functions and executes backup processing for all other general-purpose servers. For this reason,
When n becomes large, the spare machine must share the disk with many processor modules, which causes a problem of the number of I / O ports. Therefore, the conventional method has a problem in that it is not possible to connect a large number of processor modules and the processing capacity cannot be improved. Further, since the backup machine backs up all the functions, the system recovery time is the sum of the failure detection time, the file recovery process by the journal, and the message resend time, resulting in a long system recovery time.

Next, the conventional control system is composed of a plurality of system controllers (processor modules) and a large number of device group controllers (processor modules) as described above. Then, the device group controller has the function of the system controller in advance. In such a control system, the process must be controlled at a very short cycle of about 100 msec to 1 sec for process control. This is because when a failure occurs in the processor module, it is important to send a newer message instead of resending the message when sending the message to the standby processor module. Therefore, the control system has a problem that, unlike the distributed processing server, acquisition of checkpoint data for takeover processing and file recovery by a journal are not considered.

An object of the present invention is to configure a computer system with a plurality of processor modules, divide the electronic message processing function, and mount the functions in the processor module.
It is to eliminate the common spare processor module, eliminate the I / O port number bottleneck, and improve the processing capacity.

Another object of the present invention is to consider the acquisition of checkpoint data, provide an active process and a standby process for each divided functional unit, and mount them in different processor modules, thereby localizing system recovery processing. ,
To reduce system recovery time.

Still another object of the present invention is to retransmit a message in the event of a failure by transmitting a message to another processor module when the processor module currently in use sends it to both the active processor module and the standby processor module. It is intended to reduce system recovery time by eliminating time and system recovery time, and by eliminating checkpoint data synchronized with I / O access to recover files by journals.

[0011]

A cluster computer system according to the present invention comprises a plurality of processor modules each including at least a processor, a memory, and an input / output processor for controlling input / output (IO). Are connected so that they can communicate with each other via a LAN or a bus. In addition, the function of message processing is divided into a plurality of processes, an active process and a standby process are provided for each process, and assigned to the active processor module and the standby processor module, respectively.

When the active processor module sends a message to the processor module having another function, it sends the message to both the active processor module and the standby processor module. The active processor module uses the time of IO access for each telegram as a checkpoint, and transmits the IO access factor and the like as checkpoint data to the standby processor module.

When the standby processor module detects a failure of the active processor module, the standby processor module takes over the processing as a new active processor module and restarts the processing from the latest checkpoint using the checkpoint data already received and held.

[0014]

In the present invention, the message processing function is divided into, for example, a communication process, a transaction process, and a file process, and the respective functions are processed by different processor modules. Also, for each function, equipped with a working processor module and a standby processor module,
When a failure occurs in the active processor module, the standby processor module immediately takes over the processing, and hot standby switching is possible.

Specifically, regarding the communication processor module, the active communication processor module and the standby communication processor module simultaneously receive a message and store it in the input queue of the line controller. At that time, both communication processor modules refer to the timer and add a time stamp to the message as an identifier of the message. Then, the active communication processor module sends an input message to the active transaction processor module and the standby transaction processor module. As a result, even if a failure occurs in the active communication processor module, the standby communication processor module does not request the terminal to resend the electronic message, and the system recovery time can be shortened.

The active transaction processor module executes a predetermined process according to the type of the received electronic message. Then, when there is a read request from the disk device, the read request is notified to the active file processor module and the standby file processor module. The active file processor module reads out predetermined data from the disk device and notifies the active transaction processor module and the standby transaction processor module.

Further, the active transaction processor module executes the subsequent processing, and when there is a write request to the disk device, it notifies the active file processor module and the standby file processor module of the write request. The current file processor module writes predetermined data to the disk device. Then, the active file processor module notifies the active transaction processor module and the standby transaction processor module of the completion of writing.

Finally, the active transaction processor module notifies the result of the message processing to the active communication processor module and the standby communication processor module. Then, the active communication processor module sends the processing result to the terminal.

Here, the active process uses the IO access time for each electronic message as a checkpoint, and at this point, sends the IO access factor and the like as checkpoint data to the corresponding standby processor module.

On the other hand, since the standby processor module acquires checkpoint data at the time of requesting read IO and write IO, system recovery processing by the journal is not necessary, and system recovery time can be shortened.

The standby processor module operates as follows. The standby processor module receives a message from another active processor module, but refers to whether or not the processing of the received message is completed at regular intervals and removes it from the input queue if completed.

The system recovery time when a processor module failure occurs is the sum of the failure detection time, the file recovery time, and the connection reset time.

In the conventional method, checkpoint data is not acquired at the time of IO access, a journal is indispensable for file recovery processing, and system recovery time becomes long. Further, since the standby system does not receive a message from the terminal, when a failure occurs, the process of setting the connection with the terminal is essential, and the system recovery time becomes long.

On the other hand, in the present invention, the recovery processing by the journal is not required by making the IO access time a checkpoint, and each processor module waits with the active processor module when transmitting a message to another processor module. By simultaneously transmitting to the processor modules, it becomes unnecessary to retransmit a message between the processor modules when a failure occurs, and the system recovery time can be shortened. In addition, the message processing is divided into the communication function, transaction function, and file function, and the active and standby processor modules are provided for each to shorten the system recovery time in the event of a failure and to reduce the cluster computer system overall. It is possible to improve the processing capacity.

[0025]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A system of an embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a system configuration diagram of an embodiment according to the present invention. This system configuration is premised on six processor modules 11-16. All the processor modules 11 to 16 are connected by the processor module connection communication paths 3-0 and 3-1 and the control LAN 8. Communication path between processor modules 3-0, 3
-1 uses one side 3-0 as an active side and the other side 3-1 as a standby. The processor module connection communication paths 3-0 and 3-1 are used for interprocess communication. The control LAN 8 has an alive (a) for checking whether the processor modules 11 to 16 are operating normally.
live) Used for communicating messages.

Since the processor modules 11 to 12 are equipped with the communication process 30 (FIG. 3), the line switching device 5
Also, the business LAN 4 is connected to enable communication with the terminals 6-0 and 6-1. Processor modules 11-1
2 connects with the timer 7 to add a time stamp to the received electronic message. The processor modules 11-12 share the shared disk 2-0.

On the other hand, the other processor modules 13-1
Since No. 6 does not have the communication process 30, the line switching device 5 and the business LAN 4 are not connected. The processor modules 13-14 share the shared disk 2-1.
The processor modules 15 to 16 are shared disks 2-2
To share.

FIG. 2 is a block diagram of the processor module. The processor module 11 will be described as an example.
The processor module 11 includes a processor 11-1, a memory 11-2, an IOP 11-3, a line controller 11-.
4. Processor module connection communication path adapter 11-
5, a disk controller 11-6, a control LAN adapter 11-7, and a business LAN adapter 11-8.

Like the processor module 11, the processor module 12 has the communication process 30, and therefore has the same configuration.

Since the processor modules 13 to 16 do not have the communication process 30 as described above, the processor module 11 does not include the line control device 11-4 and the business LAN adapter 11-8. As a result, the processor modules 13 to 16
3-1 to 16-1, memory 13-2 to 16-2, IOP
13-3 to 16-3, processor module connection communication path adapters 13-5 to 16-5, disk controller 13
-6 to 16-6 and control LAN adapter 13-7
.. 16-7. (The notations 13-1 to 16-1 represent 13-1, 14-1, 15-1, 16-1. Others are the same.) FIG. 3 shows the software configuration of the system shown in FIG. It is a figure which shows the function division of message processing. Processor module 11
The software of 16 to 16 are respectively monitors 11-20 to
16-20, OSs 11-21 to 16-21, and processes 30 to 32. Monitor 11-20 to 16
-20 manages communication processing information between the processor modules 11-16.

The function of message processing is the communication process 3
0, transaction process 31 and file process 32. The communication process 30 relates to a process of exchanging with a terminal, the transaction process 31 relates to a process of a received message, and the file process 32 relates to a process of file access to a desk device. As these processes 30 to 32, active processes 30-0 to 32-0 and standby processes 30-1 to 32-1 are provided and mounted in the processor modules 11 to 16 as described below. That is,
The active communication process 30-0 is the processor module 1
First, the standby communication process 30-1 is installed in the processor module 12. The active transaction process 31-0 is the processor module 13, and the standby transaction process 31-1 is the processor module 1.
Installed in 4. The active file process 32-0 transfers the standby file process 32 to the processor module 15.
-1 is mounted on the processor module 16.

FIG. 4 is a diagram showing an outline of message processing. When the message processing starts to be executed, the message is received from the terminal 6. Therefore, necessary data is read from the disk device 2. The electronic message processing is executed, and the processing result is written in the disk device 2. Next, the response telegram is returned to the terminal 6 (transmission of the telegram), and the acknowledge (ACK) is received from the terminal.

FIG. 5 is a diagram showing an outline of the operation of this embodiment. In the following, each of the processor modules 11 to 16 will be described separately for the active processor modules 11, 13, 15 and the standby processor modules 12, 14, 16.

First, the active processor modules 11, 1
3 and 15 will be described.

The active communication processor module 11 and the standby communication processor module 12 simultaneously receive the telegram, and the input queues of the line controllers 11-4 and 12-4 or the business LAN adapters 11-8 and 12-8 ( It is stored in (described later) (process 200). At that time, the active and standby communication processor modules 11 and 12 refer to the timer 7 and add a time stamp to the message as an identifier of the message (process 201). And the active communication processor module 1
1 is the current transaction processor module 13
And waiting transaction processor module 14
The received electronic message is transmitted to (step 202).

The active transaction processor module 13 executes a predetermined process according to the type of the received electronic message. When a read request is issued from the disk device 2-2, the active and standby file processor modules 1
The read request is notified to 3 and 14 (process 203). The active file processor module 13 reads out predetermined data from the disk device 2-2 (process 204),
The active transaction processor module 13 and the standby transaction processor module 14 are notified (process 206).

Further, the active transaction processor module 13 executes the subsequent processing, and when there is a write request to the disk device 2-2, the active transaction processor module 13 sends a write request to the active file processor module 15 and the standby file processor module 16. Notify (Process 20)
3). The current file processor module 15 writes predetermined data to the disk device 2-2 (process 20).
5). Then, the write completion is notified to the active transaction processor module 13 and the standby transaction processor module 14 (process 206).

Finally, the active transaction processor module 13 sends the processing result to the active communication processor module 11 and the standby communication processor module 12.
(Processing 207), and the active communication processor module 11 transmits the processing result to the terminals 6-0 and 6-1 (Processing 208).

Active processor modules 11, 13,
Reference numeral 15 is a checkpoint at the time of IO access for sending a message, receiving a message, reading from a disk device, and writing to a disk device, and checkpoints the IO wait factors, the identifier of the message being executed, and the state of the shared IO. The data is transferred to the standby processor modules 12, 14 and 16, respectively.

Standby processor modules 12, 14,
16 receives a message from the terminals 6-0, 6-1 or other active processor modules 11, 13, 15. In addition, the standby processor modules 12, 14, 16 are
The checkpoint data received from the active processor module 11, 13, 15 is acquired.

FIG. 6 is a block diagram of the line controller. The line controller 11-4 includes a processor 11-4-1, a memory 11-4-2, a buffer 11-4-3, and a line controller 1.
It is composed of 1-4-4. The buffer 11-4-3 has an input queue 10 for storing a message received from the terminal 6-0.
(11-4-5) and an output queue 10 (11-4-6) for storing a message transmitted to the terminal 6-0 are provided. The same applies to the line controller 12-4.

FIG. 7 is a configuration diagram of a communication path adapter between processor modules. The processor module connection communication path adapter 11-5 is the processor 11-5.
1, a memory 11-5-2, a buffer 11-5-3, and a disk controller 11-5-4. Buffer 11-5
-3 is the input queue 2 as an input queue for storing the electronic message received from the other processor modules 12-16.
0 (11-5-5) and input queue 21 (11-5-7)
And an output queue 20 (11-5-6) and an output queue 21 (11-5) as output queues for storing messages to be transmitted to the other processor modules 12 to 16.
8) and are provided. The same applies to the processor module connection communication path adapter 12-5.

FIG. 8 is a block diagram of the disk controller. The disk controller 11-6 is the processor 11-6.
-1, a memory 11-6-2, a buffer 11-6-3, and a disk controller 11-6-4. Buffer 11-
6-3 holds data read from the shared disk 2-0 and data written to the shared disk 2-0. The same applies to the desk controller 12-6.

FIG. 9 is a block diagram of the control LAN adapter. The control LAN adapter 11-7 is the processor 1
1-7-1, memory 11-7-2, buffer 11-7-
3, the control LAN control unit 11-7-4. The buffer 11-7-3 includes another processor module 12
It holds an alive message received from the server and an alive message to be transmitted to another processor module 12. The same applies to the control LAN adapter 12-7.

FIG. 10 is a block diagram of a business LAN adapter. The business LAN adapter 11-8 includes a processor 11-8-1, a memory 11-8-2, and a buffer 11-8.
-3, the control LAN control unit 11-8-4. In the buffer 11-8-3, the input queue 30 (11-8-5) for storing the electronic message received from the terminal 6-1 and the terminal 6-
Output queue 30 (11-8
-6) and are provided. The same applies to the commercial LAN adapter 12-8.

FIG. 11 is a block diagram of the line switching device.
The line switching device 5 is provided with a conflict prevention circuit 5-1. By the function of the conflict prevention circuit 5-1, the active communication processor module 11 enables transmission and reception of a message with the terminal 6-0, and the standby communication processor module 12 can only receive a message with the terminal 6-0. And

FIG. 12 is a diagram showing a message format in communication between processor modules. The electronic message format includes a source address 80, a destination address 81, a message body 82, and a time stamp 83.

FIG. 13 is a diagram showing addresses of processor modules. The same address is used for both the processor module connection communication paths 3-0 and 3-1 and the control LAN 8. Here, the address of the installed process and its processor module is shown.
The address of the processor module 11 is (00) 16, and the address of the processor module 12 is (01) 16.
And the address of the processor module 13 is (10) 16
And the address of the processor module 14 is (11) 16
And the address of the processor module 15 is (20) 16
And the address of the processor module 16 is (21) 16
And Here, "() 16" represents a hexadecimal number.

FIG. 14 is a diagram showing checkpoint data. Checkpoint data is communication process 3
0, the transaction process 31, and the file process 32, and have the same configuration. Moreover, in order to prepare for a failure during writing, checkpoint data is prepared by writing the A side and the B side alternately. The configurations of the A side and the B side are the same.

FIG. 14 shows checkpoint data on the A side of the communication process 30. Checkpoint data of the communication process 30 is provided as follows for each message. Time stamps 240-0A to 247-0A, event code 24
0-1A to 247-1A (described later in FIG. 15), and register contents 240-2A to 247-2A of the processor. In addition, the state 2 of the shared disk 2 that is shared between electronic messages
50-A, the state 251-A of the inter-processor module connection communication path 3, the state 252-A of the business LAN 4, the state 253-A of the control LAN 8 and the time stamp 254-A of the telegram being executed are also stored.

The side B of the checkpoint data has the same contents as the side A, and the time stamps 240-0B to 247-0.
B, event codes 240-1B to 247-1B, processor registers 240-2B to 247-2B, state 250-B of shared disk 2 shared between electronic messages, state 251-B of processor module connection communication path 3, State 252-B of business LAN 4 and state 25 of control LAN 8
3-B and time stamp 254-B of the telegram being executed.

Next, the checkpoint data of the transaction process 31 is the same as that of the communication process 30, except for the business LAN 4 state. That is,
Although not shown in the figure, the A side has time stamps 260-0A to 267-.
0A, event codes 260-1A to 267-1A, processor registers 260-2A to 267-2A, shared disk 2 state 270-A shared between electronic messages, processor module connection communication path 3 state 271-A, It is composed of a state 273-A of the control LAN 4 and a time stamp 274-A of a telegram being executed. The B side of this is the same as the A side.

Finally, with respect to the checkpoint data of the file process 32, although not shown in the figure, like the communication process 30, the A-side shows the time stamp 280-.
0A to 287-0A, event code 280-1A to 2
87-1A, processor registers 280-2A-28
7-2A, state 29 of shared disk 2 shared between electronic messages
0-A, state 2 of processor module connection communication path 3
91-A, the state 293-A of the control LAN 8 and the time stamp 294-A of the telegram being executed. The B side of this is also the same as the A side.

FIG. 15 is a diagram showing event information of a process. I / O event information is shown separately for each process.

First, in the communication process 30, the code of the message transmission 300 to the transaction processor module is (00) 16, and the code of the message transmission 301 to the terminal 6 is (01) 16.

In the transaction process 31, the code of the read I / O request 303 is (10) 16, the code of the write I / O request 304 is (11) 16, and the code of the message transmission 305 to the communication processor module is ( 12) 16

Finally, in the file process 32, the code of the read I / O start 306 is (20) 16, the code of the read I / O completion 307 is (21) 16, and the code of the write I / O start 308 is (22) 16, and the code of the write I / O completion 309 is (23) 16.

FIG. 16 is a diagram showing the state of I / O.
The I / O includes a line controller 11-4, a processor module connection communication path 3, a business LAN 4 and a control LA.
There is N8. For each of them, the normal operation 320 is set to (00) 16 and the failure 321 is set to (01) 16.

14 to 16, checkpoint data 240-0A to 294-A, 240-0B to
Although 294-B has been described, the initial value of these checkpoint data is (FF) 16.

FIG. 17 is a state transition diagram of the processor module. The processor modules 11 to 16 are provided with the following three states 150 to 152.

The active state 150 is a state in which processing is being executed normally. The standby state 151 is the processor module 1
Even if a failure occurs in 1 to 16, the processing can be immediately taken over. The offline state 152 is a state in which the system is disconnected from the system due to a failure or maintenance.

Next, the state transition will be described by taking the active processor module 11 and the standby processor module 12 for executing the backup processing as an example. When a failure occurs in the active state 150, the state transitions to the offline state 152 (state transition 155), and the standby processor module 1
2 transits from the standby state 151 to the active state 150 (state transition 156). When a failure occurs in the standby state 151,
Transition to the offline state 152 (state transition 157).
When the restoration from the offline state 152 is completed, the offline state 152 transits to the standby state 151 (state transition 1
58).

Hereinafter, the communication processor modules 11 and 1
2, transaction processor modules 13, 14
A processing procedure of the file processor modules 15 and 16 is shown.

18 to 20 are diagrams showing the processing procedure of the communication processor module.

FIG. 18 shows a process of receiving a message from the terminals 6-0 and 6-1 and transmitting it to the transaction processor modules 13 and 14. This is
Corresponding to the process 200 of.

The active communication processor module 11 and the standby communication processor module 12 simultaneously receive telegrams from the terminals 6-0 and 6-1 (process 400). When the received electronic message passes through the line, the input queue 10 of the line control devices 11-4 and 12-4.
It is stored in (11-4-5, 12-4-5) (Processing 4
00). Further, when passing through the business LAN 4, the input queue 3 of the business LAN adapters 11-8 and 12-8
0 (11-8-5, 12-8-5).

Here, the line switching device 5 is connected to the terminal 6-0.
The electronic message received via will be described.

At this time, the line control devices 11-4 and 12-4
The processors 11-4-1 and 12-4-1 refer to the timer 7 to add the time stamp 83 to the received message in order to match the received message (process 401). Hereinafter, a case where the line control devices 11-4 and 12-4 receive a telegram will be described.

The active communication processor module 11 takes out a message from the input queue 10 (11-4-5). Then, the active communication process 30-0 transmits a message to the active transaction process 31-0 and the standby transaction process 31-1 (process 402). At this time, the active communication process 30-0 uses the checkpoint data 240-0A to 254-A, 240-0B to 25
4-B is transmitted to the standby processor module 12 (process 403), and the standby processor module 12 receives this (process 404). Checkpoint data 2
40-0A to 254-A and 240-0B to 254-B will be described later in detail with reference to FIG.

In FIG. 19, a message is received from the active transaction processor module 12 and is sent to the terminal 6-.
It is a process until it is transmitted to 0. This is the process 2 of FIG.
This corresponds to 07 and processing 208.

Current transaction process 31-0
When the processing of the transmitted electronic message is completed, transmits the processing result to the active communication processor module 11 and the standby communication processor module 12 (step 410). Then, the active communication process 30-0 transmits the processing result to the terminal 6 (processing 411). At the same time, the active communication process 30-0 checks the checkpoint data 240-0A-
254-A, 240-0B to 254-B are transmitted to the standby processor module 12 (process 412), and the standby processor module 12 receives this (process 413).

FIG. 20 shows the processing until the processing result is transmitted to the terminal 6-0 and the time stamp of the end telegram is transmitted to the other processor modules 12-16.

When the active communication processor module 11 receives the ACK from the terminal 6-0 (process 420), it sends the time stamp of the completed message to the standby processor module 12 (process 421). Then, the active communication processor module 12 executes the following termination processing. This is the input queue 10 (11-4-5) for the completed message.
And from the input queue 20 (11-5-5) (Processing 4
22), the checkpoint data 240 of the completed message
−0A to 254-A and 240-0B to 254-B are initialized (process 423).

On the other hand, the standby communication processor module 1
2 receives the time stamp of the completed message. Then, the following termination processing is executed. In this termination process, the terminated message is deleted from the input queue 10 (12-4-5) and the input queue 20 (12-5-5) (process 424), and the checkpoint data 240-0A to 25-25 of the terminated message is deleted.
4-A, 240-0B to 254-B are initialized (process 425). This termination processing can be performed each time a termination message is received, or can be performed collectively at a fixed cycle by accumulating termination messages.

FIG. 21 is a diagram showing a fault detection method using an alive message.

Active processor modules 11, 13, 1
5 is between the standby processor modules 12, 14 and 16,
A fault is detected by exchanging the alive message 431 as described below and monitoring it.

The processor modules 11 and 12 will be described below as an example. The active processor module 11 transmits an alive message 431 to the standby processor module 12 at regular intervals. Therefore, it is assumed that a failure has occurred in the active processor module 11 (430). The standby processor module 12 receives the last alive message 431 and then (43)
3) If the next alive message 432 is not received, the failure of the active processor module 11 is detected 4
40.

Similarly, the processor module 13,
Faults between 14 and between processor modules 15 and 16 can be detected.

FIG. 22 is a diagram showing a switching processing procedure of the communication processor module.

When a failure occurs in the active processor module 11 (430), the standby processor module 1
2 detects the failure of the active processor module 11 due to the interruption of the alive message (process 440),
The other processor modules 13 to 16 are notified of the failure occurrence (processing 441).

Hereinafter, the processor module 11 in which a failure has occurred is called the old working processor module 11-1, and the processor module 12 that takes over the processing is called the new working processor module 12-1.

New active processor module 12-1
Is the shared IO of the old-used processor module 11-1.
In order to prevent malfunction due to accessing 2 to 8, reset processing is requested (processing 442). The old active processor module 11-1 has its own monitor 11
-20 sets the reset signal 11-30, so that the IOP 11-3, the line control device 11-4, the processor module connection communication path adapter 11-5, the disk control device 11-6, and the control LAN adapter 11-7. And the business LAN adapter 11-8 is reset (step 443). This reset process is performed by referring to FIGS.
It is shown in 0.

New active processor module 12-1
Is capable of transmitting and receiving a telegram to and from the terminal 6-0, and the old and current communication processor module 11-1.
Sets the line switching device 5 so that transmission and reception of a telegram with the terminal 6-0 becomes impossible (step 444).

The new active processor module 1
2-1 interrupts the exchange of the alive message 431 and the transfer of the checkpoint data (process 445, process 4).
46).

Further, the new active communication processor module 12-1 executes the processes 424 and 425 when the message end process is performed at regular intervals (process 44).
7), input queue 10 (12-4-5) and input queue 2
0 (12-5-5) is updated.

Finally, the new active processor module 1
2-1 sets the processor register 240-2A (FIG. 14), which is the checkpoint data, in the processor register and executes the restart instruction. As a result, it is possible to restart from the latest checkpoint, and it becomes possible to send a message to the terminal 6-0 and the transaction processor modules 13 and 14 (process 448).

FIG. 23 is a diagram showing a failure recovery processing procedure of the communication processor module. When the old active communication processor module 11-1 recovers from the failure, it becomes the standby active processor module of the new active communication processor module 12-1. Such failure recovery processing will be described. The old-used processor module 11-1 starts the failure recovery process (process 470), and when this is completed,
The old-current processor module 11-1 notifies the new-current processor module 12-1 of the completion of restoration (process 471).

On the other hand, the new active processor module 12
-1 receives this restoration completion notification (process 472). Then, the new active processor module 12-1 notifies all the other processor modules 13 to 16 of the completion of restoration (process 473). As a result, the old active communication processor module 11-1 can start receiving a message from the active transaction processor module 13 together with the new active processor module 12. further,
The old-used processor module 11-1 is connected to the terminal 6-0 and the line switching device 5 is provided so that the message can be received / transmitted.
Is set (process 474). As a result, the old active communication processor module 11-1 and the new active processor module 12-1 can start receiving a message from the terminal 6-0.

Old working processor module 11-1
Notifies the time stamp of the first received electronic message to the new active processor module 12-1 (process 475). on the other hand,
The new active processor module 12-1 uses the received time stamps to input queue 10 (11-4-5) and input queue 20 (1-4) of the old active processor module 11-1.
1-5-5) have their own input queues 10 (12
-4-5) and the input queue 20 (12-5-5) are determined (step 476).
The process 476 is executed until they match (process 477). Then, the input queue 10 (11-4-5, 12-4-5)
If the contents of the input queue 20 (11-5-5, 12-5-5) match, it is determined that the processing can be taken over, and the new current processor module 12-1 determines that the old current processor module 11-1 -1 is offline 15
From 2 to the standby state 151 (step 478),
The old active processor module 11-1 receives this (process 479), and transits from the offline state 152 to the standby state 151 (process 480).

Finally, the new active communication processor module 12-1 is the old active communication processor module 11-.
Since the redundant operation with 1 is restarted, the exchange of the alive message 431 is started (process 481). Then, the new active communication processor module 12-1 restarts the checkpoint data transfer to the old active communication processor module 11-1 (processes 482 and 483).

24 to 27 are diagrams showing the processing procedure of the transaction processor module.

Here, the input queues 20 (13-5-5, 13-5, 5 of the transaction processor modules 13, 14).
14-5-5), the message received from the active communication processor module 11 is input to the input queue 21 (13-5).
7, 14-5-7) stores the electronic message received from the active file processor module 15.

Further, the output queue 20 (13-5-6, 1
4-5-6) includes communication processor modules 11 and 1
2, the message to be transmitted to the output queue 21 (13-5-8,
14-5-8), the file processor module 1
The electronic message to be transmitted to 5 and 16 is stored.

FIG. 24 is a diagram for receiving a message from the current communication processor module 13 and transmitting a read request to the file processor modules 15 and 16. This corresponds to the processing 202 and the processing 203 in FIG.

The active and standby transaction processor modules 13 and 14 simultaneously receive messages from the active communication processor module 11 and store them in the input queue 20 (13-5-5, 14-5-5), respectively. Process 500). Current transaction process 3
1-1 analyzes the electronic message and executes a predetermined process. Then, the active transaction process 31-1 requests the active file processor module 15 and the standby file processor module 16 to read the file (process 501). At this time, the active transaction process 31-0 checks the checkpoint data 260-
0A to 274-A and 260-0B to 274-B are transmitted to the waiting transaction processor module 14 (process 502). Then, the transaction processor module 14 on standby receives this (process 50).
3).

FIG. 25 is a diagram for receiving a message from the active communication processor module 13 and transmitting a write request to the file processor modules 15 and 16. This also corresponds to the processing 202 and the processing 203 in FIG. 5, and is the same as the processing in FIG. 24 (505 to 508) except that the read request replaces the write request.

FIG. 26 is a diagram for receiving a message from the current file processor module and transmitting the message to the communication processor module. This corresponds to the process 207 of FIG.

The active and standby transaction processor modules 13 and 14 receive a message from the active file processor module 15 (process 510). The active transaction processor module 13
Are the active and standby communication processor modules 11, 12
The processing result is returned to (processing 511). The active transaction processor module 13 uses this time point as a checkpoint and checkspoint data 260-0A ...
274-A, 260-0B to 274-B are transmitted to the standby processor module 14 (process 512). Then, the transaction processor module 14 on standby
Receives this (step 513).

FIG. 27 is a diagram for receiving an end message from the active communication processor module 11 and executing a message end process.

When the active and standby transaction processor modules 13 and 14 respectively receive the time stamp of the end message from the active communication processor module 11,
Input the completed message to the input queue 20 (13-5-5, 14-
5-5) and the input queue 21 (13-5-7, 14-5)
7)) (process 520) and checkpoint data 260-0A to 274-A, 260- of the completed message.
0B to 274-B are initialized (process 521).

This termination processing can be performed each time a termination message is received, or it is possible to accumulate termination messages and collectively perform them at regular intervals.

FIG. 28 is a diagram showing a procedure for switching transaction processor modules.

When a failure occurs in the active processor module 13 (530), the standby processor module 1
4 detects the failure of the active processor module 13 due to the interruption of the alive message 432 (process 54).
0), other processor modules 11-12, 15-1
The failure occurrence is notified to 6 (process 541).

Hereinafter, the faulty processor module 13 will be referred to as the old active processor module 13-1, and the processor module 14 that will take over the processing will be referred to as the new active processor module 14-1.

New active processor module 14-1
Requests a reset process in order to prevent a malfunction of the old-used processor module 13-1 (process 54).
2). In the old-used processor module 13-1, its monitor 13-20 resets the IOP 13-3, the processor module connection communication path adapter 13-5, the disk controller 13-6 and the control LAN adapter 13-7 ( Process 543).

The new active processor module 1
4-1 interrupts the exchange of the alive message 431 and the transfer of the checkpoint data (processes 544 and 54).
5).

Furthermore, when the transaction processor module 14-1 for current use is performing the message termination process at regular intervals, it executes processes 520 and 521 (process 546) and the input queue 20 (14- 5-5) and the input queue 21 (14-5-7) are updated.

Finally, the new active processor module 1
4-1 sets the register 260-2A of the processor, which is the checkpoint data, in the processor register,
Execute a restart instruction. As a result, it is possible to restart from the latest checkpoint, and the communication processor modules 11, 1
2 and the file processor modules 15 and 16 can transmit a message (process 547).

FIG. 29 is a diagram showing a failure recovery processing procedure of the transaction processor module. When the old active transaction processor module 13-1 recovers from the failure, it becomes the standby active processor module of the new active transaction processor module 14-1. This failure recovery process will be described.

Old current processor module 13-1
Starts the failure recovery process (process 570), and when this is completed, notifies the new active processor module 14-1 of the completion of the repair (process 571).

The new active processor module 14-1 receives this restoration completion notice (process 572). The new active processor module 14-1 notifies all the other processor modules 11 to 12 and 15 to 16 of the completion of the repair (process 573). As a result, the old active processor module 13-1 and the new active processor module 14-1 are used together with the active communication processor module 11.
And the reception of the electronic message from the file processor module 15 can be started.

Old current processor module 13-1
Notifies the time stamp of the first received electronic message to the new active processor module 14-1 (process 574). on the other hand,
The new active processor module 14-1 uses the received time stamp to input the input queue 20 (13-5-5) and input queue 21 (1-5) of the old active processor module 13-1.
3-5-7) has their own input queue 20 (14
-5-5) and the input queue 21 (14-5-7) are determined to match (process 575). If they do not match,
The process 575 is executed until they match (process 576). Then, the input queue 20 (13-5-5, 14-5-5)
If the contents of the input queue 21 (13-5-7, 14-5-7) match, it is determined that the processing can be taken over, and the new current processor module 14-1 determines the old current processor module 13 -1 is offline 15
From 2 to the standby state 151 (step 577),
The old active processor module 13-1 receives this (process 578), and transits from the offline state 152 to the standby state 151 (process 579).

Finally, the new active communication processor module 14-1 is the old active communication processor module 13-.
Since the redundant operation with 1 is restarted, the exchange of the alive message 431 is started (process 580). Then, the new active processor module 14-1 restarts the checkpoint data transfer to the old active processor module 13-1 (processes 581 and 582).

30 to 32 are diagrams showing the processing procedure of the file processor module.

Here, the input queue 20 (15-5-
5, 16-5-5), transaction process 3
The message received from 1 is stored. Also, the output queue 20
A message transmitted to the transaction process 31 is stored in (15-5-6, 16-5-6).

FIG. 30 shows a process of receiving a message from the transaction processor module 13 and reading the disk. This corresponds to the process 204 of FIG.

Current file processor module 15
And the standby file processor module 16 simultaneously receive read requests from the active transaction processor module 13 and input queue 20 (15
-5-5, 16-5-5) (process 600).

Then, the active file processor module 15 takes out the electronic message from the input queue 20 (15-5-5) and starts a read request (process 601).
At this time, the current file process 32-0 checks the checkpoint data 280-0A to 294-A, 280-0.
B-294-B is transmitted to the standby processor module 16 (process 602), and the standby processor module 16 receives this (process 605).

Then, the active file processor module 15 completes the read request (process 603).
At this time, the current file process 32-0 checks the checkpoint data 280-0A to 294-A, 280-0.
B to 294-B are transmitted to the standby processor module 14 (process 604). The standby processor module 14 receives this (operation 606). Then, the processing result is used as the active and standby transaction processor modules 1
It is transmitted to 3 and 14 (process 605).

FIG. 31 shows a process of receiving a message from the transaction processor module 13 and performing a writing process. This corresponds to the process 205 in FIG. The details of this process are shown in FIG.
This is similar to the processing of 0.

FIG. 32 is a diagram for receiving an end message from the active communication processor module and executing a message end process.

When the active and standby file processor modules 15 and 16 respectively receive the time stamps of the end message, the completed message is input to the input queue 20 (15-5-5, 1).
6-5-5) (process 620), checkpoint data 280-0A to 294-A of the completed message,
280-0B to 294-B are initialized (process 62)
1). As described above, this termination process may be performed every fixed period or each time a termination message is received.

FIG. 33 is a diagram showing a procedure for switching the file processor module.

When a failure occurs in the active processor module 15 (630), the standby processor module 1
6 detects the failure of the active processor module 15 due to the interruption of the alive message 432 (process 64).
0), and notifies the other processor modules 11 to 14 of the occurrence of a failure (process 641).

Hereinafter, the processor module 15 in which a failure has occurred will be referred to as the old active processor module 15-1, and the processor module 16 that will take over the processing will be referred to as the new active processor module 16-1.

New active processor module 16-1
Requests a reset process in order to prevent a malfunction of the old-used processor module 15-1 (process 64).
2). In the old-used processor module 15-1, its own monitor 15-20 resets the IOP 15-3, the processor module connection communication path adapter 15-5, the disk controller 15-6, and the control LAN adapter 15-7 ( Process 643).

The new active processor module 1
6-1 interrupts the exchange of the alive message 431 and the checkpoint data transfer (processes 644, 64).
5).

Further, the file processor module 16-1 for current use executes the processes 620 and 621 (process 6 when the process of terminating the electronic message is being carried out at regular intervals.
46), and the input queue 20 (16-5-5) is updated.

Finally, the new active processor module 1
6-1 sets the register 240-2A of the processor, which is the checkpoint data, in the processor register,
Execute a restart instruction. As a result, it is possible to restart from the latest checkpoint, and it becomes possible to send a message to the transaction processor modules 13 and 14 (process 64).
7).

FIG. 34 is a diagram showing a failure recovery processing procedure of the file processor module. When the old-used file processor module 15-1 recovers from the failure,
The failure recovery process in which the old current file processor module 15-1 becomes the standby processor module of the new current file processor module 16-1 will be described.

The old-current processor module 15-1 starts the failure recovery process (process 670), and when this is completed, the old-current processor module 15-1 notifies the new-current processor module 16-1 of the completion of repair. (Process 671).

On the other hand, the new active processor module 16
-1 receives this restoration completion notification (process 672). The new active processor module 16-1 notifies all other processor modules 11 to 14 of the completion of repair (processing 673). As a result, the old-current processor module 13-1 becomes the new-current processor module 14
It is possible to start receiving a message from the active communication processor module 11 and the file processor module 15 together with -1.

Old-used processor module 15-1
Notifies the time stamp of the first received electronic message to the new active processor module 16-1 (process 674). on the other hand,
The new active processor module 16-1 determines that the input queue 20 (15-5-5) of the old active processor module 15-1 matches its own input queue 2016-5-5 according to the received time stamp. It is determined whether or not (Process 67
5) If they do not match, the process 675 is executed until they match (process 676). Then, the input queue 20 (1
If the contents of (5-5-5, 16-5-5) are the same, it is determined that the processing can be taken over, and the new current processor module 16-1 becomes the old current processor module 15-.
1 is notified of the transition from the offline state 152 to the standby state 151 (process 677), the old active processor module 15-1 receives this (process 678), and transitions from the offline state 152 to the standby state 151 (process). 67
9).

Finally, since the processor module 16-1 of the new active transaction process restarts the duplex operation with the processor module 15-1 of the old active communication process, the exchange of the alive message 431 is started (process 680). . The new active processor module 16-1 is the old active processor module 15
The checkpoint data transfer to -1 is restarted (processes 681 and 682).

Up to this point, the fault recovery procedure of one message processing has been described for each of the processes 30 to 32. However, in reality, many electronic messages can exist in the system at the same time. FIG. 35 is a diagram illustrating a processing procedure of a plurality of message processings. In explaining this figure, reference is made to FIGS.

FIG. 36 shows the checkpoint data of the communication process, FIGS. 38 and 39 show the checkpoint data of the transaction process, and FIGS. 40 to 42 show the checkpoint data of the file process. In all the processes 30 to 32, the areas for storing the checkpoint data are provided with the A side and the B side and are written alternately.
Therefore, checkpoint 1 (hereinafter referred to as CP1), checkpoint 3 (hereinafter referred to as CP3) and checkpoint 5 (hereinafter referred to as CP5) are stored on the A side, and checkpoint 2 (hereinafter referred to as CP2) and checkpoint 4 (hereinafter referred to as CPpoint). ,
CP4) and checkpoint 6 (hereinafter referred to as CP6) are stored on the B side.

A case where three electronic messages (electronic message 1 to electronic message 3) are executed will be described below with reference to FIGS. 35 to 42.

First, the active and standby communication processor modules 11 and 12 are respectively connected to the line control devices 11-4 and 11-4.
When the message 12-4 is received, the time stamp 83 is added to the message by referring to the timer 7. In this embodiment, the time stamps of message 1 to message 3 are (01) 16, (02) 16 and (03) 16, respectively.

The current communication processor module 11 is
The input queue 10 of the line control device 11-4 (11-4-
The telegram 1 is extracted from 5) (process 700). Then, the active communication processor module 11 transmits the electronic message 1 to the active and standby transaction processor modules 13 and 14 (process 701). At this time, the active communication process 30-0 transfers the checkpoint data 240-0A to 254-A to the standby communication processor module 12 with checkpoint CP1 at the time of transmitting a message to the transaction processor module.

Communication process 3 shown in FIGS. 36 and 37
In the checkpoint data in CP1 of 0,
In the active communication process 30-0, the checkpoint data 240-0A to 254-A are set as follows.

The time stamp 240-0A of telegram 1 is (01) 16.
Since the event code 240-1A is a message transmission to the transaction processor module, (00)
Set to 16. Also, the processor register 240-2
Although A is the value of the processor register at the time of checkpoint, it is (00) 16 here. In the present embodiment, the processor register is set to (00) 16 when it is being executed, and is set to (01) 16 when it is in the waiting state.

Since the electronic message 2 and the electronic message 3 have not been received yet, these checkpoint data have the initial value (F
F) 16

Further, the shared disk 2, the processor module connection communication path 3, the business LAN 4 and the control LA
All N8 states are assumed to be operating normally,
Set it to (00) 16. After that, it is assumed that no failure occurs in the shared disk 2, the inter-processor module connection communication path 3, the business LAN 4 and the control LAN 8, and it is always (00) 16.

Since the telegram being executed at the time of the checkpoint is telegram 1, (01) 16 is set in the time stamp 254-A of the telegram being executed.

Next, the active and standby transaction processor modules 13 and 14 receive the telegram 1 from the active communication processor module 11. Then, the active transaction processor module 13 takes out the electronic message 1 from the input queue 20 (13-5-5) of the inter-processor module connection communication path adapter 13-5 (process 730). And the current transaction process 3
1-0 executes a predetermined process, and then performs read I / O.
File processor module 1 for active and standby O requests
5 and 16 (process 731). The active transaction process 31-0 transfers the checkpoint data 260-0A to 274-A to the standby transaction process 31-1 with CP1 at this point.

The CP of the transaction process is shown in FIG.
1 shows checkpoint data of 1. In CP1, the time stamp 260-0 of message 1 is used as checkpoint data.
In A, the time stamp of message 1 is (01) 16, so (0
1) 16 and event code 260-1A read I /
Since it is an O request, (10) 16 is set. Further, since the electronic message being executed at the time of the checkpoint is the electronic message 1, the time stamp 274-A of the electronic message being executed is set to (01) 16.

Further, the current file processor module 15 retrieves the read I / O request of the telegram 1 from the input queue 20 (15-5-5) of the inter-processor module connection communication path adapter 15-5 (process 760), Read I / O is started (process 761). At this time, the current file process 32-0 transfers the checkpoint data 280-0A to 294-A with the read I / O request as a checkpoint.

FIG. 40 shows the checkpoint data of CP1 of the file process. In CP1, since the time stamp of message 1 is (01) 16, the time stamp 280- of message 1
(01) 16 for 0A and event code 280-1A
Is a read I / O request, so (20) 16 is set. The message that was being executed at the time of checkpoint is message 1
Therefore, the time stamp 294-A of the message being executed is
(01) 16 is set. Current file process 31-
0 sets CP1 at this time and transfers the checkpoint data 280-0A to 294-A to the standby file processor module 16.

Then, the current file processor module 15 executes read I / O, and this read I / O is executed.
When O is completed (process 762), this time is designated as CP2, and the active file processor module 15 transmits the read result to the active and standby transaction processor modules 13 and 14.

FIG. 40 shows the checkpoint data of CP2 of the file process. This checkpoint data is written on the B side. In the CP2 checkpoint data, the time stamp of the message 1 is (01) 16, so the time stamp 280-0B of the message 1 is (01) 16, and the event code 280-1B is read I / O completion. For,
(21) Set to 16. Since the message that was being executed at the time of checkpoint is message 1, the time stamp 2 of the message that is being executed
(01) 16 is set in 94-B.

Further, the active communication processor module 11 retrieves the telegram 2 from the input queue 10 (11-4-5) of the line control device 11-4, like the telegram 1 (process 702), and uses the active and standby transactions. A message is transmitted to the processor modules 13 and 14 (process 703).
In the current communication process 30-0, CP2 is set when the message is transmitted.
Checkpoint data 240-0B to 254
-B is transferred to the standby communication processor module 12.

FIG. 36 shows CP2 checkpoint data of the communication process. This checkpoint data 2
40-0B to 254-B are written on the B side. In the checkpoint data of CP2, the time stamp of message 2 is (02)
Since it is 16, the time stamp 241-0A of the telegram 2 has (0
2) Set 16. Since the event code 240-1B is a message transmission to the transaction processor module, (00) 16 is set. Since the telegram being executed at the time of the checkpoint is telegram 2, (02) 16 is set in the time stamp 254-B of the telegram being executed.

The active and standby transaction processor modules 13 and 14 are the communication processor module 1
1 receives the message 2 and the active transaction processor module 13 receives the message 2 from the input queue 20 (13-5) of the inter-processor module connection communication path adapter 13-5.
The electronic message 2 is extracted from 5) (process 732). Then, the read I / O is requested to the active and standby file processor modules 15 and 16 (process 733). CP2 is set at this point, and checkpoint data 260-0B to 2
74-B to the waiting transaction processor module 14.

The CP of the transaction process is shown in FIG.
2 shows checkpoint data. The checkpoint data 260-0B to 274-B of message 2 is written on the B side. Since the time stamp of message 2 is (02) 16, message 2
The time stamp 261-0A is set to (02) 16, and the event code 260-1B is set to (10) 16 because the message is transmitted to the transaction processor module. Since the telegram being executed at the time of the checkpoint is the telegram 2, (02) 16 is set in the time stamp 264-B of the telegram being executed.

On the other hand, the active file processor module 15 fetches the read I / O request of the telegram 2 (process 763) and starts the read I / O (process 76).
4). This point is designated as CP3.

FIG. 41 shows CP3 checkpoint data of the file process. In CP3, the time stamp of message 2 is (02) 16, so the time stamp 281-0 of message 2
(02) 16 for event code 280-1A
Is a read I / O request, so (20) 16 is set. Finally, since the telegram being executed at the time of the checkpoint is telegram 2, the time stamp 294-A of the telegram being executed is displayed.
Is set to (02) 16.

Here, it is assumed that a failure occurs in the active file processor module 15 (770). And
The standby processor module 16 detects the failure of the active processor module 15, and the standby file processor module 16 executes the switching process (process 771).

The waiting file process 32-1 restarts from the latest checkpoint CP3. Therefore, the process is restarted from the read I / O request of the electronic message 2 of CP3 (process 772).

From FIG. 41, in the checkpoint data 280-0A to 294-A of CP3, the telegram being executed is the telegram 2. New current file processor module 1
5-1 restarts the read I / O of the electronic message 2 from CP3.

Thereafter, the new active file processor module 16-1 checks the checkpoint data 280-0A to 294-A, 280 if the failed file processor module 15-1 has recovered from the failure.
-0B to 294-B are transferred to the old-used file processor module 15-1.

Here, it is assumed that the failed file processor module 15-1 has not recovered from the failure. However, only the checkpoint data to be acquired is shown.

Hereinafter, the communication processor modules 13, 1
4 and transaction processor module 15,
16 also performs the same processing.

Then, the new active file processor module 16-1 completes the read I / O (process 7).
73). This time point is designated as CP4.

FIG. 41 shows the checkpoint data of CP4 of the file process. In CP4, since the time stamp of message 1 is (02) 16, the time stamp 281-0 of message 2 is shown.
(02) 16 for B and the event code 280-1B is
Since the read I / O is completed, (21) 16 is set. Since the telegram being executed at the time of the checkpoint is telegram 2, the time stamp 274-B of the telegram being executed is (0
2) Set 16.

Regarding the telegram 3, the active communication processor module 11 takes out the telegram 3 from the input queue 10 (11-4-5) of the line control device 11-4 similarly to the telegram 1 and the telegram 2 (process 704). . Here, it is assumed that a failure occurs in the active communication processor module 11 (7
10). The standby communication processor module 12 detects a failure of the active communication processor module 11, and the standby processor module 12 (hereinafter, the new active communication processor module 12-1) executes the switching process (process 711).

New-use communication processor module 12-
1 restarts from the latest checkpoint, CP2. Therefore, the new active communication process 30-1-1 is
The transmission from the message 2 of CP2 to the transaction process 31 is restarted (process 712).

Here, the active transaction processor module 13 receives the electronic message 2 twice (processes 703 and 712), but the same electronic message is discarded the second time to eliminate the contradiction.

The active communication processor module 11 is
The input queue 10 of the line control device 11-4 (11-4-
The electronic message 3 is extracted from 5) (process 713). Then, the input queue 10 (11-4-5) of the line controller 11-4
Sends the message 3 to the active and standby transaction processor modules 13 and 14 (process 714). This point is designated as CP3 of the communication process.

FIG. 37 shows checkpoint data of CP3 in the communication process. Checkpoint data 240
-0A to 254-A are set as follows. Message 3
Since the time stamp of (03) 16, the time stamp 24 of message 3
(03) 16 in 2-0A and event code 242-1
Since A is a message transmission to the transaction process, it is set to (00) 16. Since the telegram being executed at the time of the checkpoint is the telegram 3, (03) 16 is set in the time stamp 254-A of the telegram being executed.

The active transaction processor module 13 first receives the completion of reading the message 2 from the active file processor module 15. Therefore, the transaction processor module 13
The write I / O of message 3 is requested to the new active file processor module 16-1 (process 734). This point is designated as CP3. Checkpoint data 240-0
A to 254-A is a waiting transaction process 3
Transfer to 1-0.

FIG. 39 shows the checkpoint data of CP3 of the transaction process. The checkpoint data 260-0A to 274-A are set as follows. Since the time stamp of message 1 is (01) 16, the time stamp 260-0A of message 1 is (01) 16, and the event code 260-1A is a write I / O request, so (11) 16 Set. Finally, since the electronic message being executed at the time of checkpoint is the electronic message 1, (01) 16 is set to the time stamp 274-A of the electronic message being executed.

Further, the new active file processor module 16-1 takes out the write I / O request of the telegram 1 (process 774) and starts the write I / O (process 775). This is designated as CP5.

FIG. 42 shows CP5 checkpoint data of the file process. In CP5, the time stamp of message 1 is (01) 16, so the time stamp 280-0 of message 1
(01) 16 for A and event code 280-1A for
Since it is a write I / O request, (22) 16 is set. Since the telegram being executed at the time of the checkpoint is telegram 1, the time stamp 294-A of the telegram being executed is (0
1) Set 16

New active file processor module 1
The 6-1 executes the write I / O, and when the write I / O is completed, it notifies the active and standby transaction processor modules 13 and 14 of the write I / O completion. Check this as CP6 and checkpoint data 280
-0B to 294-B are acquired as follows.

FIG. 42 shows CP6 checkpoint data of the file process. In CP6, the time stamp of message 1 is (01) 16, so the time stamp 280-0 of message 1
(01) 16 for B and the event code 240-1B is
Since the write I / O is completed, (23) 16 is set. Since the telegram being executed at the time of the checkpoint is telegram 1, the time stamp 274-B of the telegram being executed is (0
1) Set 16

On the other hand, before receiving the notification of the write I / O completion, the active transaction processor module 13 has a failure (740) and cannot receive the write I / O completion. However, the transaction processor module 13 on standby waits for write I / O.
Completion has been received. As a result, the standby transaction processor module 14 does not need to request the new active file processor module 16-1 again for write I / O completion, and the system recovery time can be shortened.

The standby processor module 14
Detects a fault in the active processor module 13,
The switching process is executed (process 741).

Waiting transaction process 31-1
Restarts from the latest checkpoint, CP3, so that the new active file processor module 16-1
To write I / O (step 742). However, the new active file processor module 16-1
Will receive the same electronic message twice (process 73
4, 742) Discard the contradiction by discarding the second time.

Since the new active transaction processor module 14-1 receives the write I / O completion during the switching process, it executes a predetermined message processing and outputs the processing result to the new active communication processor module. 12-1 (process 743). This is designated as CP4, and the checkpoint data 260- to be acquired here
0B to 274-B are shown below.

FIG. 39 shows the CP of the transaction process.
4 shows checkpoint data of No. 4. In CP4, the time stamp of message 1 is (01) 16, so the time stamp 2 of message 1
(01) 16 in 60-0B and event code 260-
Since 1B is a write I / O request, (12) 16 is set. Finally, since the telegram being executed at the time of the checkpoint is the telegram 1, the time stamp 274-of the telegram being executed.
(01) 16 is set to B.

Here, the checkpoint data 260
Although −0B to 274-B are shown, it is not necessary to acquire the checkpoint data until the faulty processor module 13 is repaired from the fault and is in a standby state.
Here, the checkpoint data to be acquired is shown.

Finally, the new active communication processor module 12-1 transmits the message received from the new active transaction processor module 14-1 to the terminal 6-0 (process 715). Get checkpoint data as follows.

FIG. 37 shows CP4 checkpoint data of the communication process. Checkpoint data is set as follows. Since the time stamp of message 1 is (01) 16, the time stamp 240-0B of message 1 is (01) 16.
Since the event code 240-1B is a message transmission to the terminal 6-0, (01) 16 is set. Since the telegram being executed at the time of the checkpoint is the telegram 1, (01) 16 is set in the time stamp 254-B of the telegram being executed.

Then, the new active communication processor module 12-1 waits for an ACK. Terminal 6-0 to AC
K is received (process 716), the termination process of message 1 is performed,
Checkpoint data 240-0A to 242 of message 1
-0A and 240-0B to 242-0B are initialized (process 717). The termination process is to delete the terminated message 1 from the input queue 10 (12-4-5) and initialize the checkpoint data regarding the message 1.

New-use communication processor module 12-
1 is a new active transaction processor module 14-1 and a new active file processor module 16
-1 is notified of the end of message 1 (steps 720, 721),
New-use transaction processor module 14-
1 and the file processor module 16-1 for current use
Input queue 10 for message 1 for message 1 respectively
(12-4-5), and checkpoint data 260-0A to 262-0A, 260- for message 1
0B to 262-0B, 280-0A to 282-0A, 2
80-0B to 282-0B are initialized (process 722.
723).

As another embodiment, it is possible to connect all the processor modules 11 to 16 by a bus and to provide a shared memory 9 which can be shared by all the processor modules 11 to 16. FIG. 42 is a system configuration diagram of such a shared memory system. This shared memory 9 has a dual configuration, and the checkpoint data 240-0A to 294-A, 240-0B to the shared memory 9 are shared.
294-B is stored. Such an implementation method is also possible.

The case where the process is divided into the three processes 30 to 32 has been described above. However, it is possible to expand the applicable range by dividing the process into an arbitrary number and carrying out inter-process communication in active and standby.

[0189]

According to the present invention, in a system including a plurality of processor modules, the processing capacity of the system can be improved and the system recovery time when a failure occurs can be shortened.

[Brief description of drawings]

FIG. 1 is a system configuration diagram of an embodiment according to the present invention.

FIG. 2 is a configuration diagram of a processor module.

FIG. 3 is an explanatory diagram showing a software configuration and functional division of message processing.

FIG. 4 is an explanatory diagram showing an outline of message processing.

FIG. 5 is an explanatory diagram showing an outline of the operation of the embodiment.

FIG. 6 is a configuration diagram of a line control device.

FIG. 7 is a configuration diagram of a processor module connection communication adapter.

FIG. 8 is a configuration diagram of a disk control device.

FIG. 9 is a configuration diagram of a control LAN adapter.

FIG. 10 is a configuration diagram of a business LAN adapter.

FIG. 11 is a configuration diagram of a line switching device.

FIG. 12 is an explanatory diagram showing a message format in communication between processor modules.

FIG. 13 is an explanatory diagram showing addresses of processor modules.

FIG. 14 is an explanatory diagram showing checkpoint data.

FIG. 15 is an explanatory diagram showing event information of a process.

FIG. 16 is an explanatory diagram showing I / O states.

FIG. 17 is a state transition diagram of a processor module.

FIG. 18 is a flowchart showing a processing procedure of the communication processor module.

FIG. 19 is a flowchart showing a processing procedure of the communication processor module.

FIG. 20 is a flowchart showing a processing procedure of the communication processor module.

FIG. 21 is an explanatory diagram showing a failure detection method using an alive message.

FIG. 22 is a flowchart showing a procedure for switching communication processor modules.

FIG. 23 is a flowchart showing a procedure of a failure recovery processing of the communication processor module.

FIG. 24 is a flowchart showing a processing procedure of a transaction processor module.

FIG. 25 is a flowchart showing a processing procedure of a transaction processor module.

FIG. 26 is a flowchart showing a processing procedure of a transaction processor module.

FIG. 27 is a flowchart showing a processing procedure of a transaction processor module.

FIG. 28 is a flowchart showing a procedure of a transaction processor module switching process.

FIG. 29 is a flow chart showing a procedure for failure recovery processing of a transaction processor module.

FIG. 30 is a flowchart showing a processing procedure of a file processor module.

FIG. 31 is a flowchart showing a processing procedure of the file processor module.

FIG. 32 is a flowchart showing a processing procedure of the file processor module.

FIG. 33 is a flowchart showing a procedure for switching file processor modules.

FIG. 34 is a flowchart showing a procedure of a failure recovery processing of the file processor module.

FIG. 35 is an explanatory diagram showing a processing procedure of a plurality of message processings.

FIG. 36 is an explanatory diagram showing checkpoint data of a communication process.

FIG. 37 is an explanatory diagram showing checkpoint data of a communication process.

FIG. 38 is an explanatory diagram showing checkpoint data of a transaction process.

FIG. 39 is an explanatory diagram showing checkpoint data of a transaction process.

FIG. 40 is an explanatory diagram showing checkpoint data of a file process.

FIG. 41 is an explanatory diagram showing checkpoint data of a file process.

FIG. 42 is an explanatory diagram showing checkpoint data of a file process.

FIG. 43 is a system configuration diagram of another embodiment adopting the shared memory system.

[Explanation of symbols]

2 ... Shared disk, 3 ... Processor module connection communication path, 4 ... Business LAN, 5 ... Line switching device, 6 ... Terminal, 7 ... Timer, 8 ... Control LAN, 11-16 ... Processor module, 30 ... Communication Process, 31 ... Transaction process, 32 ... File process

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location G06F 15/163

Claims (20)

[Claims] 1. A cluster type computer system comprising a plurality of processor modules each including at least a processor, a memory, and an input / output processor for controlling input / output (IO), wherein the plurality of processor modules are communicably connected to each other. The function of message processing for a message transmitted / received between the plurality of processor modules is divided into a plurality of functions, and an active processor module and a standby processor module are provided for each function, and an active processor module and a standby processor are provided for each function. A cluster computer system characterized by switching modules to hot standby. 2. The cluster computer according to claim 1, wherein when the active processor module transmits a message to a processor module having another function, the active processor module transmits a message to both the active and standby processor modules. system. 3. The system according to claim 1 or 2, wherein the active processor module uses IO check including at least message transmission, message reception, access to a disk device, and message transmission to another processor module as a checkpoint. A cluster computer system characterized in that these IO access factors, identifiers of telegrams being executed, and shared IO states are transmitted to corresponding standby processor modules as checkpoint data. 4. The system according to claim 1, 2 or 3, wherein each processor module has an input queue for storing a received electronic message, and when the standby processor module detects a failure of the active processor module, the active processor module. Is set to the offline state, the self is set to a new active state, the message that has been processed is deleted from the input queue, and the process is restarted from the latest checkpoint using the checkpoint data that has already been received. A cluster computer system. 5. The system according to claim 4, wherein the message processing function is divided into a communication function, a file function, and a transaction function, and an active process and a standby process are provided for these functions, and they are different from each other. A cluster computer system characterized by being installed in a processor module. 6. The system according to claim 5, wherein a processor module equipped with a communication process (hereinafter referred to as a communication processor module) is connected to a line switching device, and an active communication processor module and a standby communication processor module are respectively provided. A cluster-type computer system characterized by receiving messages from terminals at the same time. 7. The system according to claim 6, wherein the active and standby communication processor modules are connected to a terminal by a LAN, and the terminal sends a message to both the active communication processor module and the standby communication processor module. A cluster computer system characterized by transmitting. 8. The system according to claim 5, further comprising a timer for measuring time, said timer being connected to said active and standby communication processor modules, both communication processor modules transmitting a message. A cluster computer system characterized by adding a time stamp to a received electronic message for identification. 9. The system according to claim 5, wherein the active communication processor module sends a message received from a terminal to a processor module equipped with a transaction process (hereinafter, transaction processor module). Is transmitted to both the active transaction processor module and the standby transaction processor module. 10. The system according to claim 5, wherein the active transaction processor module is a processor equipped with a file process when reading or writing the disk device in accordance with the electronic message processing. When the disk device access request to the module (hereinafter, file processor module) is requested,
A cluster computer system characterized in that an access request of the disk device is transmitted to both the processor module of the active file processor module and the standby file processor module. 11. The system according to claim 10, wherein the active file processor module reads or writes the disk and sends the result to both the active transaction processor module and the standby transaction processor module. Cluster type computer system. 12. The system according to claim 11, wherein the active transaction processor module transmits the message processing result to both the active communication processor module and the standby communication processor module when transmitting the processing result to the communication processor module. Characteristic cluster computer system. 13. The system according to any one of claims 1 to 12, wherein, in the processor modules divided by function, the active processor module is in a normal state with respect to the corresponding standby processor module at regular intervals. A cluster computer system characterized by detecting a failure of the active processor module by transmitting an alive message indicating that the standby processor module monitors the alive message. 14. The system according to any one of claims 5 to 13, wherein the communication processor module causes all of the other processor modules to perform processing after message processing is completed.
A cluster computer system characterized by notifying the end of message processing. 15. The system according to any one of claims 4 to 14, wherein the processor module, which has completed the message processing, deletes the completed message from the input queue every time the message is completed, and checks the completed message. A cluster type computer system characterized by initializing point data. 16. The system according to any one of claims 4 to 14, wherein the processor module, which has completed the electronic message processing, deletes the completed electronic message from the input queue and initializes the checkpoint data regarding the completed electronic message. A cluster type computer system characterized by the following: 17. The system according to claim 5, wherein when the communication processor module in which a failure has occurred recovers from the failure, the recovered processor module starts receiving a message from a terminal and a transaction processor module. Then, for each received message, notify the normal communication processor module of the time stamp of the first message, and the normal communication processor module refers to the time stamp of the first message above and completes the previous message processing. If so, it is determined that the contents of the input queue of the recovered processor module and the input queue of the normal processor module match each other, and the recovered processor module is notified of the transition from the offline state to the standby state. Cluster computer system. 18. The system according to claim 5, wherein when the transaction processor module in which a failure has occurred recovers from the failure, the recovered processor module receives a message from the communication processor module and the file processor module. For each received message, notify the normal transaction processor module of the time stamp of the first message, and the normal transaction processor module refers to the time stamp of the first message above and processes the previous message. If it is completed, it is determined that the contents of the input queue of the recovered processor module and the input queue of the normal processor module match, and the recovered processor module is notified of the transition from the offline state to the standby state. To Raster type computer system. 19. The system according to claim 5, wherein when the failed file processor module recovers from the failure, the recovered processor module starts receiving a message from the transaction processor module. The time stamp of the first message is sent to the normal processor module, and the normal file processor module refers to the time stamp of the first message above, and if the previous message processing is completed, the recovered file processor module is restored. A cluster computer system characterized by determining that the contents of the input queue of the normal processor module and the contents of the input queue of the normal processor module match, and notifying the recovered processor module of the transition from the offline state to the standby state. 20. The cluster computer system according to claim 3, further comprising a shared memory shared by all the processor modules, and storing the checkpoint data in the shared memory. .