JPH08278909A - System and method for high reliability - Google Patents

Abstract

PURPOSE: To reduce the influence range of a transaction process in a fault processing and to make the reliability of the whole module high by providing a main memory fault informing means and a central processing means. CONSTITUTION: The module 2 performs a transaction process for itself at a <=50% use rate of a processor 4, and restores the data base 13 of a module 1 and then performs a transaction processing for the module 1 at the remaining >50% use rate. Thus, processors 3 and 4 are put in partial charge of the transaction process at a <=50% processor use rate, half and half, so that even if a fault occurs to one processor, the other processor can back up it. Even while one module becomes faulty and its data base is restored, the transaction process of the normal module is not affected, so the influence on the whole transaction process is small.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention backs up transaction processing for a failed module without affecting the transaction processing even if one of the two modules fails, so that the system The present invention relates to a high reliability system and a high reliability method capable of making a system economical while ensuring high reliability.

[0002]

2. Description of the Related Art Online real-time processing means that each time data is generated, it is input from a terminal on the spot, input to a computer system through a communication line and immediately processed.
This is a processing method of responding the result to a terminal or the like. The online real-time system is used in banking systems in banks, seat reservation systems for trains, and the like.
A transaction is a unit that requests processing from a terminal or the like to a computer system in an online real-time system. Conventionally, as a high reliability method of transaction processing, two processors have been used.
A method in which one processor is used to process all transactions (hereinafter, this processor is referred to as an act processor), and the remaining one is used as a standby (hereinafter, this processor is referred to as a standby processor) Is generally adopted. With this method, when the act processor fails, the standby processor reads the checkpoint database and log information from the semiconductor file device, restores the database at the time when the act processor failed, and uses this information to perform transaction processing. To resume. However,
There is a problem that all transaction processes are suspended during the restart process. Also, with this method, the function of the entire system (node) will stop in the event of a large-scale disaster such as an earthquake or water damage. Even in such a case, in order to continue the transaction processing, it is necessary to install a spare processor at the remote location. There is a problem that the equipment cost for high reliability becomes enormous because only one processor actually operates for transaction processing while installing four processors.

FIG. 8 is a connection configuration diagram of a backup system using an act-standby processor in a conventional node. In FIG. 8, 1 and 2 are processors, 3 is a semiconductor file device, 4 is a communication control unit (CCU), 5
Reference numerals 5 and 56 denote processors 1 and 2 and communication control device 4, respectively.
Signal lines 57 and 58 connecting the processors 1 and 2 to the semiconductor file device 3, respectively.
Is a signal line connecting the processor 1 and the processor 2, 60
Is a communication line to which a transaction is sent. It is assumed that one processor 1 performs transaction processing as an act processor, and the other processor 2 stands by as a standby processor. Communication line 6
The transaction input from 0 is received by the communication control device 4 and input to the processor 1 via the signal line 55. The processor 1 has a database in the main memory, performs transaction processing according to the contents of this database, and updates the database. When the database is updated, the address and update data in the database are used as log information in the signal line 57.
Write to the semiconductor file device 3 via. Further, the response to the transaction is sent to the communication control device 4 via the signal line 55. In this way, the communication line 6
Transactions sent via 0 are processed. The processor 1 stores the database on the main memory in the semiconductor file device 3 as checkpoint information at a predetermined cycle.

FIG. 9 is a connection configuration diagram for explaining a conventional inter-node backup method. In FIG. 9, 1
000 is a node at a point A (for example, Tokyo), and 2000 is a backup node installed at a point B (for example, Osaka). The points A and B are located at remote places, and if the node 1000 as a whole fails at the point A due to a disaster such as an earthquake or water damage, the point B can be backed up. It should be noted that 1 to 10 in the node 1000 are the same as those in FIG. 8 and 101 to 110 in the node 2000.
Are the same as 1 to 10 in FIG. 3000
Are the communication control device 4 and the node 200 in the node 1000.
It is a signal line for connecting to the communication control device 104 in 0.
The processor 1 in the node 1000 performs transaction processing as an act processor, and the processor 2 as a standby processor stands by to back up transaction processing when the processor 1 fails. The processor 101 of the node 2000 has a database of the processor 1 in the main memory and does not perform transaction processing.
From the signal line 55, the communication control device 4, the communication line 3000,
The database in the main memory is updated by the log information of the database update sent via the communication control device 104 and the signal line 405, and the log information is also written in the semiconductor file device 103 via the signal line 407. In addition, the semiconductor file device 10 uses the database on the main memory as checkpoint information at a predetermined cycle.
Write to 3. If the processor 101 fails, the processor 102 stands by to back it up.

[0005]

As described above, conventionally, the intra-node backup method shown in FIG. 8 and the inter-node backup method shown in FIG. 9 have been adopted. However, the backup methods of FIGS. 8 and 9 have the following problems. That is, in FIG. 8, when the processor 1 fails, the standby processor 2 restarts the processing, so the processor 1 notifies the standby processor 2 via the signal line 59 of the failure. The processor 2 receiving this notification reads the checkpoint database from the semiconductor file device 3 onto the main memory, and then overwrites the update contents of the database from the checkpoint time point with the log information. As a result, the database at the time of the failure of the processor 1 is restored in the main memory of the processor 2. When the database restoration is completed, the processor 2 sends the communication control device 4 via the signal line 56.
To notify. The communication control device 4 sends the sent transaction to the processor 2 via the signal line 56, and the processor 2 restarts the transaction processing.
This method has a problem that all transaction processing is suspended while the processor 2 is performing the restart processing.

Next, in FIG. 9, when a large-scale disaster occurs at the node 1000 and transaction processing becomes impossible, the communication line 6 is not shown.
A failure is detected by a management node connected to 0, 110 and monitoring whether these nodes are normal, and notifies the transaction sender that the node 1000 has a failure. After that, the transaction is communication line 4
Sent to the node 2000 via the processor 10
1 is processed. However, in order to enable transaction processing even in the event of such a large-scale disaster, the process shown in FIG.
As shown in (4), only one processor actually operates for transaction processing while four processors are installed, and there is a problem that the facility cost burden for high reliability becomes extremely large. .

An object of the present invention is to solve such a conventional problem, to minimize the influence range in transaction processing during failure processing, and to improve the reliability of the module as a whole. It is an object of the present invention to provide a highly reliable system and method capable of sharing a margin of a processor usage rate for backup of nodes at two different points.

[0008]

In order to achieve the above object, a high reliability system according to the present invention uses two databases each including a processor and a semiconductor file device accessed by the processor. In a highly reliable information processing system that performs transaction processing using
The main memory that stores the database allocated to each module so that it becomes 0% or less, and each module failed, and when it was found that recovery could not be performed by itself, other modules should be notified to that effect. When the failure notification means for notifying and the notification by the failure notification means,
Each module mutually accesses the semiconductor file device of another module to read the database at the checkpoint time into the main memory, read the log information after the checkpoint time, and overwrite the log information in the database to detect the failure time. It has a central processing means for restoring the database of another module.

The high reliability method according to the present invention is a high reliability method in which two modules each including a processor and a semiconductor file device accessed by the processor are installed and transaction processing is performed using a database. Each module to which a divided database is allocated so that the usage rate is 50% or less stores all the allocated databases in the main memory,
Transaction processing is performed using the database,
The database is updated on the main memory, the update history of the database is written as log information in the semiconductor file device, and all the databases on the main memory are used as checkpoint information at a predetermined checkpoint. The module that writes in the file device and becomes a failure during transaction processing reads the database at the checkpoint time from the semiconductor file device into the main memory, reads the log information after the checkpoint time, and uses the log information to read the above information. Overwrites on the database, restores the database at the time of the failure, and restarts the transaction processing, but when the failure occurs again, the same processing is repeated and recovery is performed even if the restart processing is performed a predetermined number of times. If not,
The normal module of the two units is notified of the fixed failure, and the normal module performs transaction processing for its own module at the usage rate of 50% of the processor, and fails at the remaining usage rate of 50%. The database at the time of the checkpoint is read from the semiconductor file device of the module that has become to the main memory, the log information after the time of the checkpoint is read, and the database is overwritten with the log information. The feature is that the database of the module is restored and the transaction processing for the database of another module is also processed.

Further, two modules are installed at two different points A and B, and transaction processing is performed in a distributed manner, and the first module at the point A and the first module at the point B mutually oppose each other. The module that includes the database, transmits the log information of the database of its own module through the communication line, and receives the log information,
The other party's database is updated and the second at point A
Module and the second module at point B also perform the same processing as above, and if one module fails at either point A or B, the normal module at the same point fails. If the module transaction processing continues and two modules at the same time fail at either A or B, the two modules at the other points will be replaced by the two modules at the failed point. It is also characterized by continuing transaction processing.

[0011]

According to the present invention, when two modules perform transaction processing with respect to their own modules within the processor utilization rate of 50% and one of the modules fails, the normal module is the processor of 50%. While performing transaction processing for its own module at a usage rate of%, the database and log information at the checkpoint time was read from the semiconductor file device of the module that failed at the remaining usage rate of 50%, and another module failed. Restore the point-in-time database and take over the transaction processing for other modules. As a result, it is possible to reduce the influence on the transaction processing during the failure processing and to improve the reliability of the entire module. In addition, two modules are installed at two different points, and transaction processing is performed independently for each module within the usage rate of the processor of 50%. The update history of the database is sent as log information via a communication line to enable mutual backup between two modules at different points. At this time, an efficient high reliability method can be realized by sharing the margin of the processor usage rate for mutual backup between modules within the same point and mutual backup between nodes between two different points. .

[0012]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a block diagram of a transaction processing high reliability system showing a first embodiment of the present invention. In FIG. 1, 1 and 2 are modules, 3 and 4 are processors in the modules 1 and 2, 5 and 6 are semiconductor file devices in the modules 1 and 2, and 7 and 8 are central portions in the processors 3 and 4, respectively. It is a processing device that executes instructions and performs input / output processing. Further, 9 and 10 are main memories in the processors 3 and 4, 11 and 12 are fault detection / notification devices in the processors 3 and 4, respectively.
Reference numerals 3 and 14 are databases stored in the main memories 9 and 10, 15 and 16 are databases at checkpoints stored in the semiconductor files 5 and 6, and 17 and 18 are semiconductor file devices 5 and 5, respectively.
The log information stored in 6 and 19 are communication control devices that receive transactions via the communication line 26.
Further, 24 and 25 are signal lines for sending the received transactions to the central processing units 7 and 8, respectively, and 20 and 21 are signal lines for connecting the central processing units 7 and 8 and the semiconductor file devices 5 and 6, and 22 and 23, respectively. Are signal lines connecting the central processing units 7 and 8 to the semiconductor file devices 6 and 5, 27 are signal lines connecting the fault detection / notification devices 11 and 12, and 28 and 29 are central processing units 7 and 8, respectively. And signal lines 30 and 31 for connecting the main memory 9 and the main memory 9 and 10, respectively, are central processing units 7 and 8 and failure detection / notification devices 11 and 1, respectively.
It is a signal line that connects the two.

FIG. 2 is a flowchart of a normal operation and a failure detection operation of the processor of each module of the present invention. In FIG. 1, the transaction sent via the communication line 26 is received by the communication control device 19. If the transaction is processed by the database 13 in the module 1, the communication control device 19 is sent to the central processing unit 7 via the signal line 24 and processed by the database 14 in the module 2. If so, it is sent to the central processing unit 8 via the signal line 25. Hereinafter, it is assumed that the transaction is processed by the database 13 in the module 1. Figure 2
As shown in FIG. 5, the transaction sent to the central processing unit 7 is processed according to the database 13 (steps 301 and 302) and then the main memory 9 via the signal line 28.
Is accessed and the contents of the database 13 are rewritten (step 303). The central processing unit 7 also writes the rewritten address of the database 13 and the rewritten contents into the log information 17 of the semiconductor file device 5 via the signal line 20 (step 304). After that, the central processing unit 7 sends a response to the transaction to the signal line 2
4 to the communication control unit (CCU) 19 (step 305), the communication control unit 19 sends a response to the transaction to the transaction sender via the communication line 26. Similarly, a transaction sent via the communication line 26 is processed by the module 1 or the module 2. In this case, the modules 1 and 2 are adjusted and stored in the databases 13 and 14 so that the usage rates of the processors 3 and 4 are 50% or less. Further, the central processing units 7 and 8 use the contents of the databases 13 and 14 as checkpoint information at a predetermined cycle, and checkpoint database area 1 of the semiconductor file devices 5 and 6 via the signal lines 20 and 21.
Write in 5,16.

1 and 2, it is assumed that the module 1 fails while the transaction is being processed as described above, and this failure is detected by the failure detection / notification device 11 in the processor 3 (step 311). ). The fault detection / notification device 11 is connected to the central processing unit 7 via the signal line 30.
Is reset (step 313). As a result, the central processing unit 7 starts the program from the beginning, and the signal line 2
The contents of the main memory 9 are initialized via 8 (step 31
4) Read the checkpoint database 15 in the semiconductor file device 5 into the database storage area 13 of the main memory 9 via the signal line 20 (step 315).
Further, the central processing unit 7 reads the log information 17 stored in the semiconductor file device 5 via the signal line 20, and rewrites the database 13 on the main memory 9 according to this log information (step 316). When the above process is completed for all log information from the checkpoint time (step 317), the database 13 on the main memory 9
Is the content just before the failure was detected. In this way, when the database 13 is restored, the transaction processing in the module 1 is restarted again (step 3).
18). Processor 3 again during recovery of database 13
Becomes a failure, the failure detection / notification device 11 detects it and performs the same database recovery process as described above. When the failure detection / notification device 11 detects a failure a predetermined number of times (step 312), the processor 3 regards it as a fixed failure, and notifies the failure detection / notification in the module 2 via the signal line 27. Notify device 12 (step 3)
19). The fault detection / notification device 12 notifies the central processing unit 8 via the signal line 31 that the module 1 has a fixed fault.

FIG. 3 is a flowchart showing the operation of the processor of the module when the other party fails according to the present invention. The central processing unit 8 transfers the checkpoint database 15 from the semiconductor file device 5 to the main memory 1 via the signal line 23.
It is read to 0 (step 321). Next, the central processing unit 8 reads the log information 17 stored in the semiconductor file device 5 via the signal line 23 (step 32).
2) According to this log information, the checkpoint database 15 read out to the main memory 10 is rewritten (step 323). When the above processing is completed for all log information from the time of the checkpoint (step 324),
The database immediately before the failure of the module 1 is restored on the main memory 10. The central processing unit 8 notifies the communication control unit (CCU) 19 via the signal line 25 that the database of the module 1 has been restored (step 32).
5). The communication control device 19 uses the signal line 25 to transmit transactions processed by the module 1 to the central processing unit 8.
(Step 326). This allows module 1
Transaction processing for is resumed in module 2. The module 2 performs transaction processing for its own module within the usage rate of the processor of 50%, and the above-mentioned module 1 with the remaining usage rate of 50%.
The database is restored, and then the transaction processing for module 1 is performed (step 327). In this way, the processors 3 and 4 share the transaction processing by 50% within the processor utilization rate of 50%, so that even if one of the processors fails, the backup can be performed mutually. It will be possible. Further, even if one of the modules becomes a failure and the database of the module is restored, the transaction processing of the normal module is not affected, so that there is an advantage that the transaction processing of the entire module is less affected.

FIG. 4 is a block diagram of a transaction processing high reliability system showing a second embodiment of the present invention.
In FIG. 4, reference numerals 1 to 31 are the same as those in FIG. 32 and 33 are databases 1 in the processors 4 and 3 stored in the semiconductor file devices 5 and 6, respectively.
Checkpoint database of 4,13,34,35
Is log information stored in the semiconductor file devices 5 and 6, respectively. The difference from the embodiment of FIG. 1 is that when transaction processing is performed by the processor 3, the log information is stored not only in the area 17 in the semiconductor file device 5 but also in the area 35 in the semiconductor file device 6, and The checkpoint database of the database 13 in the processor 3 is used as the area 1 in the semiconductor file device 5.
This is to be stored in the area 33 in the semiconductor filing device 6 as well as in No. Similarly, the log information from the processor 4 is stored in the areas 18 and 34 of the semiconductor file devices 5 and 6, and the checkpoint database is stored in the areas 16 and 32 of the semiconductor file devices 6 and 5. Thus, by duplicating and storing the log information and the checkpoint database in the two semiconductor file devices 5 and 6, one of the semiconductor file devices becomes an obstacle and the log information and the checkpoint database are lost. Even in this case, the log information and the checkpoint database can be read from the normal semiconductor file device and the restart processing can be performed, and the reliability can be further improved.

FIG. 5 is a block diagram of a transaction processing high reliability system showing a third embodiment of the present invention.
In FIG. 5, reference numerals 1 to 31 indicate the same parts as those in the embodiment shown in FIG. 36 and 37 are modules 1 and 2, respectively
Second semiconductor file device provided inside, 38, 3
Reference numeral 9 is a checkpoint database in the semiconductor file devices 36 and 37, and 40 and 41 are log information in the semiconductor file devices 37 and 38, respectively. The embodiment of FIG. 5 is different from the embodiment of FIG. 1 in that two semiconductor file devices are provided in each of the modules 1 and 2 and the checkpoint database and log information are duplicated in the two semiconductor file devices 36 and 37. It is to store it.
As a result, one of the semiconductor filing devices becomes an obstacle,
Even if the checkpoint database and the log information are lost, the checkpoint database and the log information can be read from the normal semiconductor file device and the restart processing can be performed, and the reliability can be further improved.

FIG. 6 is a block diagram of a transaction processing high reliability system showing a fourth embodiment of the present invention.
In FIG. 6, reference numerals 1 to 31 and 36 to 41 indicate the same parts as those in the embodiment of FIG. 42 is a checkpoint database stored in the semiconductor file device 6 by the processor 3, 43 is the semiconductor file device 6 in the processor 3.
It is the log information stored in. In FIG. 6, when the transaction processing is performed in the state of FIG. 5, the semiconductor file device 5 becomes an obstacle (indicated by x), and the checkpoint database 15 and the log information 17 in the semiconductor file device 5 are lost. The case where the processor 3 stores the checkpoint database 42 and the log information 43 in the semiconductor file device 6 is shown. As described above, when one of the semiconductor file devices of one of the modules fails, the checkpoint database and the log information are written in the semiconductor file device of the other module so that the checkpoint database and the log information are always stored in the semiconductor file device. Since the data is redundantly stored in, the overall reliability can be further improved.

FIG. 7 is a block diagram of a high reliability system between nodes for transaction processing showing a fifth embodiment of the present invention. In FIG. 7, 1000 is a node at a point A (for example, Tokyo), and 2000 is a node at a point B (for example, Osaka). The points A and B are located apart from each other, and if an entire node fails due to a disaster such as an earthquake or water damage at any point, another normal node can back up the failed node. It is what In the node 1000, reference numerals 1 to 31 indicate the same as those in FIG. 1, and 101 to 131 in the node 2000 indicate the same as those in FIGS. 1 to 31. 201,2
02 is a copy database of the databases 113 and 13 of the processors 103 and 3, respectively, and 203 and 204 are databases 114 of the processors 104 and 4, respectively.
14 is a copy database, 205 and 206 are checkpoint databases in which the copy databases 201 and 202 of the processors 3 and 103 are stored in the semiconductor file devices 5 and 105 in a predetermined cycle, and 209 and 210.
Is a copy database 203 of the processors 4, 104,
204 in the semiconductor file device 6 at a predetermined cycle.
Checkpoint database stored in 106, 20
Reference numeral 7208 indicates the update history of the copy databases 201 and 202 of the processors 3 and 103 in the semiconductor file device 5;
Reference numeral 211 and 212 are log information stored in the semiconductor file device 6 and 106, and update history of the copy databases 203 and 204 of the processors 4 and 104 are stored in the semiconductor file device 6 and 106. A communication line 3000 connects between the communication control device 19 and the communication control device 119.

In FIG. 7, processors 3, 4, 10
3 and 104 are databases 13, 14 and 11, respectively.
3, 114, transaction processing is performed within a processor usage rate of 50%. In the node 1000, the module 1 and the module 2 are in the mutual backup state, and in the node 2000, the module 101 and the module 102 are in the mutual backup state. Transaction processing in each node and backup processing between modules when one module fails in each node are as described in FIG. Here, the backup process between nodes will be described with reference to FIG. Module 1 of node 1000 and node 20
The module 101 of 00, the module 2 of the node 1000, and the module 102 of the node 2000 are in a mutual backup state. Central processing unit 7 of node 1000
Performs transaction processing on the database 13, reads the log information 17 from the semiconductor file device 5 via the signal line 20 at a predetermined cycle,
It is sent to the communication control device 19 via the signal line 24. The communication control device 19 sends the log information to the communication control device 119 via the communication line 3000. The communication control device 119 sends the log information to the central processing unit 107 via the communication line 124.

The central processing unit 107 rewrites the copy database 202 based on the sent log information. Further, the central processing unit 107 writes the sent log information in the log information storage area 208 of the semiconductor file device 105 via the signal line 120. The copy database 202 of the processor 109 is written in the checkpoint database storage area 206 of the semiconductor file device 105 via the signal line 120 at a predetermined cycle under the control of the central processing unit 107. Exactly the same, the database 113 of the processor 103 of the node 2000
Is restored to the copy database 201 in the processor 3 of the node 1000, and the checkpoint database 205 and the log information 207 of the copy database 201 are stored in the semiconductor file device 5. As described above, the module 1 in the node 1000 and the node 2000
The method of transmitting the databases of the modules 101 in each other to each other to restore a copy of the database of the counterpart module to the main memory, and the method of storing the checkpoint database and the log information in the semiconductor file device have been described. In exactly the same way, module 2 in node 1000 and module 102 in node 2000
Are in mutual backup state.

In this state, if the node 2000 stops transaction processing due to a disaster such as an earthquake or water damage, the communication line 26, though not shown in FIG.
Since a failure is detected by the management node connected to 126 and monitoring whether these nodes are normal, the management node notifies the transaction sender that the node 2000 has a failure. Thereafter, the transaction is sent to the node 1000 via the communication line 26. The communication control device 19 that received the transaction uses the signal line 2
The central processing unit 7, 8 is notified via 4, 25. The central processing unit 7 performs transaction processing for its own module at a usage rate of 50%, and also uses the database 201 for transaction processing for the module 101 at the remaining 50% processor usage rate. Similarly, the central processing unit 8 performs transaction processing for its own module at a processor usage rate of 50%, and the module 10 at the remaining 50% processor usage rate.
The transaction for 2 is processed using the database 203. Each module performs transaction processing to its own module within the processor usage rate of 50% during normal operation, but due to the remaining 50% of processor usage rate, when a module failure occurs in the same node, the normal module fails When the entire node fails, the two modules of the normal node back up the transaction processing of the two modules of the failed node. In this way, by sharing the mutual backup between modules within a node and the margin of processor usage for mutual backup between nodes, a system can be economically constructed while maintaining high reliability. be able to.

[0023]

As described above, according to the present invention,
In mutual backup by two modules in the same point, when one of the modules fails,
The transaction processing for the failed module can be backed up without affecting the transaction processing that was being processed by the normal module. In addition, in order to improve the reliability of the entire system against large-scale disasters such as earthquakes and floods, mutual backup between two different points is necessary. By sharing the margin of the processor usage rate and the margin of the processor usage rate for mutual backup between nodes, it is possible to make the system as a whole economical while ensuring the high reliability of the system.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a transaction processing high reliability system according to a first embodiment of the present invention.

FIG. 2 is a flowchart of a normal operation and a failure operation of the act processor in FIG.

FIG. 3 is a flow chart of a failure operation of the standby processor in FIG.

FIG. 4 is a configuration diagram of a transaction processing high reliability system showing a second embodiment of the present invention.

FIG. 5 is a configuration diagram of a transaction processing high reliability system showing a third embodiment of the present invention.

FIG. 6 is a configuration diagram of a transaction processing high reliability system showing a fourth embodiment of the present invention.

FIG. 7 is a block diagram of a high reliability system between nodes of transaction processing showing a fifth embodiment of the present invention.

FIG. 8 is a block diagram of a conventional high reliability system for transaction processing.

FIG. 9 is a configuration diagram of a conventional high reliability system between transaction processing nodes.

[Explanation of symbols]

1, 2 ... Module, 3, 4 ... Processor, 5, 6 ... Semiconductor file device, 7, 8 ... Central processing unit, 9, 10 ...
Main memory, 11, 12 ... Fault detection / notification device, 13, 1
4 ... Database, 15, 16 ... Checkpoint database, 17, 18 ... Log information, 19 ... Communication control device, 26 ... Communication line, 20-25, 27 ... Signal line, 3
2, 33 ... Counterpart checkpoint database in semiconductor file device, 34, 35 ... Counterpart log information in semiconductor file device, 36, 37 ... Other semiconductor file device, 38, 39 ... Checkpoint in other semiconductor file device Database, 40, 41 ... Log information in other semiconductor file device, 42, 43 ... Counterpart checkpoint database and log information, 101, 102
... module, 103, 104 ... processor, 105,
106 ... Semiconductor file device, 107, 108 ... Central processing unit, 109, 110 ... Main memory, 111, 112 ...
Fault detection / notification device, 113, 114, 115, 116
… Checkpoint database, 202, 204, 1
17, 118 ... Log information.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takashi Suzuki 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Nihon Telegraph and Telephone Corporation

Claims (6)

[Claims] 1. A highly reliable information processing system in which two modules each including a processor and a semiconductor file device accessed by the processor are installed, and a transaction processing is performed using a database. The main memory that stores the database allocated to each module and each module has failed so that the recovery rate is 50% or less. To the semiconductor memory device of another module upon receiving the notification from the fault notifying means, and reads out the database at the checkpoint into the main memory and also Read the log information after the time point and High reliability system, characterized in that it comprises overwriting the base, a central processing unit for restoring a database of other modules of the point of failure. 2. In a high reliability method in which two modules each having a processor and a semiconductor file device accessed by the processor are installed and transaction processing is performed using a database, the usage rate is 50% or less. Further, each module to which the divided database is allocated stores all the allocated databases in the main memory, performs transaction processing using the database, updates the database on the main memory, and The update history of the database is written as log information in the semiconductor file device, and all databases on the main memory are written as checkpoint information in the semiconductor file device at a predetermined checkpoint, causing a failure during transaction processing. The module is
The database at the checkpoint time is read from the semiconductor file device into the main memory, the log information after the checkpoint time is read out, the database is overwritten with the log information, the database at the time of the failure is restored, and the transaction is performed. The process is restarted, but if a failure occurs again, the same process is repeated, and if it does not recover even after the restart process is performed a predetermined number of times, it means that there is a fixed failure among the two. The normal module is notified, and the normal module performs transaction processing for its own module at the usage rate of 50% of the processor, and checks points from the semiconductor file device of the failed module at the remaining usage rate of 50%. After reading the database of the time point into the main memory, after the check point A high reliability method characterized in that the log information is read, the database is overwritten with the log information, the database of another module at the time of the failure is restored, and transaction processing for the database of the other module is also processed. . 3. Each module stores the database and log information at the time of checkpoint in a duplicated manner in both the semiconductor file device in its own module and the semiconductor file device in another module. Item 3. The high reliability method according to Item 2. 4. The module according to claim 2, wherein each of the modules is provided with two semiconductor file devices, and the database and log information at the time of checkpoint are duplicated and stored in the two semiconductor file devices. High reliability method. 5. Each of the modules has a capacity of one of the other modules when one of the two semiconductor file devices fails.
The database and log information at the time of checkpoint is also stored in the stand, and the database and log information at the time of checkpoint is always duplicated and stored in two semiconductor file devices. Method. 6. The two modules are connected to two different points A,
They are installed in B and perform transaction processing in a distributed manner. The first module at point A and the first module at point B are provided with the database of the other module, and the log information of the database of the own module is connected to the communication line. The module that has transmitted the log information via the update module updates the database of the other module, and the second module at the point A and the second module at the point B also perform the same processing as described above. If one module fails at point A, the normal module at the same point continues the transaction processing of the failed module, and two modules fail at either point A or B at the same time. If this happens, the two modules at other points can continue the transaction processing of the two modules at the point of failure. Reliable method of claim 2, wherein.