JPH07201894A - Manufacture of electronic parts mounting device - Google Patents
Manufacture of electronic parts mounting deviceInfo
- Publication number
- JPH07201894A JPH07201894A JP35431193A JP35431193A JPH07201894A JP H07201894 A JPH07201894 A JP H07201894A JP 35431193 A JP35431193 A JP 35431193A JP 35431193 A JP35431193 A JP 35431193A JP H07201894 A JPH07201894 A JP H07201894A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- conductor circuit
- agent layer
- bonding agent
- inner lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3405—Edge mounted components, e.g. terminals
Landscapes
- Die Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、電子部品搭載装置の製
造方法に係り、特に配線基板の導体回路とリードフレー
ムとがはんだにより接続される形式の電子部品搭載装置
の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an electronic component mounting device, and more particularly to a method for manufacturing an electronic component mounting device in which a conductor circuit of a wiring board and a lead frame are connected by solder.
【0002】[0002]
【従来の技術】従来、この種の電子部品搭載装置の製造
方法は、例えば特開平3ー203357号公報に示され
ているように、先端に設けた孔に高鉛はんだボールを盛
りつけたリードを配線基板のスルーホールに位置合わせ
してリフローすることにより、スルーホール内にはんだ
を充填させると共にリード先端孔にはんだを充填させ
て、リードとスルーホール間のはんだ接合を形成してい
た。そして、はんだ接合部分を補強剤により固定して保
護していた。2. Description of the Related Art Conventionally, a method of manufacturing an electronic component mounting apparatus of this type has been described in Japanese Unexamined Patent Publication No. 3-203357, in which a lead provided with a high lead solder ball is provided in a hole provided at the tip. By aligning with the through hole of the wiring board and performing reflow, the solder is filled in the through hole and the lead tip hole is filled with solder to form a solder joint between the lead and the through hole. Then, the solder joint portion is fixed and protected by a reinforcing agent.
【0003】[0003]
【発明が解決しようとする課題】しかし、上記製造方法
によれば、リードは配線基板と位置合わせされているの
みで配線基板に固定されてはいない。従って、はんだを
加熱状態から常温に戻したときに生じる熱ストレスがリ
ードとスルーホール間のはんだ接合部分に集中して加わ
ることになるため、はんだ接合部分の信頼性が低下する
おそれがある。また、リードにはんだボールを設けるた
めに作業時間を要すると共に材料費等も高価になる。さ
らに、はんだボールを設けたリードを配線基板に位置決
めした後、はんだボール溶融のためのリフロー工程が必
要となり、さらにその後はんだ接合部に補強剤を設ける
工程も必要になるため、製造時間が非常に長くなり最終
の電子部品搭載装置が高価なものになるという問題があ
る。本発明は、上記した問題を解決しようとするもの
で、リードと配線基板の導体回路間のはんだ接合を簡易
な方法で安価に行うことができ、かつ接続信頼性に優れ
た電子部品搭載装置の製造方法を提供することを目的と
する。However, according to the above-described manufacturing method, the lead is only aligned with the wiring board and is not fixed to the wiring board. Therefore, the thermal stress generated when the solder is returned from the heated state to room temperature is concentrated on the solder joint portion between the lead and the through hole, which may reduce the reliability of the solder joint portion. Further, it takes work time to provide the solder balls on the leads, and the material cost becomes expensive. Furthermore, after positioning the leads with solder balls on the wiring board, a reflow process for melting the solder balls is required, and then a step of providing a reinforcing agent on the solder joints is also required, which greatly reduces the manufacturing time. There is a problem that it becomes long and the final electronic component mounting apparatus becomes expensive. The present invention is intended to solve the above problems, and an electronic component mounting apparatus that can perform solder bonding between a lead and a conductor circuit of a wiring board by a simple method at low cost and has excellent connection reliability. It is intended to provide a manufacturing method.
【0004】[0004]
【課題を解決するための手段】上記目的を達成するため
に、上記請求項1に係る発明の構成上の特徴は、表面側
に外周に向けて広がる複数の導体回路を設けた配線基板
の外周の近傍領域に接着剤層を設ける工程と、導体回路
の外側端部にペースト状はんだを塗布する工程と、リー
ドフレームの複数のリードの少なくとも先端部分を導体
回路の外側端部上に配置させた状態で、リードフレーム
を接着剤層に接着させる工程と、はんだ及び接着剤層位
置にてリードフレームを加熱治具により加熱加圧させる
工程とを設けたことにある。In order to achieve the above object, the structural feature of the invention according to claim 1 is that the outer periphery of a wiring board is provided with a plurality of conductor circuits that spread toward the outer periphery on the surface side. The step of providing an adhesive layer in the vicinity of the area, the step of applying paste-like solder to the outer end of the conductor circuit, and the placement of at least the tip portions of the leads of the lead frame on the outer end of the conductor circuit. In this state, a step of adhering the lead frame to the adhesive layer and a step of heating and pressing the lead frame with a heating jig at the solder and adhesive layer positions are provided.
【0005】[0005]
【作用】上記のように構成した請求項1に係る発明にお
いては、リードフレームに加熱治具を圧着させることに
より、同時に加熱加圧されて接着剤層が軟化しかつペー
スト状はんだが溶融する。さらに、加熱治具による加圧
により、リードフレームが接着剤層及び溶融はんだに強
力に押し付けられて、配線基板に強固に接着される。そ
して、加熱治具を外して配線基板を常温に戻したときに
生じる熱ストレスは、リードフレームと導体回路間のは
んだ接合部のみならず接着剤を介したリードと配線基板
との部分にも分散される。In the invention according to claim 1 configured as described above, when the heating jig is pressure-bonded to the lead frame, the adhesive layer is simultaneously softened by heating and pressurizing and the paste-like solder is melted. Further, the lead frame is strongly pressed against the adhesive layer and the molten solder by the pressure applied by the heating jig, and is firmly adhered to the wiring board. The thermal stress generated when the heating jig is removed and the wiring board is returned to room temperature is distributed not only to the solder joints between the lead frame and the conductor circuit but also to the leads and wiring board through the adhesive. To be done.
【0006】[0006]
【発明の効果】その結果、はんだ接合部にかかるストレ
スが軽減され、リードと導体回路間の接合の信頼性が高
められる。また、接着剤層とはんだに接触させたリード
フレームに、加熱治具を圧着させるのみの簡単な作業に
より、同時にリードフレームの接着剤層による補強と導
体回路との接続を行うことができるので、電子部品搭載
装置の製造工程を大幅に短縮することができ、製品を安
価に提供することができる。As a result, the stress applied to the solder joint is reduced, and the reliability of the joint between the lead and the conductor circuit is improved. Also, the lead frame brought into contact with the adhesive layer and the solder can be reinforced by the adhesive layer of the lead frame and connected to the conductor circuit at the same time by a simple operation of simply crimping the heating jig, The manufacturing process of the electronic component mounting device can be significantly shortened, and the product can be provided at low cost.
【0007】[0007]
【実施例】以下、本発明の一実施例を図面により説明す
る。図1は、実施例に係る半導体チップ搭載装置の一部
を拡大斜視図により示したものである。図2は、半導体
チップ搭載装置の製造工程の要部を横断面図により概略
的に示したものである。配線基板10は、ガラスエポキ
シ等の基材の表面側に銅箔を貼り付けたものをフォトエ
ッチングにより加工して得た複数の導体回路11を設け
ると共に、中央に打ち抜き加工等により形成した半導体
チップ搭載用の開口部12を設けている。また、配線基
板10の裏面側には、半導体チップ取り付けを兼ねた無
酸素銅製の放熱板30が開口部12を覆った状態で、エ
ポキシ等の接着剤31により接着固定される。この配線
基板10の表面側の外周近傍位置に、エポキシ系の接着
剤を、スクリーン印刷,ディスペンサー等により塗布し
て接着剤層13を設ける(図2(a)参照)。なお、接
着剤としては、ポリイミド等の耐熱性,絶縁性に優れた
ものであればよく、液状に限らずBステージのシート状
であってもよい。シート状の場合は打ち抜き加工された
接着シートを配線基板10aに貼り付けてもよく、また
後述するリードフレーム20に仮接着しておいてもよ
い。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is an enlarged perspective view showing a part of a semiconductor chip mounting device according to an embodiment. FIG. 2 is a cross-sectional view schematically showing a main part of a manufacturing process of a semiconductor chip mounting device. The wiring board 10 is provided with a plurality of conductor circuits 11 obtained by subjecting a surface of a base material such as glass epoxy to which a copper foil is adhered to by photoetching, and a semiconductor chip formed by punching at the center. An opening 12 for mounting is provided. Further, on the back surface side of the wiring board 10, a heat dissipation plate 30 made of oxygen-free copper, which also serves as a semiconductor chip attachment, is bonded and fixed with an adhesive 31 such as epoxy in a state of covering the opening 12. An epoxy adhesive is applied by screen printing, a dispenser or the like to a position near the outer periphery on the front surface side of the wiring board 10 to provide an adhesive layer 13 (see FIG. 2A). It should be noted that the adhesive may be polyimide or the like as long as it has excellent heat resistance and insulating properties, and is not limited to a liquid form, and may be a B-stage sheet form. In the case of a sheet, a punched adhesive sheet may be attached to the wiring board 10a, or may be temporarily adhered to a lead frame 20 described later.
【0008】つぎに、配線基板10の導体回路11の外
側端部に、はんだペーストをスクリーン印刷法等により
塗布し乾燥させてはんだ層14を設ける(図2(b)参
照)。そして、リードフレーム20をインナーリード2
1の先端が導体回路11の外側端部上に位置するように
して、接着剤層13に仮接着により固定させる(図2
(c)参照)。さらに、接着剤層13及びはんだ層14
上のインナーリード21に、例えば230℃に加熱され
た加熱ツール30を押圧させる(図2(c)参照)。こ
れにより、インナーリード21が加熱加圧され、同時に
接着剤層13が軟化しかつはんだペースト14が溶融す
る。そして、加熱ツール30の加圧により、インナーリ
ード21が接着剤層13及び溶融はんだ層14に強力に
押し付けられる。そのため、インナーリード21と導体
回路11との接続と同時にインナーリード21の接着剤
層13による補強を行うことができる。また、この作業
は、接着剤層とはんだに接触させたリードフレームに、
加熱ツール30を圧着させるのみの簡単な作業であるの
で、半導体チップ搭載装置の製造工程を大幅に短縮する
ことができ、製品を安価に提供することができる。ま
た、加熱ツール30を外して配線基板を常温に戻したと
きに生じる熱ストレスはリードフレーム20と導体回路
11間のはんだ接合部のみならず接着剤層13を介した
インナーリード21と配線基板10との部分にも分散さ
れる。その結果、はんだ接合部に加わるストレスが軽減
され、インナーリード21と導体回路11間の接合の信
頼性が高められる。Next, a solder paste is applied to the outer end portion of the conductor circuit 11 of the wiring board 10 by a screen printing method or the like and dried to provide a solder layer 14 (see FIG. 2B). Then, the lead frame 20 is attached to the inner lead 2
The tip of 1 is positioned on the outer end of the conductor circuit 11 and fixed to the adhesive layer 13 by temporary adhesion (FIG. 2).
(See (c)). Further, the adhesive layer 13 and the solder layer 14
A heating tool 30 heated to, for example, 230 ° C. is pressed against the upper inner lead 21 (see FIG. 2C). As a result, the inner lead 21 is heated and pressed, and at the same time, the adhesive layer 13 is softened and the solder paste 14 is melted. Then, the inner lead 21 is strongly pressed against the adhesive layer 13 and the molten solder layer 14 by the pressure of the heating tool 30. Therefore, it is possible to reinforce the inner lead 21 with the adhesive layer 13 at the same time as connecting the inner lead 21 and the conductor circuit 11. In addition, this work is performed on the lead frame that is in contact with the adhesive layer and the solder.
Since this is a simple operation of only pressing the heating tool 30, the manufacturing process of the semiconductor chip mounting device can be significantly shortened, and the product can be provided at low cost. Further, the thermal stress generated when the heating tool 30 is removed and the wiring board is returned to room temperature is not only the solder joint between the lead frame 20 and the conductor circuit 11, but also the inner lead 21 and the wiring board 10 through the adhesive layer 13. It is also dispersed in the part of. As a result, the stress applied to the solder joint is reduced, and the reliability of the joint between the inner lead 21 and the conductor circuit 11 is improved.
【0009】上記半導体チップ搭載装置の開口部12内
の放熱板30上に、銀ペースト等を用いて半導体チップ
Sをダイボンディングし、さらに半導体チップSの電極
パッドと配線基板10の導体回路12又はインナーリー
ド21間をワイヤーボンディングにより接続させる。さ
らに、エポキシ樹脂R等によりモールドし、リードフレ
ーム20を切断することにより最終的な半導体装置に形
成される(図3参照)。The semiconductor chip S is die-bonded onto the heat dissipation plate 30 in the opening 12 of the semiconductor chip mounting device using silver paste or the like, and the electrode pads of the semiconductor chip S and the conductor circuit 12 of the wiring board 10 or The inner leads 21 are connected by wire bonding. Further, it is molded with epoxy resin R or the like, and the lead frame 20 is cut to form a final semiconductor device (see FIG. 3).
【0010】なお、上記実施例においては、配線基板に
半導体チップを組付けした半導体チップ搭載装置につい
て説明しているが、その他の電子部品を組付けるように
してもよい。また、上記半導体チップ搭載装置には、複
数個の半導体チップを搭載してもよい。さらに、上記半
導体チップ搭載装置には、必要に応じて放熱板を設けな
いようにしてもよい。その場合、半導体チップは、配線
基板に直接搭載される。In the above embodiment, the semiconductor chip mounting device in which the semiconductor chip is mounted on the wiring board has been described, but other electronic parts may be mounted. A plurality of semiconductor chips may be mounted on the semiconductor chip mounting device. Further, the semiconductor chip mounting device may not be provided with a heat dissipation plate if necessary. In that case, the semiconductor chip is directly mounted on the wiring board.
【図1】本発明の一実施例に係る半導体チップ搭載装置
の一部を概略的に示す斜視図である。FIG. 1 is a perspective view schematically showing a part of a semiconductor chip mounting device according to an embodiment of the present invention.
【図2】同半導体チップ搭載装置の製造工程の一部を概
略的に示す断面図である。FIG. 2 is a cross sectional view schematically showing a part of the manufacturing process of the semiconductor chip mounting device.
【図3】同半導体チップ搭載装置を用いた半導体装置の
完成状態を概略的に示す断面図である。FIG. 3 is a sectional view schematically showing a completed state of a semiconductor device using the same semiconductor chip mounting device.
10;配線基板、11;導体回路、12;開口部、1
3;接着剤層、14;はんだ層、20;リードフレー
ム、21;インナーリード、30;放熱板、S;半導体
チップ、R;モールド樹脂。10: wiring board, 11: conductor circuit, 12: opening, 1
3; adhesive layer, 14; solder layer, 20; lead frame, 21; inner lead, 30; heat sink, S; semiconductor chip, R; mold resin.
Claims (1)
回路を設けた配線基板の同外周の近傍領域に接着剤層を
設ける工程と、 前記導体回路の外側端部にペースト状はんだを塗布する
工程と、 リードフレームの複数のリードの少なくとも先端部分を
前記導体回路の外側端部上に配置させた状態で、同リー
ドフレームを前記接着剤層に接着させる工程と、 前記はんだ及び接着剤層位置にて前記リードフレームを
加熱治具により加熱加圧させる工程とを設けたことを特
徴とする電子部品搭載装置の製造方法。1. A step of providing an adhesive layer in the vicinity of the outer periphery of a wiring board having a plurality of conductor circuits spread on the surface side toward the outer periphery, and applying paste-like solder to the outer end of the conductor circuit. And a step of adhering the lead frame to the adhesive layer in a state where at least tip portions of the plurality of leads of the lead frame are arranged on an outer end portion of the conductor circuit, the solder and the adhesive layer And a step of heating and pressing the lead frame with a heating jig at a position.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP35431193A JPH07201894A (en) | 1993-12-30 | 1993-12-30 | Manufacture of electronic parts mounting device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP35431193A JPH07201894A (en) | 1993-12-30 | 1993-12-30 | Manufacture of electronic parts mounting device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH07201894A true JPH07201894A (en) | 1995-08-04 |
Family
ID=18436695
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP35431193A Pending JPH07201894A (en) | 1993-12-30 | 1993-12-30 | Manufacture of electronic parts mounting device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07201894A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0907308A1 (en) * | 1996-05-29 | 1999-04-07 | Rohm Co., Ltd. | Method for mounting terminal on circuit board and circuit board |
EP0952761A4 (en) * | 1996-05-31 | 2005-06-22 | Rohm Co Ltd | Method for mounting terminal on circuit board and circuit board |
JP2019087676A (en) * | 2017-11-08 | 2019-06-06 | 株式会社豊田自動織機 | Semiconductor device |
-
1993
- 1993-12-30 JP JP35431193A patent/JPH07201894A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0907308A1 (en) * | 1996-05-29 | 1999-04-07 | Rohm Co., Ltd. | Method for mounting terminal on circuit board and circuit board |
EP0907308A4 (en) * | 1996-05-29 | 2005-03-30 | Rohm Co Ltd | Method for mounting terminal on circuit board and circuit board |
EP0952761A4 (en) * | 1996-05-31 | 2005-06-22 | Rohm Co Ltd | Method for mounting terminal on circuit board and circuit board |
JP2019087676A (en) * | 2017-11-08 | 2019-06-06 | 株式会社豊田自動織機 | Semiconductor device |
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