JPH07112053A - Reel monitoring equipment of amusement machine - Google Patents

Abstract

PURPOSE: To accurately monitor the momentary rotational positions of reels by analyzing the data such as the speed, acceleration, and rotating direction of rotations when three reels are rotated, judging whether the data are within the prescribed operation parameters or not, and detecting a fraudulent reel motion. CONSTITUTION: A coin-operated slot machine has three reels rotated concurrently, and the reels are stopped at a set of stop positions independently determined at random after being rotated in free periods. A coded ring 19 provided with a single track 77 along the peripheral path is fitted to the side section of each reel, and the track 77 is monitored to grasp the rotational position of the reel against a fixed reference point. Multiple fields 79 having a specific circular arc path are formed on each track 77, the movement of the fields 79 passing through one point at the fixed radial direction distance is detected by a sensor, and the number of the fields 79 passing though the sensor is counted to monitor a fraudulent reel motion.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates generally to entertainment machines having rotating reel assemblies and is of the coin operated type of the type found in Monte Carlo, Reno and other internationally known playgrounds. Regarding slot machines.

[0002]

2. Description of the Related Art In recent decades, as entertainment venue owners have been competing to occupy a better position in the growing market, competition in the gambling industry has intensified as the popularity of playgrounds steadily rises. ing. One factor that often appears in current game equipment market plans to attract the majority of customers is the psychological appeal of low-probability, high-reward options on slot machines. This option
It is popular with some of the markets that are interested in public lottery and other low-risk games that don't like gambling, but who have the potential (at a low probability) to instantly return one property with minimal stakes. Therefore, it's common to see slot machines with potential cash jackpots in major playgrounds where stakes as low as $ 25 return over $ 100,000.

Obviously, not only legally betting enthusiasts have been attracted to the instantaneous wealth potential offered by these slot machines. As the jackpots evolved, very capable slot machine "infringers" emerged, and their jackpot deception techniques improved at a rate that roughly matched that of slot machine technology as it became more complex. Accordingly, slot machine manufacturers have developed various systems for verifying the accuracy of reel spinning movements before issuing cash or credits based on reel position combinations.

[0004]

Recent forms of error detection systems utilize microprocessors or equivalent circuits that randomly generate one of a series of numbers for each spinning reel. . Each of these numbers corresponds to one of the reel stop positions. Multiple reel sensors work with the code for each reel to determine the instantaneous rotational position of this reel as it spins, and when that reel reaches the stop position indicated by the random number. Stop it. After the reel has stopped, the microprocessor determines if the sensed reel position matches the random number and, if not, generates an error signal. Although these slot machines have limited protection against tampering, their reel monitors are unnecessarily complicated, prone to failure, and expensive to manufacture. Furthermore, such an error detection system in a slot machine can easily be outwitted by a professional using current equipment and technology.

An example of such a currently available slot machine is found in Williams US Pat. No. 4,421,310. The reel monitor disclosed in this U.S. patent utilizes two optical sensors for each reel to monitor the reel rotational position and to determine when its stop solenoid must be actuated. Maintenance of the integrity of these two sensors and their mechanical and electrical integrity requires regular inspection and repair, resulting in excessive machine downtime. Other reel monitoring devices, such as those shown in Lucero et al. U.S. Pat. No. 4,238,127, include five sensors for each reel,
A 5-bit digital code is assigned to each reel stop position, and each stop position is identified by a unique address. This reel monitoring device requires a relatively high level of maintenance, requires complex data input / output requirements,
The large number of parts, connections and processing steps required to handle the large number of control signals for each reel are expensive to design and manufacture.

There is a further deficiency in these reel monitoring devices that calculates the intended stop position of each reel at the beginning of the game and monitors the reel rotation movement to ensure followability with this calculated position. It results from the use of error detection systems. Since the position where the reel of the slot machine stops is known in advance, it is possible to intercept this data source and change the intended stop position of the reel.
The slot machine will determine that it is a legal jackpot when the reels stop at this modified stop position.

[0007]

In accordance with a preferred embodiment of the present invention, a machine with rotating reels overcomes many of the drawbacks of conventional machines of this type. In particular, the invention is
Provided is a very simple sensing device that accurately monitors the instantaneous rotational position of the reel as it rotates. By limiting the number of components required to detect reel rotation, the present invention can reduce manufacturing costs and minimize downtime resulting from complex detector repair and maintenance. The present invention also analyzes various data about the rotation of the reel as it rotates, such as speed, acceleration, direction of rotation, and at any point in time.
Incorrect reel movement is detected by determining if these data are within predetermined operating parameters during unhindered reel rotation. Not only does this help prevent slot machine infringers, but it also determines when and why nest slot machines don't work smoothly and the potential problems that can be avoided by proper maintenance. Also helps to warn. The present invention also provides a novel device that can ensure random reel rotation without predicting the intended reel stop position. This effectively prevents a pro who may have access to a memory register that stores the intended stop position and may modify its contents to obtain a winning number combination.

According to one aspect of the invention, an entertainment machine includes at least one reel mounted within a frame for rotation about an axis and having a plurality of indicia disposed along a circumferential surface thereof. Include. The reel has a single track installed on a circumferential path around its axis so that the rotational position of the reel relative to a fixed reference point can be monitored. The track includes a plurality of fields corresponding to each of the indicia, each field extending along a unique arc path at a constant radial distance from the axis. One sensor is provided to detect the movement of the field as it passes a single point at a constant radial distance. Also, a device responsive to the sensor is provided to detect the passage of the home field. Home of reel position counter
The number of fields passing through the sensor after the field is counted, and the instantaneous rotation position of the reel can be monitored while the reel is rotating.

In the part of the preferred embodiment corresponding to this aspect of the invention, the track is provided by a coding ring which rotates with the reel. The coding ring has a coding sequence of slots punched to indicate the rotational position of the reel. Each slot marks the beginning of a new field of the encoding ring and is associated with one of the 32 teeth on the sprocket connected to the reel and defines one of 32 stop positions. The slot width changes according to a code that allows the reel's rotational position to be determined by optically scanning a single point on the track as the reel spins, effecting a single reel sensor. It is possible to monitor the reel position.

According to another feature of the invention, an entertainment machine comprises:
A plurality of reels are mounted coaxially within the frame for independent rotation, each having a plurality of indicia along a circumferential surface. To rotate the reel,
A device is provided for responding to a user's manual input, eg, pulling the handle of the pivot lever. One sensor is provided adjacent to each reel. The reel contains a coded data area arranged circumferentially around its axis. Each sensor outputs a different pattern signal in each of the forward and reverse rotation directions of the reel in cooperation with the encoded data of the corresponding reel, and an error is generated in response to one of these patterns. A signal is generated. The reel stop device independently stops the rotation of the corresponding reel in response to the output of the sensor. When the reels stop, the sequence of stop positions is determined and assigned a predetermined game value. A device is provided to provide a user-recognized display of the assigned value, such as by visual display or output of a corresponding number of coins.

In the part of the preferred embodiment corresponding to this aspect of the invention, the encoded data is provided by a single track of different width slots provided on the encoding ring. This track consists of 32 data fields, each field being either an "even" pattern with a wide slot in front of the narrow bar or a narrow slot in front of the wide bar. Have some "odd" pattern. The odd and even field patterns alternate around the circumference of the encoding ring, but
One "home" or "synchronous" position has three sequential odd patterns designed to identify a complete reel revolution. The encoded data provides an easily recognizable indication of the direction of reel rotation and can be used to generate an error signal if the reel is spinning the wrong way.

According to another feature of the invention, each sensor cooperates with the encoded data of its corresponding reel and, during its rotation, of the signals marking the start and end points of at least two arc portions of each reel. Output the pattern. In response to each sensor, the durations of the corresponding two arc portions of the reel are compared, and if the duration of the first arc portion is longer than the duration of the second arc portion, an acceleration error signal is sent. A generating device is provided. In the preferred embodiment, each field of the encoding ring contains one such arcuate portion, and an acceleration error test is performed after each field has passed its corresponding sensor.

According to yet another feature of the invention, the two equal arcuate portions of each reel are sensed as the reels rotate and their respective durations are compared.
The device responsive to this comparison produces a deceleration error signal if the duration of the first arc portion is shorter than the duration of the second arc portion by a predetermined deceleration error amount. In the preferred embodiment, this deceleration error test is
Depending on whether the first or second arc portion is longer, it can be performed with the acceleration error test described above.

In another aspect of the invention, each sensor must cooperate with the encoded data of the corresponding reel to output a pattern of signals that marks the beginning and end of at least one arc portion of the reel. A device is provided for responding to each reel during rotation of the corresponding reel and generating a low speed error signal if the duration of the arc portion of the corresponding reel is greater than a predetermined minimum speed amount. In the preferred embodiment, each field of the encoding ring represents such an arc and a test is performed after each field passes its corresponding sensor to determine if the corresponding reel is spinning too slowly. . Further, a high speed error signal is generated if the duration of the field is less than the predetermined maximum speed amount.

Yet another feature of the present invention relates to an entertainment machine having a rotating reel with corresponding sensors, the reel having encoded data areas circumferentially arranged about its axis. This area contains a plurality of fields corresponding to a plurality of indicia on the circumferential surface of the reel, each field extending along a unique portion of one of the areas and corresponding to each indicia. Part of the encoded data is included. A device is provided for counting the total number of fields that have passed through the sensor after the rotation of the reel has started, regardless of the rotational position of the reel, in response to the sensor. A random number generator provides a number to a device, which generates a reel stop signal when the random numbers are counted for the total number. The reel stop device responds to the reel stop signal and stops the reel at the stop position. Since there is no way to determine where the reels stop from the contents of the total counter, there is provided reel position determining means for responsive to the sensor to determine the reel stop position relative to the fixed reference point.

According to this feature, the random numbers used to ensure unpredictable results at the reel stop position have nothing to do with the intended stop position of the reel. Therefore, it is impossible to extract the contents from the memory register containing the random number and change the final stop position of the spinning reel.

In the portion of the preferred embodiment corresponding to this aspect of the invention, there is provided a 3-reel, 32-field slot machine in which the user pulls the handle to initiate the reel rotation operation. Three random numbers are generated. That is, the first random number is greater than 32 to ensure at least one full rotation of the reel. After a short delay, the first random number is loaded into the total counter and decremented by 1 each time each field on the first reel passes the sensor. Furthermore, the second
The reel positioner, which includes a counter of 0, waits for the "home" or "sync" position of the first reel to pass its sensor before incrementing the second counter. After the random number on the first reel is counted down to zero, the stop solenoid is activated to stop its rotation. The second random number is then loaded into the total counter and counted down to zero while another reel position counter monitors the actual rotational position of that reel. This operation is repeated for the third random number and reel. After the third reel has stopped, the three reels display a randomly determined sequence of indicia, which has nothing to do with the three random numbers used to achieve this sequence.

Yet another feature of the present invention is to have a reel with a single track of rows of consecutive fields, each field having one high level condition and one low level of a different arc span. An entertainment machine having a state. The fields in this column have similar arc spans,
Long span states and short span states of the field exist in alternating order along the columns. A sensor is installed to detect the movement of the field each time it passes a single point at a constant radial distance from the reel axis, which sensor cooperates with the truck to increase its height as the truck rotates. The pattern of level and low level signals is output. A device responsive to the sensor output can be provided to determine the rotational position of the track according to a pattern of high or low level signals. In the preferred embodiment, the alternating field columns on each reel contain almost one field for the track, the remaining fields having the same sequence of span conditions as the two adjacent fields, and thus the reel rotational position counter. Results in a "home" position that can be used to zero.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described below. As can be seen in FIG.
B, 2C. The reels are allowed to spin freely for a period of time before being independently stopped at a set of randomly determined stop positions. For ease of explanation, the mechanical operation of this embodiment is briefly described below. For a more detailed description of the mechanical structure and operation of this device,
It is included in United States Patent Application No. 664,185 (Entertainment Machine), filed October 24, 1984, which is incorporated herein by reference.

2 and 3 show one of the three reels of the preferred embodiment and its corresponding spin management module (used to start and stop the spinning of the reel). The reel 2 has a diameter of 12-3 / 4 inch, and has a frame 3 so that the reel 2 can rotate about an axis 5.
It is installed inside. The reel 2 has a flange or rim 7 on its outer periphery, which has indicia 8 for various games at designated locations, such as cherry, orange, gold bar or other easily identifiable symbol. In this embodiment, 32 indicia 8 are provided at equal intervals along the peripheral rim 7 corresponding to the 32 individual stop positions of the reel 2.

32 teeth 1 provided at equal intervals along the outer circumference
A sprocket 9 having 1 is mounted coaxially so that it can rotate with the reel 2. The sprocket has a diameter of 5.25 inches including the tips of the teeth 11 and a diameter of 4.8 inches for the gap between the teeth. The sprocket 9 has a hub 13, which has 16 equally spaced spokes 15. These spokes extend radially outwardly and carry a ring 17 of teeth 11 at the outer circumference of the sprocket. A thin stamped coding ring 19 (with a pattern of slots, which will be described in more detail below) is seated against the spokes 15 in the radially inner recess 21 of the peripheral ring 17. The coding ring 19 is held in place by a mounting peg 23. As can be seen in FIG. 3, the photoelectric sensor 25 straddles the peripheral ring 17 and the encoding ring 19 and cooperates with the encoding ring 19 to monitor the rotation of the reel 2 in a manner which will be described in more detail below. ing.

A rotation management module, generally designated 27, is fixed to the frame 3 adjacent to its corresponding reel 2 and alternates the rotation of the reels in response to an electrical signal from the control circuit 29 (FIG. 9). It is designed to be started and stopped. The spin management module 27 includes a rigid pawl arm 31, which moves in three-phase movement in response to a control circuit 29 to initiate free rotation of the reel for a period of time, then Stop at one of the stop positions defined by the tooth 11.

The upper end of the pawl arm 31 engages with the teeth 11 of the sprocket 9 when the reel is in a stopped state, as indicated by the broken line position A in FIG. In this reel set position, the pawl arm 31 receives a slight pulling force from the stop spring 35 and presses the pin 33 toward the peripheral ring 17 in a substantially radial direction. Further, the claw arm 31 receives a strong tensile force from the start spring 37, and the claw arm 31 is pressed substantially downward with respect to the pivot pin 39 on the guide arm 41. The guide arm 41 is
It is pivotally attached to a pin 43, which is fixed to a base plate 45. The pawl arm 31 is held at the position shown in FIG. 2 against the pressure of the starting spring 37 by a toggle link 47 that is locked in the illustrated protruding position by a trip lever 49. As shown by a broken line in FIG. 2, a cam 51 is provided so that the guide arm 41 can move downward during the movement of the first phase of the claw arm.

The rotation of the reel 2 is started when the control circuit 29 sends a rotation start signal to the start solenoid 53. This starting solenoid pushes the first trip lever 49 downward and rotates the trip lever clockwise around the pin 43. When the left end of the first trip lever 49 crosses the toggle link 47, the toggle link 47 falls under the pressure of the start spring 37, rapidly rotating the guide arm 41 around the pin 43 in the counterclockwise direction, and the pawl arm 31. Is pulled downward to move the pin 33 from the position A to the position B along the broken line path shown in the drawing. This is about 1
Start the free rotation of the reel 2 at rotations / second. Next, the camshaft 50 is rotated by the electric motor 52 for cocking (FIG. 5), which causes the cam 51 to rotate counterclockwise and engage with the cam follower 55 to the position shown in the figure. Lift 41. The left end of the first trip lever 49 falls under the tension of the spring 57 and locks the toggle link 47 at the position shown. This lifting action of the cam 51 moves the pawl arm 31 from the reel rotation position described above to the cocked position shown by the solid line through the second mobile phase. During this movement, the pin 33 moves from position B to position C along the dashed line path in FIG. 2 and stretches the stop spring 35 and the start spring 37 to prepare for the next two mobile phases of the pawl arm. In this extended state, the stop spring 35 applies a strong tension to the stop lever 59. The stop lever 59 is connected to the pin 61 slidably mounted on the base plate 45 at the upper end of the claw arm 31. During the second movement phase of the pawl arm, the second trip lever 63 engages the pin 61 and restrains the left movement of the stop lever 59 as the pawl arm 31 is raised to the cocked position, thus The spring 35 is stretched in preparation for the third mobile phase. The optical camshaft sensor 64 (FIGS. 4 and 5) after the camshaft 50 has completed one complete revolution.
Fingers 6 on the camshaft positioning disc 68
6 is detected, the control circuit 29 is notified of this, and the cocking motor 52 is stopped. This will be described in detail later.

In the third mobile phase, the pawl arm 31 is
The pin 33 is rotated around the pin 39 from the cocked position (solid line) to the above-described reel set position, and the pin 33 is carried from the position C to the position A along the broken line path in FIG. The third mobile phase is initiated when the control circuit 29 sends a rotation stop signal to the stop solenoid 65, which pulls the second trip lever 63 around the pin 67 counterclockwise to the position of the dashed line in FIG.
This releases the pin 61 and the stop lever 59 pushes the pawl arm 31 upwards under the pressure of the stop spring 35, putting the pin between two adjacent teeth 11 and the 32 stop positions defined by the teeth. Stop spinning reel 2 with one of these.

The positions and movements of the reels 2 are constantly monitored to prevent improper acts from interfering with the inability of the reels to rotate between game rounds and changing the stop position of the reels. To do. Monitoring of the reel is performed by the interaction of the sensor 25 and the encoding ring 19 associated with the control circuit 29.

FIG. 6 shows the preferred structure of the coding ring 19. This consists of a thin stamped ring made of shavings, in which a plurality of slots 69 of different widths are punched out at predetermined locations. The slots 69 are separated by opaque "bars" 71 of different widths. Figure 3
Sensor 25 includes a U-shaped bracket that straddles sprocket 9, as can be seen in FIG. This bracket is U
The pair of photographic optical elements including the LEDs 73 are provided on one leg of the letter, and the phototransistor 75 facing the LED 73 is provided on the other leg. The LED 73 and the phototransistor 75 are arranged in the slot 6 of the encoding disk 19.
9 and the bar 71 are provided so as to coincide with each other. These slots,
The bar constitutes a single "track" 77 of information that can be read by the sensor 25 as the reel 2 spins and monitor the reel position and movement.

As the reel 2 rotates, the track 77 continuously passes between the photographic optical elements 73,75. LED
73 generates pulses at periodic intervals, the phototransistor 75 is sampled at this interval, and the LEs facing each other.
Determines whether it is receiving light from D. If bar 71, the opaque portion of encoding ring 19, separates the photographic optical elements, phototransistor 75 exhibits a "low" (digital 0) electrical state, while
When the slot 69 is interposed between the photographic optical elements, the light is L
It will pass from the ED 73 to the phototransistor 75, which will indicate a "high" (digital 1) electrical state. Thus, the rotation of the reel 2 generates a digital signal at the output of the phototransistor 75. This digital signal is modulated at the sampling frequency and has a pulse width that varies according to the speed of the spinning reel and the type of slot or bar (wide or narrow) present between the photographic optical elements.

As can be seen in FIG. 6, the track 77 is divided into 32 fields 79 corresponding to the 32 stop positions defined by the sprocket teeth 11, each field having an arc span of 11 ° 15 ', ie ,
It has a "width". Each field 79 is divided into two segments. That is, one segment is the slot 69 and the other segment is the bar 71.
When the reel 2 is rotating in the correct direction (clockwise in FIG. 6), the first segment of each "seen" field of the sensor 25 is a slot and the second segment is a bar. These fields alternate between the odd and even patterns corresponding to the odd and even stop positions of the sprocket 9, except for field F30 which has the odd pattern.

The first field F0 corresponding to the first stop position of the reel 2 contains an "even" pattern in which there is a relatively wide slot 69 in front of a relatively narrow bar 71. In the above example, the "wide" slot has the same arc span as the "wide" bar and occupies 8 ° 50 'of the 11 ° 15' field width. Similarly, the "narrow" slot has the same arc span as the "narrow" bar and occupies 2 ° 25 'of the field width. The field F1 corresponding to the second stop position shows an "odd" pattern in which there is a narrow slot in front of the wide bar. Field F2 repeats the even pattern of field F0. The sequence of alternating odd and even patterns is encoded ring 19 through field F9 which indicates an odd pattern with narrow slots in front of wide bars.
Continue around the circumference of. The next field F30 contains another odd pattern, breaking the chain of alternating odd and even patterns. The last field F31 also contains an odd pattern. Therefore, fields F29, F30, F31
The three consecutive odd patterns of <RTIgt; of "define" home "or" synchronous "position </ RTI> on the encoding ring 19, which marks the end of a complete revolution of the corresponding reel 2. Overall operation In operation, the user inserts a coin into the coin slot 81 and pulls the handle 83 forward,
Start a round of games on a slot machine. Movement of the handle 83 closes a switch (not shown) and sends a handle pull signal to the control circuit 29. The control circuit sends a signal to the start solenoids 53A, 53B, and 53C to move the respective claw arms 31 from the reel set position to the reel rotation position, and set the free rotation cycle of each of the three reels to about 1 rotation / Start at the speed of seconds.

After the handle 83 is pulled, the control circuit 29 generates three random numbers which are used to determine the next set stop position for the three reels. Starting with the first reel 2A, the control circuit 29 loads the first random number into the total number counter, samples the sensor 25 at 500 microsecond intervals, and
The sampled output of 5 makes a positive transition from the low level state to the high level state. This marks the beginning of a new field. Each time a new field is detected, the control circuit 29 decrements the total counter and tests to see if the new total is greater than zero. When the total number becomes zero, the control circuit 29 determines that the corresponding stop solenoid 6
Reel 2A by sending a signal to energize 5
To stop the rotation of. Next, the second random number is loaded into the total number counter, and the countdown is repeated for the reel 2B. When the total number counter reaches zero, reel 2B is stopped by energizing its corresponding stop solenoid 65, and the total number countdown is started for reel 2C having the third random number. When the total counter reaches zero again, the stop solenoid 65 for reel 2C is energized to stop that reel, completing the game round. The stop position of reels 2A, 2B, 2C is then compared to the pay table and if there is a winning combination, the control circuit 29 indicates this fact to the user by means of a suitable display 84, or Coins are paid out from the internal hopper (not shown) to the coin receiver 85, or both of these operations are performed.

After all three reels have stopped, the control circuit 29 causes the phototransistor 75 at 500 microsecond intervals during the "idle" mode between game rounds.
Continue to sample. Upon detection of a transition between any two subsequent samples of a given phototransistor during idle mode, control circuit 29 sends a "tilt" or error signal to indicate incorrect reel movement. And the next game is prohibited until the tilted state is corrected.

During the above reel free rotation cycle, each reel is closely monitored to ensure that the free rotation cannot be tampered with by the user. After a short initialization period following the pulling of the handle 83, the control circuit 29 performs a test every 500 microseconds to ensure that each reel has the correct direction of rotation, speed and acceleration, and the instantaneous rotational position of each reel. To update.

By using two different segment widths in each field of the encoding ring 19, the control circuit 29 can monitor the direction of rotation of each reel 2. FIG. 7 shows the slot represented by track 77 at a single fixed point monitored by phototransistor 75 when reel 2 is rotating in the correct direction (clockwise) at a constant speed of 1 revolution / sec. The pattern of 69 and the bar 71 is shown. At time zero (T0), the field F0 begins to cross a single point, the "sensing zone" 87, in which the sensor 25 is in focus. at this point,
The state of track 77 makes a positive transition (0 to 1) to mark the state of the new field. The duration of the next two segments is monitored by the control circuit 29 and is used to determine the direction of rotation of the reel. When the next positive transition occurs (after 31.25 ms) (F0
, And the beginning of F1), control circuit 29 compares the durations of the first and second segments of field F0. The first segment is long (24.54 ms vs. 6.
71 ms) and then split the longer segment into two and modified the duration (12.27 ms)
Is compared with the short segment. Since the modified segment is still longer than the unmodified segment, the control circuit 29
It is determined that the reel is rotating in the correct rotation direction, and the calculation for the next field is repeated.

FIG. 8 is a graph of track state versus time for a reel spinning in the wrong (counterclockwise) direction of rotation at a constant speed of 1 rev / sec. Time zero (T
0), the slot 69 of the field F3 becomes the detection zone 8
A positive transition will be detected when 7 is entered. The control circuit 29 interprets this as the state of the new field 79, so it will monitor the duration of the next two segments and compare them on the next positive transition (13.2 ms). And decide which is longer.
In the current example, the two segments are equal, so one of them will be assigned the default state as the "longer segment" and then give the two split modified segment durations. This modified duration (3.355 ms) is then compared to the duration of the "shorter" segment (6.71 ms), and when it is determined that it is not long, control circuit 29
Will generate an "error" or "tilt" signal indicating that the reel is not spinning in the correct direction of rotation.

After determining that a given reel is spinning in the correct direction of rotation, control circuit 29 compares the total duration of the preceding field to a predetermined "minimum speed" duration, and if the reel is to a predetermined When rotating at a speed lower than the minimum rotation speed, an error signal is generated. The duration of the preceding field is then compared to the predetermined "maximum speed" duration and an error signal is generated if the reel spins too fast.

The durations of the preceding and newly completed fields are then subtracted from each other and the difference is tested to determine if the reel is accelerating or decelerating. If during acceleration, the difference is tested for the maximum amount of acceleration, and if greater than that, an error signal is generated. Similarly, if the reel is decelerating, the difference is tested for the maximum amount of deceleration, and if deceleration of the reel is too fast, an error occurs.

After testing for acceleration or deceleration, the control circuit 29 tests to see that one of the two segments of the field is long so that the newly completed field has an "odd" pattern (eg, F).
1, F3, F5) or "even" patterns (eg, F0, F2, F4). If odd, it determines if three consecutive odd fields are detected, and if not, it spins the rotary position counter corresponding to that reel. If not, increment the position counter, go to the next reel and repeat the above test. Control Circuit 29 FIG. 9 is a block diagram of a control circuit 29 constructed in accordance with the present invention. The illustrated embodiment uses an 8-bit microprocessor 89 (eg Intel 8031) and uses reel 2
Control, monitor the rotation, stopping, and perform other processing operations such as coin processing and audiovisual display. A functional diagram of the Intel 8031 Microprocessor, along with its features, specifications, and instruction
It can be found in the publication entitled "MCS 51 User's Manual" published by Corporation. This is incorporated herein by reference. Microprocessor 89
The terminals XTAL1 and XTAL2 of are connected to the external oscillator 91,
This external oscillator generates a 10 megahertz (MHz) signal to time the operation of microprocessor 89. The oscillator 91 is also connected to the serial input / output clock 93 and adjusts the timing of inputting and outputting serial data, as described in detail below.

The terminals D0 to D7 of the microprocessor 89
Are connected to the 8-bit data bus 95. This data bus is used to carry data to a plurality of external devices such as sensors, solenoids, relays and audiovisual displays. The data bus 95 is
It also carries the eight low-order bits for addressing external memory, as described below.

The storage of control circuit 29 is distributed between the internal memory of microprocessor 89 and the external storage provided by program memory 97 and external RAM 99. The internal memory of the microprocessor 89 includes 32 general-purpose registers (each holding 1-byte (8-bit) information) for primary storage, and 128.
Internal RAM having a number of allocation function registers (each holding one byte of information allocated to a particular memory function, eg, a function for storing the current rotational position of the corresponding reel 2). .

The address designation of the external memory is performed by the data bus 95, the lower address bus 101 (8 bits), the upper address bus 103 (7 bits) and the address latch 10.
It is done by 5. Address latch 105 includes eight D-type latches with a common latch enable control gate L. Address latch 105 latches 8-bit information from data bus 95 to lower address bus 101 when gate L generates a pulse and provides this information to the output after the latching pulse is retracted.

Program memory 97 includes a 128 kilobit non-volatile EPROM which is at a storage location defined by upper and lower address buses 103, 101 in response to an output enable pulse at terminal OE. Access and send the 8-bit contents of that location to data bus 95. When microprocessor 89 is ready to receive a new instruction, it sends the eight lower address bits of the next instruction to terminals D0-D7, pulses terminal ALE (address latch enable), and from data bus 95. This data is latched onto lower address bus 101 via address latch 105.
The microprocessor then sends the six high order address bits of the next instruction to terminals A0-A5 and sends a pulse to terminal PSEN (pulse enable). Upon receipt of the signal from PSEN, the program memory 97 reads the next instruction (or the 8-bit portion of the instruction) from the address location identified by the upper and lower address buses 103, 101, Terminal D0
The 8-bit contents of that address location will be loaded onto data bus 95 for delivery to D7.

The external RAM 99 supplements the internal RAM of the microprocessor and, as will be described later, is a 2-kilobyte CMOS R which serves as a temporary storage device for important data in case of power failure.
Includes AM. Since CMOS RAM is a volatile memory device, a battery-operated electrical backup device 106 is provided to maintain the information in external RAM 99 in the event of a temporary power loss at the voltage supply terminal V _S. It has become. An example of such a battery-backed CMOS memory device is disclosed in US Pat. No. 4,948,13.
No. 8 (Device for Maintaining Game State Audit Trail
Upon Instantaneous Power Failure). The external RAM 99 is composed of the upper and lower address buses 10
3, 101 and responsive to inputs from the read / write logic 107 to store a byte of information on the data bus 95 at a particular address or to be received by the microprocessor 89 at terminals D0-D7.
Sends the contents of the addressed register to the data bus. When the microprocessor 89 wants to read the contents of a particular address location in the external RAM 99, it will read the data bus 95 at terminals D0-D7.
The lower address bits are loaded into and the pulse is sent to the terminal ALE to latch this information on the lower address bus 101. The microprocessor then loads the 7 upper address bits onto the upper address bus 103, which is the 4 least significant bits (terminal A0) of the upper address.
~ A3) to the external RAM 99, and while sending a pulse to the read terminal RD,
The two most significant bits (at terminals A4-A6) are sent to read / write logic 107. Then read /
The write logic 107 demultiplexes the three coded bits of the data from the upper address bus 103 in relation to the pulse from the RD terminal and outputs the signal RX (read external RA
M) to the external RAM 99. When receiving the RX pulse, the external RAM 99 recovers the contents stored in the 12-bit address positions on the address buses 103 and 101, and outputs these contents to the data bus 95, which is connected to the terminals D0 to D.
At 7 it is received by the microprocessor.

The microprocessor 89 uses the external RAM 99.
Write one byte of data to the given address position of
That is, when it is desired to store, the lower address information to the lower address bus 101 is latched again via the address latch 105. The microprocessor 89 then sends the four upper address bits to the terminals A0-A3 and the external R
Send the 3-bit code for AM99 to terminals A4-A6. The read / write logic 107 then demultiplexes the external RAM code and sends the signal WX (write to external RAM) to the external RAM 99 along with the pulse from the write terminal WR of the microprocessor 89. At the same time, the microprocessor 89 loads the 8-bit data to be stored in the external RAM onto the data bus 95 via the terminals D0 to D7. When receiving the WX signal, the external RAM 99 reads the data from the data bus 95, and the data is specified by the data buses 103 and 101.
Store at 2-bit address location.

The read / write logic 107 receives signals from the microprocessor 89 relating to serial and direct (parallel) input / output (I / O) as the microprocessor 8.
It is also used to demultiplex to 9 and from microprocessor 89. As can be seen in FIG. 9, the microprocessor 89 includes a serial input circuit 109, a serial output circuit 111,
External devices (eg, sensors, solenoids, relays, and audiovisual displays) are in communication through the first and second direct input circuits 113 and 115 and the first and second direct output circuits 117 and 119. More detailed block diagrams of these circuits are shown in FIGS. 10 and 11, which show various circuit elements of the entertainment machine 1,
And the transfer of information from it.

Microprocessor 89 is programmed to send and receive data in one of two alternating ways, serially or directly, depending on the required speed of data processing. ing. Data that does not need to be processed immediately is handled serially and 3
Updated every second. On the other hand, data that must be processed more quickly is sent or received directly by the microprocessor 89. This will be described in detail later.

The preferred embodiment of control circuit 29 provides 48 serial outputs and 18 serial inputs. Although the following description concentrates on the input section and the output section used when implementing the reel monitoring function of the present invention, this control circuit 29
It should be understood that additional or "miscellaneous" inputs and outputs, such as sensors and audiovisual displays, must be dealt with to contact the user or service personnel to inform them of the machine status.

The serial input and output circuits 109, 111 operate in conjunction with the clock pulses from the serial clock 93 to latch the pulses from the read / write logic 107 and transfer the serial input / output information to the 8-bit data bus. 95
You can get in and out of.

The serial input circuit 109 uses a 24-bit parallel-serial shift register 121 to multiplex 24 individual digital input signals for delivery to the microprocessor 89. The shift register 121 includes a two-stage device having 24 input terminals PI, one serial output terminal SO, a data latch terminal L and a clock pulse terminal C. When the signal LSIO (serial input / output latch) is received at the terminal L, the shift register 121
Data appearing on the parallel input terminal PI of the first stage 2
Latched into a 4-bit buffer and applied to the input of the second stage 24-bit parallel-serial shift register.
Each time each clock pulse CLK is subsequently received at the terminal C of the shift register 121, the latched data is flipped up by one bit and the next bit of the serial input data is supplied to the terminal SO.

The output of the shift register 121 is sent to the serial input terminal SI of the serial input buffer 123. It buffers the serial data before sending it to the microprocessor 89. The serial input buffer 123 includes a single serial input unit S.
I, 8 parallel output terminals PO and clock, latch,
It includes a three stage device having enable terminals C, L, E. The first stage of the serial input buffer 123 has eight stages.
It includes a bit-series-parallel shift register, which is at terminal SI each time a clock pulse CLK is received at terminal C.
Shift in the data that appears in. Serial input buffer 1
The second stage of 23 includes an 8-bit latch which is responsive to a latching pulse LSIOB (serial input / output buffer latch) at terminal L from the second stage to the second stage output. 8 bits of data are latched.
After the second stage has latched the data from the first stage, subsequent clock pulses at terminal C can continue to shift in serial data without affecting the second stage output. Third of serial input buffer 123
The stage includes a tri-state (high, low, off) output buffer which responds to the enabling signal ESIB (enables the serial input buffer) with the second stage output bit to eight parallel output terminals PO. When the terminal E is not generating a pulse, a high impedance output (OFF) is generated.

The serial output circuit 111 includes a serial output buffer 125. The serial output buffer 125 receives continuous 6 bytes of data from the microprocessor 89 via the data bus 95, and sequentially outputs it to 48 bits serial-. Transfer to the parallel shift register 127. The serial-parallel shift register 127 outputs data in parallel and controls up to 48 external devices. Serial output buffer 1
25 includes a 2-stage 8-bit device, which operates in a similar manner as the 24-bit parallel-serial shift register 121 described above. The serial output buffer 125 has eight parallel input terminals PI for receiving data from the data bus 95,
48-bit serial-parallel shift register for serial data 1
It has a single serial output SO for sending to 27 and a latch controlling the conversion of the multiplicative parallel form to the serial form, clock terminals L, C. When a pulse LSIOB (Latch of serial input / output buffer) is received at the terminal L of the buffer 125, 8-bit data at the parallel input section PI is latched in the first stage 8-bit buffer and the second data is latched. It is sent to the input of the stage 8-bit parallel-serial shift register. When the clock pulse CLK is subsequently received at the terminal C of the serial output buffer 125,
The latched data is shifted to the serial output terminal SO through the second stage shift register, and the 48-bit serial-
Transfer to the parallel shift register 127.

48-bit serial-parallel shift register 12
7 includes a 3-stage device that operates in a similar manner as the 8-bit serial input buffer 123. Shift register 1
27 is a serial input terminal SI and a 48-bit parallel output terminal P
It has an enable, a latch, and clock terminals E, L, C that control the transfer of information between O and the three stages.
Upon receiving the clock signal CLK at terminal C, the single bit of data at terminal SI is latched into the first stage serial-parallel shift register. First stage is 48
When the pulse LSIO is received at the terminal L after being filled with the serial bit data, the first stage output section is latched to the second stage output section. The third stage output buffer gates the second stage output to terminal PO in response to the signal EDSO (direct, serial output enable) to generate up to 48 external device control signals. The signal EDSO includes a "watchdog" signal,
This signal enables all direct, serial outputs during normal operation of the control circuit 29 and disables (ie shuts off) all outputs in the event of microprocessor program failure. .

Serial I / O is performed in a 6 part cycle according to the serial I / O interrupt routine. This routine implements one of six parts of the serial input / output cycle (hereinafter referred to as the input / output cycle) for each operation. The microprocessor 89 is programmed to start a new interrupt routine every 250 microseconds, and this interrupt routine is serially connected to a routine for controlling the rotation and stop of the reel 2 (hereinafter, referred to as reel control interrupt). A routine for processing input / output (hereinafter referred to as serial input / output interrupt) is alternately executed. Therefore, a new serial I / O interrupt starts every 500 microseconds and
It results in one I / O cycle of one serial I / O interrupt, i.e. 3 ms. During each serial I / O interrupt, microprocessor 89
5, a new byte of serial output data is loaded, and the input / output logic 107 is instructed, and the microprocessor terminal A4
~ Send a 3-bit serial buffer code to A6, and connect to terminal W
This data is written to the serial output buffer 125 by sending a "write" pulse to R. reading/
The write logic 107 demultiplexes these signals from the microprocessor 89, and outputs the pulse LSIOB (latch of the serial output buffer 1) to the serial input buffer 123.
And to the serial output buffer 125. This signal writes this byte to the serial output buffer 125 by latching the byte on the data bus 95 into the first stage of the buffer. At the same time, the LSIOB latches one byte of serial input data from the first stage (serial-parallel shift register) to the second stage (octal latch) of the serial input buffer 123, and the serial input buffer 123 latches the serial input data by the microprocessor 89. Prepare the input byte for reading. The microprocessor then reads the serial information bytes latched into the serial input buffer 123 by pulsing the terminals RD and at the same time the terminals A4-A.
6 provides a 3-bit serial buffer code. These signals are demultiplexed by the read / write logic 107 and the read / write logic 107
Sends the signal ESIB (enabling the serial input buffer) to the serial input buffer 123 and the serial clock 93.
Send to the reset terminal of. Buffer 1 when receiving ESIB
The byte of serial data latched in 23 is the data bus 9
5 and read by the microprocessor at terminals D0-D7.

ESIB is also used to reset the serial counter 93 and start a new series of clock pulses CLK. The serial counter 93 is the oscillator 9
It receives a signal from 1 to 10 megahertz, divides this signal to a lower frequency by conventional digital counting logic, and then outputs a clock signal CLK containing 8 pulse "bursts". This burst signal is the signal ESIB
It is issued once every 500 milliseconds in response to the resetting of the clock 93 by.

The clock signal CLK is supplied to the 24-bit shift register 121, the serial input buffer 123, the serial output buffer 125 and the 48-bit shift register 127.
To clock the serial information flow through the serial input and output circuits 109, 111. After receiving the 8-bit pulse burst of the clock signal CLK, 2 bits of 8-bit data
The 4-bit shift register 121 is serially shifted to the first stage of the serial input buffer 123. At the same time, an 8-pulse burst of clock signal CLK clocks the 8-bit data of serial output buffer 125 into the first stage of 48-bit shift register 127. When the next serial I / O interrupt occurs, another byte of serial data is written from the microprocessor 89 to the serial output buffer 125, the first stage data of the serial input buffer 123 is latched to the second stage, and the microprocessor Read by. This process continues for six serial I / O interrupts, after which all 24 bits of the shift register 121 are registered in the microprocessor's internal RAM registers SINB1, SINB2, SINB.
3 (serial input bytes 1, 2, 3) and 48 bits of serial output are stored in internal RAM registers SOUTB1 to SOUTB1.
Clocked from OUTB6 (serial output bytes 1-6) to the first stage of shift register 127. Now, while the serial input buffer 123 is enabled during each serial I / O interrupt by pulsing the ESIB, only three of the six part I / O cycle serial I / O interrupts are serial input. It should be appreciated that the data is actually transferred to the microprocessor. Therefore, the "data" (or noise) made available by the serial input buffer 123 during the other three serial input / output interrupts is not stored in the internal RAM.

Next Serial I / O Interrupt (At the beginning of the first serial I / O interrupt of the next I / O cycle, microprocessor 89 sends a 3-bit code to terminals A4 to A6 and pulsing terminal RD. To load new data into the serial shift registers 121 and 127. The read / write logic 107 demultiplexes these signals and outputs the latch pulse LSIO (serial input / output latch) to the serial shift registers 121 and 127. Following this latch operation, the 48 parallel output terminals PO of the shift register 127 will contain 6 bytes of serial output data sent by the microprocessor 89 during the previous I / O cycle, which is the current I / O. It can be used to control up to 48 external devices during a cycle.
The shift register 121 has 24 parallel input terminals P.
It will be read by the microprocessor 89 during the current I / O cycle, including the last data sampling from I.

The control circuit 29 is currently working on another cycle of 6 serial I / O interrupts and repeats this cycle every 3 milliseconds to obtain an updated sampling of 24 input signals. , Provide updated control signals to the 48 serial outputs.

Of the 24 input signals appearing at the terminal PI of the 24-bit shift register 121, 23 signals are
It consists of miscellaneous inputs that are not relevant to the present invention and are therefore collectively referred to herein. The remaining input signals are provided by handle 83. The handle closes a switch (not shown) when pulled at the beginning of one round of the game, causing the Schmitt trigger 129 to send a handle pull signal. Schmidt Trigger 129
Sends a clean digital signal to one of the 24 parallel inputs PI of the shift register 121. This signal is converted at the end of the next I / O cycle to the designated bit in register SINB1 of the internal RAM. 48 bits
48 appears at the parallel output terminal PO of the shift register 127
Of the four output signals, 42 signals include miscellaneous outputs unrelated to the present invention and are referred to collectively herein. The remaining six signals are sent to the driver circuit 131, which amplifies these signals to an extent sufficient to drive the coil of the starting solenoid 53. Three of these six rotation start signals correspond to three start solenoids 53 in the described embodiment,
The other three signals can be used to control the starting solenoids of up to three additional reels, as desired.

The six rotation start signals are set under the heading operation of the microprocessor 89 according to the state of each of the six corresponding bits of the register SOUTB1, as will be described in detail later. Here, the numbers assigned to the six serial output registers and three serial input registers herein (eg, SOU).
It should be understood that TB1 and SINB1) were arbitrarily chosen. These numbers are not intended to indicate the preferred order of processing 6 serial output bytes or 3 serial input bytes, nor are the 6 serial output registers and 3 serial output registers in the attached Microfiche appendix. It does not correspond to the order of the serial input registers.

The control circuit 29 is a microprocessor 89.
It also provides direct (parallel) input and output of 2 bytes of data to and from the internal RAM of the. Most of the functions of the control circuit 29 are performed once every 3 milliseconds according to the I / O cycle, but some functions achieve the unique features of the present invention (eg, fast sampling of reel 2 by sensor 25). Requires faster decision and control capabilities. These functions are therefore directly controlled outside the I / O cycle by the direct input circuits 113, 115 and the direct output circuits 117, 119. The first direct input circuit 113 is used to send up to 8 bits of data (first direct input byte) to the microprocessor 89 regarding the status of the reel phototransistor 75 and the camshaft phototransistor 139. A three-reel entertainment machine will now be described for convenience, but the control circuitry to accommodate up to three additional reels 2 by varying the microprocessor program instructions contained in program memory 97. It should be understood that 29 can be easily modified. In this case, three of the four unused input bits of the direct input circuit 113 can be used to monitor the additional reel phototransistor 75. The fourth unused input bit is preferably left unconnected to simplify programming of the microprocessor 89. The six signals from the reel phototransistor 75 are digitized by a set of Schmitt triggers 141 and sent to the parallel input PI of the first direct input buffer 143 along with the input signal from the camshaft phototransistor 139. . Buffer 1
43 includes an octal 3-stage buffer (low, high, off), which responds to the enabling pulse at terminal E with 8 bits of information at input terminal PI at output terminal PO. Send to. When the microprocessor 89 wants to sample the first direct input byte, the microprocessor 89 outputs the 3-bit code corresponding to the direct input circuit 113 at terminals A4 to A6.
To generate a pulse at the terminal RD. Read / write logic 107 demultiplexes these signals,
The pulse EDI1 (enable direct input 1) is sent to the first direct input buffer 143. This buffer sends the data byte on data bus 95 to terminals D0-D7 of microprocessor 89.

The second direct input circuit 115 has a first
It operates in the same manner as the direct input circuit 113 and sends the second byte of the direct input data (the second direct input byte) to the microprocessor 89. The second direct input circuit 115 includes the first direct input buffer 1
It includes a second direct input buffer 145 which operates in the same manner as 43. Parallel input terminal P of the buffer 145
I is connected to eight miscellaneous inputs, for example, a phototransistor (not shown) that detects the open / closed state of the door to access the interior of the machine housing 147. When the microprocessor 89 wants to read the second direct input byte, it outputs a 3-bit code to the terminals A4-A corresponding to the second direct input circuit 115.
6 and pulse terminal RD. I / O logic 1
07 demultiplexes this signal, sends a pulse EDI2 (enabling direct input 2) to the enabling gate E of the buffer 145 and sends the second direct input byte via the data bus 95 to the microprocessor 89.
To terminals D0 to D7.

The first and second direct output circuits 117,
119 is used to output the first and second control data bytes to an external device that requires control signals at a rate faster than the three millisecond period of the I / O cycle. Such a first data byte (first direct output byte)
Controls the energization of stop solenoid 65 and the on / off state of cocking motor 52. The second direct output bite controls the on / off state of the LED 73 of the sensor 25.

The first direct output circuit 117 stores the first direct output byte, and the microprocessor 89
It includes a first direct output latch 149 which includes a two stage device feeding to. The first stage includes an octal latch that is responsive to a latching signal at terminal L to input and latch the data at PI to the first stage output. The second stage contains a tri-state buffer that gates the data from the first stage output to the parallel output terminal PO in response to the enabling signal at terminal E. This data is amplified by the driver circuit 151 and sent to the stop solenoid 65 and the kotoku mouta 52. If the microprocessor 89 wants to update the first direct output byte, it will:
3 bits corresponding to the first direct output latch 149
Code the terminals A4 to A6 and the pulse writing terminal WR
Issue to. The input / output logic 107 demultiplexes these signals and sends the latch pulse LDO1 (latch of the direct output 1) to the first direct output latch 149. At the same time, microprocessor 89 sends the data byte at internal RAM register DOUTB1 (direct output byte 1) to terminals D0-D7. This byte contains three bits corresponding to three stop solenoids 65 in the embodiment just described, and also three bits that can be used to control the stop solenoids of up to three additional reels. Contains a bit. One bit is also used to control the cocking motor 52. The remaining bits are preferably not connected to simplify microprocessor programming.

Upon receiving the latching pulse LDO1, the output latch 149 latches the data from DOUTB1 in the first stage. As mentioned above, the enabling signal EDSO is normally present, except in the case of microprocessor program failure. Therefore, the latched data is normally sent to the output terminal PO, amplified by the driver circuit 151, and stopped by the stop solenoid 65.
And sent to Koktingu / Mota 52. If the microprocessor program fails, the EDSO is pulled and the second stage buffer of latch 149 is disabled, switching all outputs of latch 149 to a high impedance (off) state.

The second direct output circuit 119 has the same circuit as the first direct output circuit 117, and includes a second direct output latch 153 and a driver circuit 155 corresponding thereto. Second direct output latch 153
Operates in the same manner as the first direct output latch 149, latches data into its first stage in response to a latching signal at terminal L, and in response to an enabling signal at terminal E. Allows the second stage buffer to output the latched data. If the microprocessor 89 wants to update the second direct output byte, it will transfer one byte of data to terminals D0-D0.
The data is sent to D7, a 3-bit code corresponding to the second direct output circuit 119 is issued to the terminals A4 to A6, and a pulse is given to the write terminal WR. The read / write logic 107 demultiplexes the signal and sends a pulse LDO2 to terminal L of the output latch 153 to latch the second direct output byte into the first stage of the second direct output latch 153. This byte contains 3 bits corresponding to the three LEDs 73 in the described embodiment, and also
Contains 3 bits that can be used to control the LEDs on up to 3 additional reels. The remaining two bits are preferably not connected to simplify microprocessor programming.

Since the enabling signal EDSO is normally present, the latched data is usually passed through the second stage of the second direct output latch 153 to the driver circuit 155, which amplifies the signals and outputs them. Send to LED73. If the microprocessor program fails, the signal EDSO is pulled out and the second stage buffer of latch 153 is disabled.
The output of the second direct output circuit 119 is turned off. Operation of Microprocessor 89 Microprocessor 89 operates according to a program stored in program memory 97. The sequence of steps performed by microprocessor 89 in accordance with the present invention is shown in the flowchart of FIGS. Here, the programs capable of performing the sequence of events shown in FIGS. 12-24 may vary according to the technique of the individual programmer and the desired function to be performed by the microprocessor in addition to the reel control and monitoring functions described below. It should be understood that it can take forms.

The operation of microprocessor 89 proceeds according to the main program and a series of periodic interrupt routines. Upon completion of a particular interrupt routine, the microprocessor returns to the last instruction of the interrupted main program and proceeds to process the main program until another interrupt request is received. The accompanying drawings are made in accordance with this feature, FIGS. 12-15 show flowcharts of the main program, and FIGS.
Reference numeral 24 indicates an interrupt routine. 16 to 23 show the reel control interrupt part of the interrupt routine, and FIG. 24 shows the serial input / output interrupt part. here,
When the term “interrupt routine” is used in this specification without adding “reel control” or “serial input / output”,
It should be understood that it is intended to refer to the entire interrupt routine shown in FIGS.

The main program shown in FIGS. 12 to 15 is executed in many states. Each state processes information about a particular function of the entertainment machine 1. For example, certain states may control data processing during "idle" mode between game rounds. Another state controls the movement of the machine after the player has inserted coins, another state can evaluate the amount to be paid following a game round, and so on. These states can be called "non-reel spinning state" because they relate to data processing work that occurs before and after the rotation of the reel 2 in one game round. These operations will be described in step A1 of FIG. 12 showing a flowchart for starting the reel rotation operation. At various points during the processing of the non-reel spinning state,
The microprocessor tests, as shown in step A2, to determine if the handle 83 has been pulled. If not, the program continues to handle the non-reel spin condition, and finally, at the next time, the microprocessor again tests whether the handle 83 is pulled. More specifically, one of the 24 bits of the serial input registers SINB1 to SINB3 is H level.
It is shown as a P (handle pull) flag. When the handle 83 is pulled, the corresponding bit of the shift register 121 is set upon receipt of the signal LSIO and the next input / output cycle transfers the content of that bit to the flag HP. At step A2 of FIGS.
Test P, and if set, go to reel spin state. This reel rotation state starts in the next step A2 (a).

At step A2 (a), the microprocessor 89 determines whether the 8-bit CMOS corresponding to the reel rotation state is present.
The code number is stored in the register STATE / C (this notation "C" is used to indicate the storage location of the CMOS external RAM 99). As we will see later, this register
Accessed after any power interruption to determine if power was interrupted in the reel spinning state.

At step A3, the microprocessor
8-bit register XTRATR (extra transfer)
Then, 1 bit of the 8-bit register SOFTEN (soft error enable) or "soft error flag" corresponding to each of the three reels is cleared to prepare for the reel rotation operation. XTRATR and SOF
TEN is used in connection with "soft error" processing. This "soft error" process is performed after each reel has stopped spinning to determine if the reel is actually stopped at the rotational position counted by the microprocessor.

As mentioned above, the signal to energize or "ignite" a given stop solenoid causes the field 79 of the encoding disk 19 which is intended to stop the reel 2 to be detected by the sensor 25 of the reel. Sent when entering zone 87. Since the sampling of the sensor 25 occurs every 500 microseconds, the processing of the stop solenoid signal is almost instantaneous with the time of 31.25 milliseconds passing through each field 79 during the free rotation of the reel. As a result, the only slight delay that occurs before the reel stops spinning is the stop response time, which is the pawl arm from the cocked position to the reel set position after the stop solenoid reacts and releases the reel. It is necessary for 31 to move. This stop response time is typically on the order of 12 milliseconds, so under normal stop conditions,
The control circuit 29 must not detect any positive track state transition after the stop solenoid pulse has been sent.

However, when a certain reel is stopped, 2
The combination of the two factors results in a "false" positive transition.
That is, a transition that does not coincide with the entry of the new field 79 into the detection zone 87 will occur. The first factor is increased stop response time, which is due to slow solenoid response or abnormal claw arm friction.
It occurs when the pawl arm 31 moves from the cocked position to the reel set position for more than 12 milliseconds after the pulse is emitted. In extreme cases, the pin 33 can contact the sprocket 9 just before the tip 157 of the tooth 159 (see FIG. 2) before it is considered to stop. This allows the sprocket 9 to rotate past the intended stopping point before contacting the pin 33, which in turn causes the pin 33 to rotate from the tip of the tooth 159 to the gap between the teeth 159, 161 (see FIG. 2). When moving into position A), the direction of rotation of the sprocket will be reversed.

The second factor that can contribute to the false positive transition is the rebound effect that occurs when the inertial motion of the spinning reel is abruptly stopped by the pawl arm 31. In particular, stopping the reel 2 causes the elastic stop head (FIG. 2) and the axle 164 (FIG. 1) to flex, which results in the pin 33.
The sprocket 9 is allowed to move slightly past the position where it first comes into contact with, and snaps back (in the reverse rotation direction) after the rotational inertia of the rotating reel is absorbed.

The above two factors allow some movement in the sprocket 9 so that false positive transitions can occur when the reels stop at even fields (other than F30). As you can see in Figure 7, F30
All even fields of the encoding disc 19 except for the wide (8 ° 50 ') slot (digital track) before the narrow (2 ° 25') bar (digital track state "0"). State "1") has an "even" field pattern, and every odd field has an "odd" field pattern with a narrow slot in front of a wide bar. Therefore,
When the sprocket 9 is stopped in an even field pattern, the sprocket 9 rotates past the negative transition at the end of the wide slot, then reverses direction and snaps back to the desired stop position and shifts position. Can be generated. A "soft error" process is a corresponding 8-bit position counter RL (N) POS (reel "N" for a reel of internal RAM, as this occurs without generating an error signal and usually after a positive transition. Position) is allowed to occur without incrementing.

On the other hand, the forward transition is the result of an excessively slow stop response time, after the tooth 159 was skipped, the pawl arm 31
If the is engaged with the sprocket 9, the soft error handling will recognize this and increment the reel position counter without issuing an error signal. In the preferred embodiment, the amount of overtravel resulting from mechanical deflection is small enough that if the track solenoid makes a positive transition after the stop solenoid operates in an odd field pattern,
The pin 33 can surely come into contact with the tooth 159 after passing through the tip 157. In this case, the sprocket 9 will continue to rotate until the pin 33 enters the gap 163 between the teeth 159, so the soft error handling recognizes this as a "true" positive transition and increments the reel position counter. Will be An error signal will only be generated if two positive transitions are detected before the sprocket is in the rest position (after energizing the stop solenoid in either odd or even fields).

In step A3 of FIGS. 12 to 15, XTRATR is cleared for soft error processing, and the reel bit is set to S.
After enabling it by setting it to OFTEN, the main program proceeds to step A4, where three bits corresponding to each of the three reels,
That is, the "reel start flag" is set in the 8-bit register RLSTRT (reel start) of the internal RAM and is used during the next reel control interrupt to energize the three start solenoids 53.

The main program then proceeds to step A5, at which step the 1-bit flag SPIN is entered.
IT (rotation initialization) is set in the internal RAM. As a result, the rotation initialization cycle starts, and the reels are rotated by the respective claw arms 31 during this period. That is, it is "kicked". And those tracks 7
7 is sampled by the sensor 25, but no spin test functions (direction, speed and acceleration) are performed, so that the reel can reach a constant spin speed without generating an error signal.

The main program of FIGS. 12-15 and FIG.
To simplify the description of the steps performed by the interrupt routines 24 through 24, the reels 2A, 2B, and 2C will be referred to as reel (0), reel (1), and reel (2) in the following description of the program, respectively. To here,
The numbers 0, 1, 2 used in this context correspond to the corresponding reel reference numbers 2A, 2 as described above with reference to FIG.
Note that it is not confusing with B and 2C.

At the next step A6, the main program instructs the microprocessor 89 to generate three random numbers and also to the internal RAM registers RN0, RN1 and RN2.
To store these random numbers (0, 1, 2). The first random number to be combined with the first reel (reel (0) or reference number 2A) is chosen with a lower limit of 32 and an upper limit of 63, so that the first reel is at least once complete before being stopped. Rotation (32 fields) will be performed. As a result, the synchronous positions of the fields F29, F30, F31 pass the sensor 25 of the reel (0) at least once, and the correct rotational position is determined in the counter RL (0) POS. Second and third random numbers (second
Reel (reel (1) or 2B), the third reel (combined with reel (2) or 2C),
It is chosen with a lower limit of 6 and an upper limit of 11 (all references to numbers other than 0 or 1 herein are in decimal notation). Since the second and third random numbers are sequentially counted after the first random number, each reel is
Have already made at least one revolution before the countdown,
The lower limit of the zero can be set without adverse effects. A lower limit of 8 is preferred to emphasize the sequential reel stop effect, which is well known to users of slot machines.

At step A6a, the microprocessor determines that the 8-bit CMOS register SGLTRF / C (CM
Clear the single transistor flag of the OS external RAM99. This register contains a 1-bit "single transition flag" for each reel, which is used during subsequent interrupt routines to determine if the corresponding reel has begun to spin after being kicked.

At step A7, the main program loops for 50 milliseconds while the reels are kicked. The 50 millisecond delay allows the pawl arm 31 to complete its movement from the reel set position to the reel rotation position before the cocking motor 52 is started.

At step A8, among the bits of the first direct output byte DOUTB1, the cocking motor 5
The bit corresponding to 2 is set to allow the cocking motor 52 to rotate during the next I / O interrupt.
Next, the main program performs a looping operation for 350 seconds in step A9, and the cocking motor 52 causes the finger 66 to move.
Sufficient time to move the camshaft positioning disc 68 from the "home" position given by. The main program then tests the register LASTVAL in step A10 to determine if the motor 52 has moved. LASTVAL (final value) is internal RA
M's 8-bit register, which stores the state of the input to the direct input circuit 113 during the last reel control interrupt. Therefore, one of the bits in LASTVAL contains the latest sample of phototransistor 139 in camshaft sensor 64. When this bit is high, the microprocessor 89 determines that the camshaft positioning disc 68 has moved from the home position and the motor 52 is operating properly. If low, this is because the finger 66 is blocking the light path from the LED 165 to the phototransistor 139 and the cocking motor 52 is stopped or running too slowly and needs repair. Is shown.

If the camshaft positioning disk 68 has moved from the home position in step A10, the main program clears the SPINIT flag in step A11 so that all spin test functions are performed during the subsequent reel control interrupt. obtain. Next, the main program proceeds to step A12 and executes a reel monitor routine which will be described later.

If disk 68 has not moved from the cheek position in step A10, the cocking motor bit in register DOUTB1 is cleared in step A13 so that motor 52 can be de-energized during the next reel control interrupt. To The main program then goes to the microprocessor accumulator to find the motor tilt error
The code is loaded and in step A15 a test is performed to determine if tilt (from another error source) is already in progress. If not in progress, the main program proceeds to step A16, as is well known in the art.
To branch to the process tilt routine. process·
In the tilt routine, the control circuit 29 stops normal operation and sends a motor tilt error signal to some position, eg a memory register or LED. This is checked by the operator to determine the cause of the tilt condition. Reel Monitor Routine FIGS. 13-15 illustrate the operational steps of the microprocessor 89 in the reel monitor routine, the embedded random count subroutine, and the transition check subroutine. During the reel monitor routine, the main program counts down the random number generated for each reel in association with the interrupt routine that monitors the rotational position of the reel, stops the reel, and stops the reel at the intended rotational position. Check to make sure.

In step B1, the general-purpose register TEMP1 of the internal RAM in which the numeral 0 corresponds to the reel (0) (this notation TEMPX is a general-purpose or "temporary" register number X).
, Which is used to identify), and the first reel is counted down. After each reel is counted down, the number N of TEMP1 is incremented by 1 to indicate which reel is currently being monitored. Therefore, N =
If 0, the routine will monitor reel 2A, if N = 1, it will monitor reel 2B,
When N = 2, the reel 2C is monitored.

In step B2, the program determines whether the reel "N" (reel numbered TEMP1, in this case reel (0)) is rotating by testing the register PLSPNF (reel rotation flag),
It is determined whether the bit corresponding to the reel (N) is set. RLSPNF is an 8-bit register in internal RAM that is set at the first reel control interrupt after the handle 83 is pulled, and once in the interrupt routine when the stop solenoid 65 corresponding to that bit is energized. Cleared bit by bit. If RLS
If the PNF's reel "N" bit is set, the program proceeds to step B3, where the random count subroutine is called. The random count described below in connection with FIG. 14 gets the random number being generated for reel (N) and decrements it each time a new field passes sensor 25, stopping reel (N). The solenoid 65 can be biased. The program then returns to step B4 of FIG. 13 where it again tests the reel (N) bit of RLSPNF and loops until it is cleared (in the interrupt routine). This indicates that the stop solenoid on reel (N) has been de-energized and the reel is (or should not) be spinning.

At step B5, the reel position counter RL
The contents of the (N) POS are sent to the register RL (N) POS / C of the CMOS external RAM 99 to save the contents in case of a power failure that might erase the data in the volatile internal RAM of the microprocessor. When the reels are spinning, the control circuit 29 samples the sensor 25 on each reel during each reel control interrupt. If one of the reels is moving to a new field, the contents of the position counter for that reel is incremented by 1 to indicate the current rotational position of its corresponding reel. Therefore, by transferring these contents to the CMOS memory in step B5, after the reel (N) is stopped, the microprocessor determines whether the reel has moved during a power failure,
Appropriate operations can be performed as described below.

At step B6, the bit corresponding to the reel (N) is the 8-bit CMOS register DONE / C.
Is set to indicate that the reel has run (i.e., spun to a new spin position and then stopped). In case of a power failure, the microprocessor will take a power-on procedure. At this time, the microprocessor first checks the register STATE / C to determine whether the reel rotation state was being processed at the time of the power failure.
If so, the microprocessor determines that register D
Test ONE / C to determine if all reel bits in that register have been set. If not, the microprocessor generates new random numbers for reels that were not set (ie, did not complete spinning at power failure) and re-spin these reels accordingly and then stop. The microprocessor also spins reels for which the DONE / C bit was not set, but does not generate new random numbers. These reels are stopped at the same position as they were at the time of power failure. This position is stored in the register RL (N) POS / C corresponding to each reel.

If all reel bits of DONE / C were set before the power failure, or if the microprocessor was not in a reel spin state, the microprocessor will re-spin all reels and Return to the position stored in the RL (N) POS / C, which was stopped before the power failure occurred.

If the reel (N) bit of register DONE / C is set in step B6 of the reel monitor routine, the main program proceeds to step B7, where the transition check subroutine is called. The migration check subroutine (discussed below with reference to FIG. 15) is used in conjunction with register XTRATR, step B of the reel monitor routine.
It is determined whether or not the reel stopped in the previous repetition from 2 to B10 (that is, the reel (N-1)) has made the transition to the extra normal field state, and if not, the position counter RL of the reel. (N-1) P
Determine if the OS should be corrected.

After the main program returns from the shift check subroutine of step B7, the main program proceeds to step B8 where the bit corresponding to reel (N-1) of the SOFTEN register is cleared. This means the end of soft error handling for reel (N-1), so that if any positive transition is detected for that reel after this point, an error signal is generated and the reel Indicates that it has moved after trying to stop.

Next, the reel monitor routine proceeds to step B9, where the value of the register TEMP1 (including the number of reel (N)) is incremented by 1 corresponding to the number of the next reel to be monitored. To be done. Step B10
The program then tests to see if the content of TEMP1 is less than 3, and if not, returns to step B2 and repeats steps B2-B10 for the next reel. If the value of TENP1 is equal to 3, it indicates that the stop solenoid 65 of the third reel has just been de-energized and the program proceeds to step B1.
Proceed to 1 where the program loops until the spin flag of the last reel (the RLSPNF bit corresponding to reel (2)) is cleared during the interrupt routine. The program then proceeds to step B12, where a delay of approximately 88 milliseconds is provided to ensure that the last reel has stopped moving. The program then proceeds to step B13, where the transition check subroutine is called for the last reel. When the program returns from the shift check / subroutine, the program returns to step A1 in FIG. 12 to process the non-reel spinning state.

FIG. 14 shows the processing sequence of the random count subroutine called in step B3 of the reel monitor routine. Step C1
So the random count subroutine is register RN
Access (N). This register contains the random number generated for reel (N) in step A6 of FIG. This random number is then stored in general register TEMP2, which is used as the "total counter" for reel (N) during the random count subroutine. Here, the random number of reel (0) is 32 to
Recall that the random numbers chosen in the range of 63 and reel (1), reel (2) were chosen in the range of 6-11. The program then proceeds to step C2 where it loops until the next serial I / O interrupt is complete. After the completion of the I / O interrupt is detected in step C3, the program proceeds to the register NUFLD.
Access (new field) to determine if the reel (N) bit of that register is set. NUFLD is an 8-bit register in internal RAM that has one bit, or "new field flag," assigned to each reel. During each reel control interrupt, the microprocessor determines if the field state of any reel is undergoing a positive transition, and if so, sets the corresponding flag in that reel to NUFLD and sets a random count. -Used in a subroutine. If it is determined in step C3 that the NUFLD reel (N) flag is not set, the program returns to step C2, and steps C2 and C3 are performed until it is determined that the NUFLD reel (N) flag is set. Loop operation between. The program is
Then, the process proceeds to step C4, where the register N
All new field flags in UFLD are cleared. At step C5, the random number on reel (N) is counted down by decrementing the contents of register TEMP2 by one. Therefore, the register TEMP2
Keeps track of the total number of fields on reel (N) that have passed sensor 25 since the start of the random count subroutine.

At step C6, the microprocessor
Determine if the number stored in TEMP2 is zero. If not zero, return to step C2. Next, the program loops between steps C2 and C6 until TEMP2 becomes zero. At the time of reaching zero, the reels (N) have their respective registers RN
Rotate over a number of fields equal to the random number stored in (N). Then the program proceeds to step C7,
There, the stop solenoid 65 of the reel (N) is energized. More specifically, the microprocessor accesses the register DOUTB1 and sets the reel (N) bit of that register. The microprocessor then sends the new value of DOUTB1 to terminals D0-D7 of the microprocessor and issues the 3-bit code corresponding to the first direct output circuit 117 to terminals A4-A6,
A pulse is given to the write terminal WR. Then read /
The write logic 107 outputs a pulse LDO1 that latches the new value of DOUTB1 via the data bus 95 to the first
To the stop solenoid 65 of the reel (N). In step C8, the register SONTMR (solenoid on timer) is loaded with the binary equivalent decimal number 14. S
ONTIM is an 8-bit internal RAM register that is used during the interrupt routine to clock the duration of the stop solenoid signal that energizes the appropriate stop solenoid 65 for 7 milliseconds. After SONTMR is loaded, the program exits the random count subroutine, step B3 of the reel monitor routine.
Return to.

FIG. 15 is a flow chart of the shift check subroutine called from the reel monitor routine in steps B7 and B13. At step D1 of the migration check subroutine, the microprocessor
Test reel (N-1) of register XTRATR,
The track condition of the reel determines whether the stop solenoid 65 has been energized and has made a single positive transition. Recall that XTRATR is cleared in step A3 of the main program, along with the enabling of "soft error" processing. Then, as long as soft error handling is enabled (as determined by register SOFTEN), the 1-bit extra transition flag corresponding to a given reel will cause its sensor 25 to be activated after the stop solenoid 65 for that reel has been energized. Set to XTRATR during the interrupt routine if a positive track state transition is detected. If the second positive transition is detected, an error signal is sent indicating incorrect reel movement. However, if only one positive transition is detected during soft error processing, the microprocessor will not issue an error signal, as the transition may be a "false" positive transition, as described above. In this case, a migration check subroutine is used to determine if a true or false positive transition has occurred and set the position counter for that reel accordingly.

Since the microprocessor processes instructions at extremely high speeds relative to the speed of rotation of the reels, the transition check subroutine will activate the reel stop solenoids until the reels have yet to settle to their final stop position. It cannot be executed for a given reel immediately after being energized. Therefore, after the stop solenoid for the reel (N) is energized (at step C7 of the random count), the transition check subroutine is executed for the reel (N).
Test -1) and allow reel (N) to settle to its final stop position while spinning. If the reel (N) is the first reel 2A (N = 0), or if the reel (N-
1) If the extra migration flag is not set,
The program returns to the reel monitor routine step from which the migration check subroutine is called (either step B7 or B13). If not, the program proceeds to step D2. Step D2
At, the extra transition flag register of the reel (N-1) in the XTRATR is cleared. Reel (N-
Since 1) is now stopped, any subsequent set of its extra transition flags will indicate incorrect reel movement and will generate an error signal.

As explained above in connection with step A3 of FIG. 12, if the signal energizing the stop solenoid 65 of a given reel is of odd field pattern (narrow slot / wide bar). If sent at the starting point and the extra transition flag for that reel continues to be set, the microprocessor has determined that a "true" positive transition has occurred and the sprocket 9 is at the position stored in the reel's position counter. It is judged that the rotation was exceeded and the rotation was skipped to the next rotation position. Therefore, steps D3 to D6 are RL
(N-1) Test whether the field number stored in the POS is an odd field pattern or an even field pattern, and thus whether the positive transition noted in step D1 is true or false. It is used to judge.

Since field F30 is the only even numbered field with an odd field pattern,
The program determines whether the field number stored in register RL (N-1) POS is equal to 30 in step D3. More specifically, this number is sent to the accumulator of microprocessor 89 to determine if its contents equal 30. If so, the microprocessor converts this number to an odd number in step D4 by supplementing the accumulator and proceeds to step D5. If not, RL (N-
1) The pattern of the field number of the POS coincides with the even or odd state of its contents, and the program proceeds to step D.
You can go directly to 5. In step D5, the microprocessor divides the contents of the accumulator by 2 (shifts all bits to the right by 1) and determines if an "carry" bit indicating an odd number has occurred, RL (N- 1) Judge whether the content of the POS is even or odd. If the field number is even, this indicates that the stop solenoid 65 of reel (N-1) has been energized in an even field pattern and the microprocessor indicates that reel (N-1) is actually RL.
It must be determined if it stopped at the (N-1) POS field number or if it was skipped to the next rotational position. The program therefore proceeds to step D6, where it determines whether the sensor 25 on reel (N-1) is currently showing an odd or even field pattern. More specifically, microprocessor 89 accesses register LASTVAL. This register is used by the reel phototransistor 7 during each reel control interrupt.
5 and the state of the camshaft phototransistor 139 is loaded with the closest magnetic value of the first direct input byte. The bit of LASTVAL corresponding to the phototransistor 75 of the reel (N-1) is RL (N
-1) It can be used to determine whether the content of the POS matches the actual stop position of the reel (N-1).

When the reel is properly positioned with respect to its corresponding sensor 25 and pawl arm 31, the reel will follow the 12 msec expected stop response time of the spin management module 27 to the end of its track condition. The intended stop position will be reached in about 12 milliseconds after the forward shift. Since the reel is rotating at a speed of 31.25 ms / field (1 revolution / second), this stop position is past the starting point of the field where the detection zone 87 of the sensor 25 intersects it and the field width ( 11 ° 15 ')
12 / 31.25 or a little over 1/3 of that. Therefore, if the reels stop in an even field pattern, the sensing zone 87 will intersect the slot 69 of the encoding ring 19 (track state 1). If stopped with an odd field pattern, the detection zone is bar 7
1 (track state 0).

Therefore, if the microprocessor
It is determined that the RL (N-1) POS contains an even number other than 30 (steps D3 and D5), and the sensor 25 of the reel (N-1) is determined by testing the corresponding bit of LASTVAL in step D6. If it is determined that the 1-track state (even field pattern) is being read, the forward transition detected in step D1 is determined to be a false transition, and the contents of RL (N-1) POS are It remains unchanged. The program then returns to the step of the called reel monitor routine. However, if these decisions are not made, the program proceeds to step D7, where the microprocessor increments the contents of RL (N-1) POS by one.
At step D8, the increment value of RL (N-1) POS is 32.
, And if not, the microprocessor transfers the contents of its register to the external RAM 9
9 to the RL (N-1) POS, and in step D9, the contents are saved in case of power failure. If the new value is equal to 32, the microprocessor determines that the reel has stopped at F0 and the contents are RL (N-1) P at step D9.
RL (N-1) POS at step D10 before sending to OS
To clear. The program then returns to the step of the called reel monitor routine (B7 or B13). Interrupt Routine FIGS. 16-24 are flowcharts of the above interrupt routine called by the microprocessor 89 every 250 microseconds when a periodic signal is generated from the internal interrupt clock of the microprocessor 89. In step A1, the microprocessor stores various states regarding the part of the main program in which the interrupt is called. Therefore, after the interrupt routine completes,
The main program can be processed continuously from the steps that remain off. In step A2, the microprocessor determines which type of interrupt is to be implemented in the current interrupt routine according to the state of the serial I / O flag SIOF. SIOF
Is a single bit in a designated 8-bit register of internal RAM and is set each time another passes through the interrupt routine. If set in step A2, the program implements a serial I / O interrupt, as described below in connection with FIG. If not set in step A2, the program implements a reel control interrupt beginning in step A3. Therefore, serial I / O interrupts and reel control interrupts
Each is performed once every 500 microseconds.

After determining in step A3 that SIOF is not set, the microprocessor sets it so that the next interrupt routine will implement a serial I / O interrupt. At step A4, the last sampling of the reel phototransistor 75 and the camshaft phototransistor 139 is the external CMO.
It is transferred from the register DINB1 / C (direct input byte in CMOS) of the SRAM 99 and sent to the general-purpose register TEMP3 in the microprocessor 89. D
INB1 / C is updated for each serial input / output interrupt, and the last input value is reflected in the first direct input circuit 113.

At step A5, the microprocessor
If so, determine which reel has made a positive or negative field state transition since the last reel control interrupt. More specifically, the contents of register LASTVAL (register DINB1 from the last reel control interrupt
(Including the value of / C) is sent to the accumulator of the microprocessor and is exclusively OR-ed with the contents of TEMP3 (new sample), which results in the bit of TEMP3 having changed since the last reel control interrupt. It will be. The result is stored in register TEMP4 and the program proceeds to step A6, where
New optical sample of register TEMP3 is LASTV
It is stored in the AL and replaces the previous optical sample bite.

At step A7, the microprocessor
Which of the sample transitions from step A5 is positive (low-high)
A transition is determined by performing an AND operation between the contents of registers TEMP3 (new optical sample) and TEMP4 (sample transition). The result of this operation is stored in the register TEMP3, and step A6
Replaces the new optical sample information stored in LASTVAL. At step A8, the microprocessor sets the register SGLTRF (single shift flag).
A single transition is set for each reel making a positive transition in to indicate that each reel has begun to move. SG
LTRF is a bit corresponding to each reel, that is,
An 8-bit register in internal RAM with a "single transition flag". This register is used in connection with the Reel (N) Sloo routine. This will be described later with reference to FIG.

At step A9, the program executes T
Test EMP3 (forward transition) to determine if the bit corresponding to the camshaft phototransistor 139 is set. This indicates that the edge of the finger 64 of the camshaft positioning disc 68 has just passed the sensor 64 and the camshaft 50 has completed one revolution. If so, the program proceeds to step A10 where the DOUTB1 cocking motor bit is cleared and the new value of DOUTB1 is latched in the first direct output circuit 117 to deactivate the cocking motor 52. To do. If not set, the program bypasses step A10 and proceeds directly to step A11. At step A11 of the reel control interrupt, the microprocessor registers RL.
Test the STRT to determine if the reel should be kicked. If not, the program branches to step A16, as described below. Where F
Recall that LSTRT is an 8-bit register in internal RAM that has a bit or "reel start flag" corresponding to each of the three reels of the entertainment machine. These flags are used in step A1 of the interrupt routine.
Tested at 1, and if set, the microprocessor proceeds to step A12, where
The corresponding start solenoid 54 is energized. For example,
When the handle 83 is pulled, all three reel start flags are set in step A4 of the main program. In this case, the microprocessor proceeds to step A12 at the next reel control interrupt and sets all three specified bits in register SOUTB1 used to control the energization of the three corresponding start solenoids 53. The starting solenoid 53 is activated. At the end of the next serial input / output cycle, rotation start signals 1, 2, 3 are sent from the driver circuit 131 to each of the three stop solenoids 65 to cause the corresponding pawl arm 3 to move.
It will be 1 to kick the reels 2A, 2B and 2C.

It should be appreciated that not all three reels need be kicked at step A12. For example,
If a tilt condition occurs when some reels are spinning and the other reels are stopped, especially if the reels that are stopped display the point mark 8, It is better not to re-kick the stop reel after the is cleared. In this case, the microprocessor
When the tilt is cleared (for example, by opening and closing the door to access the machine interior), only the reel start flag corresponding to the reel that is spinning when the tilt occurs occurs in the register DONE / C state. (Set in step B6 of the reel monitor routine shown in FIG. 13).

At step A13, the reel rotation flag of RLSPNF corresponding to the reel kicked at step A11 is set. These flags will remain set until the stop solenoid of the corresponding reel is activated in a later interrupt routine.

At step A14, the register RLSTRT set in step A4 (FIG. 12) of the main program and enabling the reel kick is cleared. Next, in the register SONTMR, step A15
Then, the binary equivalent of decimal 14 is loaded. This number is counted down at reel control interrupts at 500 microsecond intervals, giving a solenoid on time of 7 milliseconds. Next, the program proceeds to step A16.
Proceed to.

At step A16, the microprocessor tests the register SOUTB1 to determine which starting solenoid 53 is currently energized. SOUT
If B1 is cleared (indicating that no start solenoids are energized), the program proceeds to step A20.
Go to. Otherwise, the contents of SONTMR are incremented by 1 in step A17 and the program proceeds to step A1.
Proceed to step 8 where the microprocessor determines if the new content is equal to zero. If it is zero, the microprocessor proceeds to step A19 at SOUT.
B1 is accessed and the bit that controls the rotation start signal of the serial output gadget 131 is cleared to deactivate the start solenoid 53 after the end of the next I / O cycle. Then the program proceeds to step A20. Alternatively, if the contents of SONTMR in step A20 are not equal to zero, the program will bypass directly to step A20.

At step A20, the microprocessor tests DOUTB1 to determine which of the three bits corresponding to stop solenoid 65 is set. If not, the microprocessor determines that none of the stop solenoids are energized,
Bypass to step A26. Otherwise, the program proceeds to steps A21, A22, where
Microprocessor is solenoid timer SONTMR
Is decremented by 1, and if the new value of SONTMR does not equal zero, then bypass to step A26. SONTM
If R is equal to zero, the microprocessor determines that the energized stop solenoid should be de-energized and performs steps A23-A25.

At step A23, the register RLSPNF is used.
Is accessed and the stop solenoid is energized (ie, its DOUTB1 bit is set), the reel spin flag is cleared, indicating that the reel is stopped. At step A24, the microprocessor 89 clears the corresponding bit of DOUTB1 and sends the new contents of this register to the first direct output circuit 117 to turn off the deenergization solenoid 65. The microprocessor then proceeds to step A
25, the new contents of DOUTB1 are changed to DOUTB1 / C
And save the state of the first direct output byte in case of power failure.

At step A26, the microprocessor accesses NUFLD and sets a new field flag for each reel making a positive transition. More specifically, the contents of TEMP3 (positive sample transition) are ORed with NUFLD, resulting in the new field flag that was previously set remaining set and the field flag that was not set. Are set at this time if their corresponding reels have made a positive field state transition since the last reel control interrupt. Thus, NUFLD can be used in a random count subroutine to determine when each reel makes a positive field state transition.

The program then proceeds to steps A27, A
28, proceed to A29. Here, the reel (0) test, the reel (1) test, and the reel (2) test routine are successively executed as described later. In step A30, the microprocessor state stored in step A1 of the interrupt routine is retrieved and the microprocessor can continue processing the main program from the time the interrupt routine is called. 16 and 1
When the 7 interrupt routine is complete, the microprocessor returns to the main program. Reel (N) Test Routine FIGS. 18-21 show step A in the interrupt routine.
27 shows the processing steps of each routine of the reel (0) test, the reel (1) test, and the reel (2) test of A29. Since these three reel test routines involve approximately the same processing steps, FIGS. 18-21 (and related FIGS. 22 and 23) describe a single routine referred to as the "reel (N) test." Therefore, in step A27 of the interrupt routine, the steps of FIGS. 18 to 21 are executed with N = 0 (first reel 2A), and in step A28, N = 1 (reel 2B), step A.
In 29, N = 2 (reel 2C). For ease of explanation, the reel (N) test routine is N = 0.
Is related to step A27 of the interrupt routine.

At step B1, the microprocessor
Test RLSPNF to determine if the reel rotation flag for reel (0) is set. This indicates that reel (0) is spinning or must be spun. If the flag is not set, the program proceeds to the non-rotation routine described below. If set, the microprocessor determines if a positive or negative transition has occurred on the closest optical sample of phototransistor 75 on reel (0). More specifically, the register TEMP4
(Sample transfer--see step A5 in FIGS. 16 and 17)
Are accessed and the reel (0) bit is tested.
If it is clear, the program proceeds to step B3 where the 8-bit register S of the internal RAM is
AMCTR (0) (reel (0) sample counter) is incremented by one. SAMCTR (0) stores the number of optical samples of phototransistor 75 on reel (0) since the last field state transition of reel (0) was detected. Therefore, it is step B3
, And is cleared each time a positive or negative optical sample transition is detected, as described below. Step B4
Then, the microprocessor determines whether SAMCTR (0) is equal to zero. This indicates that 2 @ 8 optical samples have been counted since the last transition. If so, the reel is spinning too slowly and the program bypasses the reel (N) slow routine described below. Otherwise, the reel (0) test ends and the program proceeds to step A28 of the interrupt routine.
Go to.

Returning to step B2, if an optical sample transition is detected for reel (0), the program proceeds to step B5, where it is determined whether the transition is positive or negative. . Register TEMP
If 3 (positive transition) is accessed and the bit corresponding to reel (0) is clear (indicating that the transition is negative), then the microprocessor writes the contents of SAMCTR (0) internally in step B6. Send to RAM 8-bit register SEG1R (0). SEG1R (0) stores the number of reel (0) optical samples counted, while
The first segment of each field 79 intersects that reel's phototransistor 75, which is used in subsequent reel (0) test routines. SAMCTR
(0) is then cleared at step B7 to complete the reel (0) test routine and the program proceeds to step A28 of the interrupt routine.

If a positive optical sample transition is detected at step B5, the program proceeds to step B8, where the microprocessor tests the SPINIT flag to determine if rotation initialization is in progress. . As described above in connection with step A5 of FIG. 12, the spin initialization provides a short delay before the spin test function (direction, velocity, acceleration) of the microprocessor is performed, so that the reels will not receive the error signal. It is possible to reach a constant rotation speed without generating SPINIT
If is set, the program goes to step B1.
Bypass to 7, if not, the microprocessor proceeds to step B9, where the test for reel reverse rotation is started.

At step B9, the microprocessor
By comparing the contents of SAMCTR (0) with the contents of SEG1R (0), it is determined whether the field last passed through the sensor 25 of the reel (0) is included in an odd or even field pattern. To do. SAMCTR (0) now contains the number of samples counted in the second segment of the last field, ie the "second segment count", and SEG1R
(0) contains the number of samples counted in the first segment of the field, the "first segment count". If the 1st segment count is the 2nd
If it is less than or equal to the segment count, the microprocessor determines that the last field pattern is odd (narrow slot / wide gutter), based on the assumption of correct rotation direction. It is determined and the process proceeds to step B10. The second segment count is then divided by two in the accumulator to produce a modified second segment count. In step B11, this modified second segment count is compared to the first segment count to determine if the reel is spinning in the correct direction of rotation. Since the width of the second segment of the odd field pattern is greater than three times the width of the first segment, the modified second segment
The count also must be greater than the first segment count. In this case, the microprocessor determines that the reel (0) is still rotating in the correct rotation direction, and proceeds to step B17. However, if the reel is rotating in the wrong direction (counterclockwise in FIG. 6), registers SAMCTR (0), SEG1R
The width of the two segments corresponding to (0) will be equal,
Therefore, each segment count is determined in the next step of the reel (0) test routine. If the reel speed and acceleration are within the permissible limits, the segment counts will be so close that the test in step B11 will fail. Will be done. In this case, the program bypasses to step B12, where the reel (0) reversal error code is loaded into the microprocessor's accumulator and the program proceeds to step B13 where the microprocessor determines if the tilt (another error (From source) is already in progress. If not, the program processes in step B14.
By-passing to the tilt routine, where the control circuit 29 can be checked by repair personnel to determine the cause of the tilt condition, such as a memory.
Send a reel (0) reverse rotation error signal to the register or LED. If the tilt is already in progress at step B13, the reel (0) test routine ends and the program proceeds to step A28 of the interrupt routine, where the reel (1) test routine is performed.

If the second segment count is less than the first segment count in step B9, the microprocessor determines that the last field pattern is an even number (wide slot / wide slot / It is determined that it is a narrow bar), and step B1
5. Go to B16. Steps B15, B16 are B10, B11 for even field patterns (microprocessor tests for correct rotation direction).
Is the counter part of. The first segment count is divided by two in the accumulator and compared to the second segment count. If the modified first segment count is high, the program proceeds to step B17, if not, the program bypasses steps B12 to B14 where the reel (0) reverse error code is loaded. And processed as described above.

At step B17, SAMCTR (0),
The first and second segment counts in SEG1R (0) are added in the accumulator to determine the total number of samples (new field count) counted when the last field passed sensor 25. At step B18, this new field count is divided by two by rotating the contents of the accumulator to the right by one, and then at step B19 an 8-bit count.
The contents of register FLDCNT (0) (field count for reel (0)) are exchanged. The modified new field count is stored in FLDCNT (0) and the preceding "modified old field count" is now in the accumulator.

At step B20, the microprocessor again determines whether spin initialization is in progress by testing SPINIT. If so, the program bypasses to step B32, otherwise proceeds to step B21. The modified old field count stored in the accumulator is 1
It is compared to a "minimum speed" constant equal to the base number 45. If the modified old field count is greater than 45, this means that the corresponding field is sensor 25.
Over 90 samples (i.e., 45 ms) to go through are taken, indicating that the reel is spinning too slowly. If not, the program goes to step B2
Proceed to step 2, where the microprocessor determines that the modified old field count is 25 "top speed".
Determine if it is greater than a constant. If so, the reel is spinning at speeds within acceptable limits,
The program proceeds to step B24. Otherwise,
This indicates that the corresponding field acquired less than 50 samples to pass sensor 25, i.e. 25 ms. Therefore, the rotation of the reel is too fast. If step B21 or B22 indicates that the reel is spinning too slow or too fast, the program proceeds to step B23, where the reel (0) speed error code is loaded into the accumulator. Next, the program proceeds to step B13 to determine whether the tilt is in progress. If it is in progress, the reel (0) test routine ends. If not, the program proceeds to step B14 and processes the tilt routine in which the reel (0) speed error code is used to indicate that the tilt was caused by a speed error on reel (0). .

At step B24, the microprocessor begins the test for incorrect reel acceleration by subtracting the modified new field count in register FLDCNT (0) from the modified old field count in the accumulator. In step B25, the microprocessor determines if the difference is positive (if the new field count is less than or equal to the old field count) or negative. If this difference is positive (indicating whether the reel is accelerating or maintaining a constant speed),
The program proceeds to step B26, where 1
The "maximum acceleration" constant equal to the decimal number 8 is subtracted from the modified field count difference to produce the "acceleration difference", which is tested in step B27. If the acceleration difference is negative, this indicates that the difference between the last two field counts is less than 16, so the reel acceleration is within acceptable limits. The program proceeds to step B32. On the other hand, if the acceleration difference is greater than or equal to zero in step B27, this indicates a difference of 16 or more samples between the last two field counts, which exceeds the allowable acceleration limit. ing. The program then proceeds to step B28, where the accumulator is loaded with the reel (0) acceleration error code. The microprocessor then proceeds to step B13 and terminates the reel (0) test routine if tilt is in progress. If not, the tilt is processed in step B14, where the microprocessor indicates that the tilt was caused by excessive acceleration of reel (0).

If a negative modified field count difference is determined in step B25, this is reel (0).
Indicates that the vehicle is decelerating, and the program bypasses steps B28 to B31 to determine whether the deceleration is within the allowable limit. In step B29, the absolute value of the modified field count difference is obtained by supplementing the contents of the accumulator. A "highest deceleration" constant equal to the decimal number 8 is then subtracted from this number,
"Deceleration difference" is given. In step B30, the microprocessor determines whether the deceleration difference is negative, and if not, proceeds to step B32. If the deceleration difference is positive or equal to zero, this indicates a difference of at least 16 samples between the old and new field counts, which exceeds the allowable deceleration limit. . Therefore, the program proceeds to step B31 where the reel (0) deceleration error code is loaded into the accumulator. The microprocessor then proceeds to step B13 and determines whether tilt has already progressed. If so, the reel (0) test routine is complete,
The tilt is processed to indicate that the cause of the tilt was a deceleration error of the reel (0).

When the microprocessor reaches step B32, it is considered that the reel (0) is rotating correctly, and the microprocessor detects its position counter RL (0).
Update POS. In step B32, the microprocessor determines that the modified new field count stored in register FLDCNT (0) is SAMCTR.
It is determined whether it is smaller than the second segment count stored in (0). Since the modified new field count is half of the total new field count, a negative determination at step B32 indicates that the new field count is even, and the program proceeds to step B33, where The number 3 is loaded into the 8-bit internal RAM register SYNCTR (0) (synchronous counter for reel (0)). next,
The microprocessor detects the position counter R in step B24.
The L (0) POS is incremented by 1, and the process proceeds to step B38.

If the modified new field count was less than the second segment count in step B32, the microprocessor determines that the new field pattern is odd and determines in step B35.
Decrements the synchronous counter SYNCTR (0) by 1.
In step B36, it is determined whether the contents of SYNCTR (0) is equal to zero. If it is not zero, it is determined that the new field is not F31, the program proceeds to step B34, and the position counter RL (0) PO
Increment S. If SYNCTR (0) is equal to zero in step B36, this means that three consecutive old field patterns have passed, and thus the new field (ie, the field that last passed sensor 25 of reel (0)). ) Indicates F31. Therefore, the program proceeds to step B37,
At this time, the position counter RL (0) POS is cleared, and then the process proceeds to step B38. The sample counter SAMCTR (0) is then cleared, so
The next reel control interrupt will begin counting the number of samples in field F0 and the reel (0) test routine will end. Then the program is step A
Proceed to 28, where the reel (1) test routine is performed for reel 2B.

FIG. 22 shows a non-rotation routine that the reel (N) test routine bypasses when the reel rotation flag of the reel (N) is not set in step B1 of FIGS. To simplify the explanation,
FIG. 22 illustrates reel (0) in line with the previous description of the reel (0) test routine.

The non-rotation routine of FIG.
This is performed after it is determined in step B1 of the test routine that the reel rotation flag of the reel (0) is not set, indicating that the stop solenoid 65 of the reel (0) has been energized, and therefore the reel is moved. Indicates that it is not or should not move. At step C1, the microprocessor determines whether the soft error flag for reel (0) is not set in register SOFTEN. If not, then reel (0) must not move completely and any sample transition of phototransistor 75 on that reel will indicate incorrect reel movement. Therefore, the program tests the register TEMP4 (positive or negative sample transition) in step C2. If the bit corresponding to reel (0) is set (which indicates that a sample transition has occurred), the microprocessor loads the accumulator with the reel (0) motion error code in step C3. Then, the process proceeds to step B13 of the reel (N) test routine. The microprocessor then determines if the tilt is already in progress, and if not, performs a tilt operation to indicate that reel (0) has been tampered with after the stop. Alternatively, if the reel (0) bit of TEMP4 is cleared in step C2, no illegal movement was detected in reel (0), and the program proceeds to step C7, and SAMCTR
(0) is cleared and the reel (0) test routine ends.

If the reel (0) soft error flag was set in step C1, this means that the soft error handling is still valid after the reel (0) stop solenoid 65 is deenergized and the reel is stopped. Or
Indicates that you should try to stop. As mentioned above, during this period, a "false" positive sample transition can be detected even if the reel is trying to stay in the intended stop position. Therefore, the microprocessor tests TEMP3 (forward transition) in step C4,
It is determined whether or not the shift of the positive sample is detected by the sensor 25 of the reel (0). If not, the program proceeds to step B7 of Figures 18-22, where S is entered before the reel (0) test routine ends.
AMCTR (0) is cleared. However, TE
If the reel (0) bit of MP3 is set, the microprocessor proceeds to XTRATR at step C5.
Is tested to determine whether or not the reel (0) extra transition flag is set. This indicates the second positive shift detected after the stop solenoid 65 of the reel (0) is energized. If so,
The program bypasses step C3, loads the reel (0) motion error code into the accumulator, and then proceeds to step B13 of the reel (0) test routine described above. If the reel (0) extra transition flag is cleared in step C5 (indicating the first forward transition detected since the reel solenoid (0) stop solenoid 65 was energized), the microprocessor proceeds to step C6 reel XTRTR reel (0)
Set the extra transition flag and complete the reel (0) test routine. Next, the program proceeds to step A28 of the interrupt routine to test the reel (1) test.
Start the routine.

FIG. 23 shows the reel (N) throw bypassed by the reel (N) test routine at step B4 if the microprocessor has counted 2 8 samples of reel (0) without any transitions. It is a flowchart of a routine. In this case, the reel (0) either failed to rotate after the start solenoid 53 was energized (breakage of the start spring 37, etc.), or started to rotate but suddenly decelerated or stopped. .

At step D1, the microprocessor
The single transition flag corresponding to reel (0) in SGLTRF is tested to determine if the reel is moving after being kicked. If it is moving, throw reel (0) to the accumulator in step D12.
An error code is loaded to indicate that the reel has slowed down rapidly since it started moving. If the reel (0) has never moved, the single transition flag is set to step D1.
, The microprocessor loads the reel (0) dead error code into the accumulator in step C13. After the appropriate error code is loaded into the accumulator at step D2 or D3, the microprocessor proceeds to step B13 of the Reel (0) Test Routine to determine if tilt is already in progress. If not, the program bypasses the process tilt routine in step B14, where it sends an error signal corresponding to the appropriate error code to the corresponding device indicating the cause of the tilt condition. If tilt is already in progress at step B13, then the reel (0) test routine ends and the program proceeds to step A28 of the interrupt routine, where the reel (1) test routine is performed.

FIG. 24 is a flowchart of the processing steps executed in the serial input / output interrupt executed when the serial input / output flag SIOF is set in step A2 of the interrupt routine. At step E1, the serial I / O flag SIOF is cleared and the serial I / O interrupt is not executed during the next interrupt routine. By clearing this flag in step E1 and setting it in step A3 of the interrupt routine, the microprocessor will issue a serial I / O interrupt every other interrupt routine, ie once every 500 microseconds. Is programmed to do so.

At step E2, the microprocessor
The LED 73 of the reel sensor 25 is turned on by writing 1 byte of data to the second direct output latch 153 (described above in connection with FIGS. 10 and 11). Bits corresponding to three reels are set in the direct output latch 153. Before sampling the corresponding phototransistor 75, the LED 73 should have enough time to allow the LED 73 to reach the optimum brightness.
It is preferable to wait about 90 microseconds after the is turned on. Therefore, a serial I / O interrupt will occur 90 times before the microprocessor reads the first direct input byte.
It is preferably designed to process microseconds or more of program instructions.

At step E3, the first direct output byte is refreshed by reading the contents of register DOUTB1 into the first direct output latch 149. DOUT corresponding to cocking motor 52
If the bit in B1 was previously set in step A8 of the main program, then this serial I / O interrupt would power the cocking motor in step E3, while also removing the remainder of the first direct output byte. The respective states of the stop solenoids 65 that are configured are refreshed.

At step E4, the microprocessor accesses the 8-bit general purpose register TEMP5 of the internal RAM and increments the value of the serial state "pointer" it contains.
Since 6 serial I / O interrupts are performed in each serial I / O cycle, the microprocessor implements different "serial states" during each interrupt to receive and send the appropriate bytes of serial I / O data. However, the necessary processing work must be performed before storing it with this data.
Therefore, for any given serial I / O interrupt, these 6
Register TEMP5 is used to indicate that one of the two serial states should be implemented.

At step E5, the program shifts to the serial state pointed to by register TEMP5 and performs the processing work required by this serial state. In this first serial state, step E5 begins by latching the serial input, output shift registers 121, 127, sampling the 24 serial inputs, and providing the 48 serial outputs with new data. In each serial state, the microprocessor writes a 1-byte serial output from the appropriate one of the registers SOUTB1 to SOUTB6 to the serial output buffer 125 and commands the read / write logic 107 to send the signal ESIB. Reset the clock. Furthermore, the second, third and fourth
In each of the serial states, one byte of serial input data is sent from the serial input buffer 123 to the register S after the signal ESIB is sent, as described above in connection with FIGS.
Loaded into the appropriate one of INB1 to SINB3. In the final serial state, the "pointer" of TEMP5 is cleared and the serial I / O cycle is switched back.

At step E6, the microprocessor
This data byte is transferred to the first direct input buffer 14
3 is loaded into the accumulator and a new sampling of the states of the reel phototransistor 75 and the camshaft phototransistor 139 is performed. Here, the LE facing the camshaft / phototransistor 139
It should be appreciated that D165 does not have to be pulsed in the same way as reel LEDs 73. This is because the sampling of the positioning disc 68 is less stringent on the encoding ring 19. Therefore, the LED 165
Can be connected to a constant power source for simplicity.

In step E7, the new optical sample read by the accumulator in step E6 is stored in the register DINB1 / C of the external RAM 99 and used in the next reel control interrupt. The program then proceeds to step E8, where the microprocessor state stored in step A1 of the interrupt routine is retrieved and the microprocessor can continue executing the main program from the time the interrupt routine is called. The interrupt routine of FIGS. 16 and 17 is complete and the microprocessor returns to the main program.

As is apparent from the above, the subject matter of this invention can take a variety of useful forms. Therefore,
It is believed that the present disclosure is illustrative and that the scope of rights should be determined by the appended claims.

[0137]

As can be seen from the above summary, the present invention provides a simple, accurate, and easy to monitor reel for an entertainment machine.
Provide a device that is almost untampered. The simple structure means lower manufacturing costs, easier maintenance and repairs, minimal downtime and increased uptime, thus making it more tamper-proof than conventional equipment. It becomes possible to make a profit while improving the defense.

[Brief description of drawings]

FIG. 1 is a perspective view of a slot machine of the present invention, in which a reel and a rotation management module are exposed by partially breaking.

FIG. 2 is a front view of a reel and its corresponding sprocket with the spin management module showing three module working phases.

3 is a sectional view taken along line 3-3 of FIG.

4 is a front view showing a cocking motor for the rotation management module of FIG. 2 and a position detection device combined therewith. FIG.

5 is a front view showing a cocking motor for the rotation management module of FIG. 2 and a position detection device combined therewith. FIG.

FIG. 6 is a front view of an encoding ring used with each preferred embodiment glue to monitor reel rotation.

FIG. 7 FIG. 6 during a clockwise and counterclockwise rotational movement.
4 is a timing diagram showing the track state versus time for the encoding ring of FIG.

FIG. 8 FIG. 6 during a clockwise and counterclockwise rotational movement.
4 is a timing diagram showing the track state versus time for the encoding ring of FIG.

FIG. 9 is a schematic diagram of a microprocessor-based control circuit according to the present invention that monitors reel rotation and generates an appropriate error detection signal.

10 is a schematic diagram showing a part of an input / output circuit of the control circuit of FIG.

11 is a schematic diagram showing the rest of the input and output circuits of the control circuit of FIG.

12 is a flow chart showing the processing steps performed by the microprocessor of FIG. 9 in the main program.

13 is a flow chart showing the processing steps performed by the microprocessor of FIG. 9 in the main program.

14 is a flowchart showing the processing steps performed by the microprocessor of FIG. 9 in the main program.

15 is a flowchart showing the processing steps performed by the microprocessor of FIG. 9 in the main program.

FIG. 16 is a flowchart showing processing steps performed by a microprocessor during an interrupt routine.

FIG. 17 is a flow chart showing processing steps performed by a microprocessor during an interrupt routine.

FIG. 18 is a flow chart showing processing steps performed by a microprocessor during an interrupt routine.

FIG. 19 is a flowchart showing processing steps performed by a microprocessor during an interrupt routine.

FIG. 20 is a flow chart showing processing steps performed by a microprocessor during an interrupt routine.

FIG. 21 is a flow chart showing processing steps performed by a microprocessor during an interrupt routine.

FIG. 22 is a flow chart showing processing steps performed by a microprocessor during an interrupt routine.

FIG. 23 is a flowchart showing the processing steps performed by the microprocessor during the interrupt routine.

FIG. 24 is a flow chart showing processing steps performed by a microprocessor during an interrupt routine.

[Explanation of symbols]

 1 Slot Machine 2 Reel 7 Rim 8 Mark 9 Sprocket 11 Tooth 19 Coding Ring 27 Rotation Management Module 29 Control Circuit 31 Claw Arm 33 Pin 35 Stop Spring 37 Start Spring 41 Guide Arm 43 Pin 47 Toggle Link 49 Trip Lever 50 Camshaft 53 Start solenoid 57 Spring 59 Stop lever 63 Trip lever 64 Optical camshaft sensor 73 LED 75 Phototransistor 77 Track 79 Field 83 Handle

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[Procedure amendment]

[Submission date] May 29, 1992

[Procedure Amendment 1]

[Document name to be corrected] Drawing

[Correction target item name] All drawings

[Correction method] Change

[Correction content]

[Figure 1]

[Fig. 2]

[Figure 3]

[Figure 4]

[Figure 5]

[Figure 7]

[Figure 8]

[Figure 6]

FIG. 11

FIG. 23

[Figure 9]

[Figure 10]

[Fig. 12]

[Fig. 13]

FIG. 14

FIG. 15

FIG. 16

FIG. 17

FIG. 18

FIG. 19

FIG. 20

FIG. 21

FIG. 22

FIG. 24

Claims (17)

[Claims] 1. A reel, which is mounted in a frame so as to be rotatable about an axis and has a plurality of indicia arranged on its peripheral surface, wherein the reel is a single unit installed in a circumferential path around the axis. Tracks for monitoring the reel's rotational position relative to a fixed reference point, said tracks including a plurality of fields corresponding to said indicia, each field comprising said axis. A unique arcuate path at a constant radial distance from, and further installed to detect movement of the field passing through a point at the constant radial distance; A means for detecting passage of a home field in response to the sensor, and a reel position for counting the number of fields passed by the sensor after said home field. An entertainment machine including a counting means. 2. The entertainment machine of claim 1, further comprising a plurality of additional reels each having a corresponding sensor, detection means and reel position counting means, and wherein said reels are responsive to manual input by a user. Means for spinning and means for independently spinning each reel at a stop position in response to the output of a corresponding sensor after allowing each reel to spin at least once through its respective home field. And means for determining a stop position of each reel with respect to a corresponding fixed reference point in response to the plurality of reel position counting means, and for allocating a predetermined game value to the sequence of the plurality of reel stop positions, and this allocation. Means for providing a user-recognized indication of the assigned value in response to the means. 3. The entertainment machine according to claim 2, wherein
An entertainment machine wherein the user recognition display means includes means for distributing a quantity of coins having a currency value according to the assigned value. 4. The entertainment machine according to claim 1, wherein:
The sensor cooperates with the track to output a signal of a certain pattern corresponding to the forward direction of reel rotation, and a signal of another pattern corresponding to the reverse direction of reel rotation. , An entertainment machine comprising means for generating a rotation direction error signal in response to the reel rotation forward and reverse patterns in response to the sensor. 5. The entertainment machine of claim 4, wherein the track includes a continuous portion read by the sensor as one of a high level state and a low level state, at least a portion of the track. Containing successive columns of said fields, each field having one high level condition and one low level condition of different arc spans, said error signal generating means responsive to said sequence of said sensor outputs An amusement machine including a means for detecting a predetermined change in the state of the reel, and comparing the durations of the following two states to determine the reel rotation direction. 6. The entertainment machine of claim 5, wherein the fields of the columns have the same arc span and the sequence of the long and short span states in adjacent fields of the columns varies. An entertainment machine characterized by that. 7. The entertainment machine according to claim 6, wherein the ratio of the state span length in each field of the column is the same. 8. The entertainment machine according to claim 4, wherein:
Further, in response to the sensor, comparing the durations of two equal arc portions of the track as the reel rotates, the duration of the first arc portion is more predetermined than the duration of the second arc portion. An entertainment machine comprising means for generating an acceleration error signal if the amount is longer than 9. The entertainment machine according to claim 4, wherein:
Further, in response to the sensor, comparing the durations of two equal arc portions of the track as the reel rotates, the duration of the first arc portion is more predetermined than the duration of the second arc portion. An entertainment machine comprising means for generating a deceleration error signal if the amount is less than 10. The entertainment machine according to claim 4, further comprising: in response to the sensor, a duration of a predetermined arc portion of the track when the reel rotates is longer than a first predetermined amount. An entertainment machine, characterized in that it includes means for generating a slow error signal. 11. An entertainment machine according to claim 10, further comprising means responsive to said sensor for generating a high speed error signal when the duration of said arc portion is less than a second predetermined amount. An entertainment machine characterized by that. 12. The entertainment machine of claim 1, further comprising means for rotating the reel in response to manual input by a user, the reel rotating at least once through its home field. After permitting, means for time limiting the stop position of the reel, the time limiting means generating a random number greater than or equal to the number of indicia on the reel, and in response to the sensor. A means for counting the total number of fields that have passed through the sensor after the reel starts rotating, and a stop reel when the total number counting means counts the random number in response to the random number generating means and the total number counting means. Means for issuing a signal, and further including means for stopping the reel in response to the stop reel signal. Machinery. 13. The entertainment machine of claim 1, wherein the tracks are light transmissive separated by opaque portions disposed along the circumferential path at the constant radial distance. In an entertainment machine including a portion, the sensor is disposed adjacent to one side of the track and illuminates the one side of the track in response to an electrical input, and light from the light emitting means. A light detecting means for generating an electric output in response to the light emitting means, the light detecting means is installed adjacent to the track on the side opposite to the light emitting means, and the track alternates light from the light emitting means to the light detecting means. A light detecting means adapted to block or pass through, the entertainment machine further including means for providing the electrical input to the light emitting means during rotation of the reel. An entertainment machine characterized by that. 14. The entertainment machine of claim 13, wherein each of said fields comprises one of said light transmissive portions and one of said opaque portions. 15. The entertainment machine of claim 14, wherein
360 where the track is at the constant radial distance
An entertainment machine comprising a continuous row of said fields in a circumferential path of degrees. 16. A plurality of reels coaxially mounted in a frame for independent rotation, each having a plurality of indicia along its circumference, and adjacent to a respective one of the reels. The same number of sensors installed, and means for rotating the reels in response to manual input by the user, each reel containing a region of encoded data circumferentially arranged about the axis, Each of the sensors cooperates with the encoded data on its corresponding reel,
It outputs different patterns of signals in each of the forward rotation direction and the reverse rotation direction, and responds to each sensor according to the direction of a predetermined one of the forward rotation direction and reverse rotation direction patterns. Means for generating a rotation direction error signal, means for independently stopping the rotation of each reel at the stop position in response to the output of the corresponding sensor, and each means for responding to the sensor with respect to the corresponding fixed reference point. Reel position determining means for determining a reel stop position, means for assigning a predetermined value in response to the sequence of the reel stop positions, and user recognition of the assigned value in response to the assigning means An entertainment machine including a means for displaying. 17. The entertainment machine of claim 16 wherein the area of each reel comprises a single track of the encoded data located on a circumferential path about the axis at a constant radial distance. Then, each sensor detects the movement of the corresponding track that has passed one point at the point of the constant radial distance, and in response thereto, outputs the different signal patterns for the forward rotation direction and the reverse rotation direction. An entertainment machine characterized by being adapted to.