JPH0671279B2 - Demodulator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial field of application) The present invention provides a high multi-valued configuration in which the envelope shape surrounding the positions of the outermost shell signal points of the signal points arranged on the phase plane is stepwise. The present invention relates to a demodulator in a digital wireless communication system that employs a quadrature amplitude modulation method, and particularly to an automatic gain control technique.

(Prior Art) As is well known, in a digital wireless communication system, a quadrature amplitude modulation (Quadratu
re Amplitude Modulation (QAM) method is adopted, 64Q
Various types such as AM system and 256QAM system are known. By the way, as an example of a well-known QAM method (hereinafter, “C-QAM method”), for example, 256C is used.
As shown in FIG. 5, the arrangement of signal points on the phase plane in the −QAM system has 256 signal points on the horizontal axis (hereinafter, “P
It is arranged at 16 × 16 grid points, that is, 16 intersections of 16 columns related to the “axis” and 16 columns related to the vertical axis (hereinafter, “Q axis”).

That is, in the arrangement manner on the phase plane, the arrangement manner of the outermost signal point position (that is, the outermost shell signal point position) is a square. Therefore, in this C-QAM system,
There is a drawback that the peak power-to-average power ratio of the modulated wave increases with the increase of the multi-value, and the transmission power amplifier and the like are easily subject to nonlinear distortion.

Therefore, a QAM system has been proposed in which the signal point arrangement mode is changed as shown in FIG. 4 with respect to the 256C-QAM system (JP-A-61-77452). This is Stepped Square
It is called QAM (hereinafter, "SS-QAM") system and has 256C
-The six signal point positions (indicated by black circles in Fig. 5) near each vertex in the square arrangement of the QAM method are outside each side not including the side near the vertex and one row along the side. (Indicated by black circles in FIG. 4), that is, the outermost shell signal point positions are arranged in a staircase pattern to reduce the peak power and attempt to improve the code error rate and the like. It is the one. Note that the number of columns of signal point positions arranged outside each side of the square is one column in the 256SS-QAM system in the illustrated example, but is two columns in the 512SS-QAM system, and as the number of multivalues increases, It will increase.

Here, in the QAM system demodulation device, two demodulated signals that are orthogonal to each other and are obtained by quadrature detection of the received signal,
That is, the amplitude level of each of the in-phase component signal (P-channel demodulation signal) and the quadrature-component signal (Q-channel demodulation signal) is adjusted to match a predetermined discrimination level at the time of A / D conversion before A / D conversion processing. Although gain control is performed, in order to generate a control signal for the gain control, the maximum amplitude level error region and the minimum amplitude level error are generated in the signal point arrangement region on the phase plane as shown in FIG. 5, for example. Area and are set. Although FIG. 5 shows the one related to the P-axis, the maximum amplitude level error region is the sequence of the signal point positions showing the maximum amplitude level, that is, the P-axis 0-th column and the 15-th column at both ends of the P-axis. Is set as a predetermined area outside. It is considered that the signal in the maximum amplitude level error region is a signal in which the amplitude of the signal on the P-axis 0th column or the 15th column is larger than the normal amplitude level. Further, the minimum amplitude level error region is set as a predetermined position inside a column of signal point positions showing the minimum amplitude level, that is, two columns of P axis rows 7 and 8 with the 0 axis interposed. It is considered that the signal in the minimum amplitude level error region and the signal in the P-axis 7th column or the 8th column of the P-axis are smaller than the normal amplitude level. The gain control compares the minimum relationship of the number of signals detected in both error regions within a predetermined time, and for example, the number of signals in the maximum amplitude level error region is larger than the number of signals in the minimum amplitude level error region by a predetermined value or more. In some cases, the amplitude gain is controlled to be lowered.

By the way, in the case of configuring the SS-QAM system demodulation device, if the staircase signal point arrangement mode is converted to the square arrangement mode, the following inconvenience occurs in gain control. That is, if the above-mentioned two error regions are applied to the signal point arrangement region in the SS-QAM system, it becomes as shown in FIG.

Similar to FIG. 5, FIG. 4 shows the one related to the P-axis, but the maximum amplitude level error region is the outside of the P-axis 0th row, the 15th row, and the outermost shell signal point position. A predetermined area outside the P axis 0'row and outside the same 15 'row is included. However, when the SS-QAM system signal point constellation is converted to the C-QAM system signal point constellation, the outermost shell signal point positions shown by black circles in FIG. 4 are near the vertices shown by black circles in FIG. However, the signal point arrangement position of SS-QAM system is changed to SS (P axis row number, Q axis row number) and C-QAM.
Set the signal point arrangement position of the method to C (P axis column number, Q axis column number)
Then, the correspondence relationship is as follows, for example.

SS (15 ', 8) → C (15,13), SS (15', 9) → C (15,1)
4), SS (15 ′, 10) → C (15,15), SS (10,15 ′) → C (14,
14), SS (9,15 ') → C (14,15), SS (8,15') → C (13,1)
5), SS (7,15 ′) → C (2,15), SS (6,15 ′) → C (1,1
5), SS (5,15 ′) → C (0,15), SS (0 ′, 10) → C (1,1
4), SS (0 ', 9) → C (0,14), SS (0', 8) → C (0,1)
3), SS (0 ′, 7) → C (0,2), SS (0 ′, 6) → C (0,1), SS (0 ′, 5) → C (0,0), SS ( 5,0 ') → C (1,1), SS (6,0') → C (1,0), SS (7,0 ') → C (2,0), SS (8,0') → C (13,0), SS (9,0 ') → C (14,0), SS (10,0') → C (15,0), SS (15 ', 5) → C (14,0)
1), SS (15 ′, 6) → C (15,0), SS (15 ′, 7) → C (15,
2).

As is apparent from this, SS-QAM system signal point arrangement positions SS (10,15 '), SS (0', 10), SS (5,0 ') and S
The four signals with the maximum amplitude level existing in S (15 ', 5) are converted into C (14,1) when converted to the C-QAM system signal point constellation.
4), C (1,14), C (1,1) and C (14,1) are present signals, and these do not contribute to the maximum amplitude level error region and do not contribute to the generation of the gain control signal. become.
In other words, a signal having the maximum amplitude level in the SS-QAM signal constellation and a part of the signals to be used for generating the gain control signal has a maximum amplitude in the C-QAM signal constellation. Since it does not become a level signal, it is not used for generating the gain control signal, and there is a problem that the amount of information for generating the gain control signal decreases.

Therefore, the applicant of the present invention has adopted the C-type as an SS-QAM demodulator.
A demodulation device that can perform demodulation processing in the staircase signal arrangement mode shown in FIG. 4 without converting to the QAM system signal point arrangement, and can thereby contribute all of the signals of the maximum amplitude level to the generation of the gain control signal. And applied for it first (Japanese Patent Application No. 62-236490)
No .; unpublished). Considering the current situation that many communication systems adopt the C-QAM system, this demodulator is considered to be usable as a demodulator for the C-QAM system.

(Problems to be solved by the invention) However, in the demodulator according to the present applicant, all of the signals of the maximum amplitude level can be contributed to the generation of the gain control signal, but for example, in the 256SS-QAM system, As shown in FIG. 4, P channel gain control is performed based on signals at 32 signal point positions belonging to the maximum amplitude level error region and 36 signal point positions belonging to the minimum amplitude level error region. become. That is, since the signal arrangement mode is stepwise, the number of signal points used for generating a gain control signal for increasing the gain is different from the number of signal points used for generating a gain control signal for decreasing the gain, so that the gain control is optimized. The problem is that it is difficult to do.

The present invention has been made in view of such a problem, and its object is to optimize by making the number of signal point positions belonging to the maximum amplitude level error region equal to the number of signal point positions belonging to the minimum amplitude level error region. Gain control, and C
-To provide a demodulator that can also be used for the QAM system.

(Means for Solving the Problem) In order to achieve the above object, the demodulation device of the present invention has the following configuration.

That is, the demodulation device of the present invention is a normal QAM (hereinafter, referred to as “C-QA”) in which the outermost shell signal point positions are square arrangements in the signal point arrangement mode on the phase plane based on quadrature amplitude modulation (QAM).
M ”) method, a predetermined number of signal points near each vertex in the square arrangement are arranged outside each side of the square so that the outermost shell signal point positions are arranged in a staircase pattern. A demodulator in a digital wireless communication system that employs a QAM (hereinafter, "SS-QAM") system; the demodulator is a P channel and a Q channel which are obtained by exchange detection of a received signal and which are in a mutually orthogonal relationship. And an automatic gain control circuit for outputting the demodulated signal inputted by each of the P channel system and the Q channel system for processing the demodulated signals of A / D that converts the output signal of the control circuit into a digital signal that indicates its amplitude level value
A converter; performs signal processing on the digital signal,
A signal indicating the amplitude level value of each signal at the signal point position of the SS-QAM system, wherein the channel value of the signal at the signal point position within the square corresponds to the corresponding signal point position in the C-QAM system square arrangement. Signal having the same amplitude level value as that of the signal relating to the above, and the amplitude level value of the signal relating to the signal point position outside the square is the same as the signal relating to the signal point position of the outermost shell in the C-QAM square arrangement. A first data signal adapted to have an amplitude level value and the first data signal
Second data signal indicating which signal point position inside or outside the square relates to the signal point position, and when the first data signal is a signal related to the signal point position inside the square, its signal state And a second error signal indicating an error regarding the signal state when the first data signal is a signal related to a signal point position outside the square, and is output. Signal conversion circuit;
An error signal selection circuit that selectively outputs one of the two error signals according to the content of the second data signal; and a first data signal of its own system and a second data signal of another system. In response, when the signal state of the second data signal of the other system indicates the inside of the square, the first data signal of the own system is directly output as the gain control first signal while the second data signal of the other system is output.
The signal state of the data signal is a pair of signals that face the outside of the square on the line connecting the midpoints of two opposite sides of the square of the first data signal of the own system with the other system axis sandwiched therebetween. A point position, which includes the signal point positions of the maximum amplitude level values at both ends of the other system axis, and from there to a predetermined number of signal point positions that are located in order toward the inside of the other system axis. A control point number conversion circuit which outputs a signal converted into the signal shown as a gain control second signal; which generates and outputs the gain control signal by receiving the output of the error signal selection circuit and the output of the control point number conversion circuit Then, signals belonging to the maximum amplitude level error region set at both ends of the own system axis orthogonal to the other system axis are detected from the gain control first signal, and two rows of signal points sandwiching the other system axis are detected. Minimum amplitude level set inside the position A control signal generation circuit for detecting a signal belonging to an error region from the gain control second signal and setting the content of the gain control signal in accordance with the magnitude relationship between the numbers of both detection signals. is there.

(Operation) Next, the operation of the demodulation device of the present invention configured as described above will be described.

The control point number conversion circuit includes a first data signal of its own system and a second data signal of another system generated based on the A / D converted digital signal.
It operates as follows based on the data signal of. First, when the signal state of the second data signal of the other system indicates the inside of the square arrangement of the C-QAM system, the first data signal of the own system is directly output to the control signal generation circuit. On the other hand, when the signal state of the second data signal of the other system indicates the outside of the square arrangement, the other system located on the line connecting the midpoints of two opposite sides of the square of the first data signal of the own system A pair of signal point positions facing each other across the axis, including a signal point position of the maximum amplitude level value existing at both ends of the other system axis, and a predetermined number of signal point positions sequentially located inward from the other system axis. Is converted into a signal indicating another signal point position and output to the control signal generation circuit. For example, in the 256SS-QAM system, two pairs of signal point positions are converted, and in the 512SS-QAM system, four pairs of signal point positions are converted into signals indicating other signal point positions.

Here, the signal to be converted is a signal point position belonging to the minimum amplitude level error region, and the number of signal point positions belonging to the minimum amplitude level error region is equal to the number of signal point positions belonging to the maximum amplitude level error region. Will be the same.

As a result, the content of the gain control signal generated and output by the control signal generation circuit becomes balanced regardless of whether the gain is increased or decreased, and optimum gain control can be achieved.

The device of the present invention can be used as it is for the C-QAM system by setting the second data signal to a predetermined fixed signal level.

As described above, according to the demodulation device of the present invention, since the control signal conversion circuit that makes the number of signal point positions belonging to the minimum amplitude level error region the same as the number of signal point positions belonging to the maximum amplitude level error region is provided, A balanced gain control signal can be generated for optimal gain control. Further, if the second data signal is set to a predetermined fixed signal level, the device of the present invention can be used as it is for the C-QAM system.

In order to output the same signal as in the C-QAM system, the I-channel first data, the I-channel second data, and the Q-channel first signal, which are the output signals of the demodulator, are provided at the subsequent stage of the demodulator.
Data, using Q channel second data (prior art)
The logic conversion circuit for performing the logic conversion from SS-QAM to C-QAM described in the description (pages 8 to 9) is required. This logic conversion circuit can be easily realized by a ROM (Read Only Memory) or the like.

(Example) Hereinafter, the Example of this invention is described with reference to drawings.

FIG. 1 shows a demodulator according to an embodiment of the present invention. This demodulator is basically composed of a QAM demodulator 1 and a P channel system 8a and a Q channel system 8b, which are two signal processing systems arranged in parallel at the subsequent stage of the QAM demodulator 1, and P (Q) Channel system 8a (8b) includes automatic gain control circuit 2a (2b), A / D converter 3a (3b), signal conversion circuit 4a (4b), error signal selection circuit 5a (5b), and control point conversion The circuit 6a (6b) and the control signal generation circuit 7a (7b) are provided.

The received signal 101 applied to the input terminal 9 is 256 in this embodiment.
It consists of signals modulated by the SS-QAM system. QAM demodulator 1
Performs known quadrature detection processing on this received signal 101,
The P channel demodulated signal 102a and the Q channel demodulated signal 102b which are in a mutually orthogonal relationship are output to the automatic gain control circuits 2a and 2b of the respective signal processing systems. Since the same operation is performed in each signal processing system, the operation of the P channel system 8a will be described below.

The automatic gain control circuit 2a uses the gain control signal from the control signal generation circuit 7a in order to adjust the amplitude level of the P channel demodulated signal 102a to the predetermined discrimination level of the A / D converter 3a.
Gain control is performed on the P-channel demodulated signal 102a according to 103a, and it is output to the A / D converter 3a.

The A / D converter 3a converts the input analog signal into a digital signal indicating its amplitude level value, and outputs it to the signal conversion circuit 4a. The output digital signal of the A / D converter 3a consists of at least a 6-bit signal that sequentially divides the A / D converter identification range into halves as shown in FIG. 2 (a). To LSB (6SB in the illustrated example) are used to perform 36-level discrimination. At this time, the position of the signal point does not necessarily coincide with the threshold value of a specific one of the output signals of the A / D converter 3a.

That is, the demodulated signal and the error signal cannot be obtained by using the A / D higher-order output signal as it is. Therefore, in order to obtain the demodulated signal and the error signal, all the signals up to the LSB are used for identification, and the signal conversion circuit shows a signal in one column indicating that it is out of the C-QAM area and the error signal for it. , C-
It is necessary to convert into four types of signals, that is, signals in four columns representing the coordinates of signal points in the area of QAM and error signals corresponding thereto.

As an example, FIG. 6 shows the relationship between the signal point and the A / D converter output in the case of the 256SS-QAM system. In the 256SS-QAM system, since the number of signal points in one dimension is 18, there are no output signals with a signal point of 5 SB or less and the positions of the signal points coincide with all the change points.

The signal conversion circuit 4a performs signal processing on the input digital signal and outputs the first data signal 104a and the second data signal 10a.
5a, the first error signal 106a and the second error signal 107a are respectively generated, the first data signal 104a is output to the output terminal 10a and the control point number conversion circuit 6a, and the second data signal 105a is output. It outputs to the output terminal 11a, the error signal selection circuit 5a, and the control point number conversion circuit 6b of the Q channel system 8b which is the other system, and the first error signal 106a and the second error signal 107a are output to the error signal selection circuit 5a. Output.

Here, the first data signal 104a is a signal indicating the amplitude level value on the P-axis of each signal in the signal point arrangement of the 256SS-QAM system (FIG. 4), and as shown in FIG. 2 (b).
A / D converter using all output digital signals of A / D converter 3a
The identification range of 3a is divided into 36 equal parts, and a 4-bit signal corresponding to the position of the signal point in the C-QAM square is formed. At the amplitude level value indicated by the first data signal 104a, C-QA
The two signal points outside the square of the M method have exactly the same amplitude level value as the signal point whose one-level amplitude is smaller than the signal point. That is, the signal points in the SS-QAM system square have the same amplitude level value (value "0" to value "15") as the signal at the corresponding signal point position in the C-QAM system square arrangement shown in FIG. ), The signal points outside the square are not completely distinguished from the signal points inside the one level.

Also, the second data signal 105a is the first data signal 104a.
However, considering that the amplitude level value of the signal at the outermost shell signal point position of the SS-QAM system shows the same value as the amplitude level value of the signal at the outermost shell signal point position of the C-QAM system, as described above. , A binary signal for indicating whether the first data signal 104a is inside or outside the C-QAM square arrangement. That is, when the received signal 101 is based on the C-QAM system, the second data signal 105a is an unnecessary signal.
The second data signal 105a is, for example, as shown in FIG. 2, when the first data signal 104a is a signal relating to the P-axis 0th column to the P-axis 15th column of the fourth SS-QAM system. High level,
It becomes low level in the case of signals relating to the P-axis 0'th row and the P-axis 15'th row.

Furthermore, when the first data signal 104a is a signal within a square, the error signal (first error signal 10
6a) and the first data signal 104a is a signal outside the square, the error signal for that signal state (the second error signal
107a) is as shown in Fig. 2, and these are also A /
It is generated based on all output digital signals of the D converter 3a. It should be noted that the signal conversion circuit 4a that generates the above signals
Can be easily configured by using a ROM (Read Only Memory).

Next, the error signal selection circuit 5a outputs the second data signal 105a.
Is high level, the first error signal 106a is selected, and when it is low level, the second error signal 107a is selected, and the error signal 108a composed of either one is output to the control signal generation circuit 7a.

In the above-mentioned configuration, the signal points in every two columns outside the SS-QAM system are involved in the generation of the error signal. In terms of the reliability of the error signal, it is better to generate the error signal only from the signal points arranged in the outermost one column of the SS-QAM method. However, in the SS-QAM system, the number of signal points involved in the generation of the error signal is very small (in the case of 256SS-QAM, 12 channels are combined in one channel up and down), the probability that an error signal can be obtained is low, and the accuracy of the control signal is low. Is lost. Therefore, in order to increase the accuracy of the overall control signal, the error signal is generated by using the signal points of every two columns from the outside of the SS-QAM method.

In addition, the control point number conversion circuit 6a uses the first data signal of its own system.
The next operation is performed by receiving 104a and the second data signal 105b of the other system. First, when the signal state of the second data signal 105b of the other system is at a high level, that is, when it indicates the inside of the square arrangement of the C-QAM system, the first data signal 104a of the own system is used as it is as the control signal generation circuit. Output to 7a. On the other hand, when the signal state of the second data signal 105b of the other system is low level, that is, C-
When the outside of the square arrangement of the QAM system is shown, the signals SS (7,0 ′) and SS (8,0) at the outermost shell signal point position in the minimum amplitude level error region in the first data signal 104a of the own system are shown. '),same
A control signal generation circuit that converts four signals of SS (7,15 ') and SS (8,15') into signals at other signal point positions.
Output to 7a. That is, the control point number conversion circuit 6a is designed so that the number of signal point positions belonging to the minimum amplitude level error region is the same as the number of signal point positions belonging to the maximum amplitude level error region. The control point number conversion circuit 6a is configured, for example, as shown in FIG.

In FIG. 3, 610 and 660 are inverters, 630 is a 4-input AND gate, 640 is a 4-input NOR gate, 650 is a 2-input OR gate, and 680 is an exclusive OR circuit ( EX-OR). The first data signal 104a
Each bit data of MSB, 2
It is shown as SB, 3SB, LSB.

In the above configuration, the second data signal 105b is high (“1”)
When it is a level, the output level of the AND gate 670 becomes a low (“0”) level. Therefore, the output of EX-OR680 is OR
The LSB signal is output as it is, regardless of the output of the gate 650. That is, the output signal is the first data signal 104a itself. On the other hand, when the second data signal 105b is at "0" level, the output level of the AND gate 670 becomes "1" level when the output of the OR gate 650 is "1" level.

By the way, when attention is paid to the four inputs of the AND gate 630, it is when the amplitude level value is "7" that all four inputs become the "1" level. Further, it is when the amplitude level value is "8" that all four inputs of the NOR gate 640 become "0" level. That is, OR
The output of the gate 650 becomes "1" level when the minimum amplitude level error region can be identified. Then, the output level of the EX-OR680 is the logical level of the LSB signal inverted.
Thus, the contents of the output signal when the amplitude level value “7” is identified are MSB = “0”, 2SB = “1”, 3SB = “1”, LSB =
It becomes "0", which means SS (6,0 ') and SS (6,1) of P-axis 6th row.
5 '). That is, the signals related to SS (7,0 '), SS (7,15') on the 7th row of the P-axis are transferred. Similarly, the contents of the output signal when the amplitude level value "8" is recognized are SS (9,0 ') and SS of the 9th row of the P axis.
It indicates the signal related to (9,15 '). Therefore, the output signal of the control point number conversion circuit 6a has a content in which the number of signal points relating to gain control is converted from 36 to 32 in the minimum amplitude level error region, which is used for gain control in the maximum amplitude level error region. This is the same number as 32 such signal points.

The control signal generation circuit 7a receives the output signal of the control point number conversion circuit 6a and the error signal 108a, and detects the number of signals in the maximum amplitude level error region and the number of signals in the maximum amplitude level error region detected within a predetermined time. If the number of signals in the maximum amplitude level error region is larger than the number of signals in the minimum amplitude level error region by a predetermined value or more, control is performed to lower the amplitude gain,
The gain control signal for controlling to increase the amplitude gain when the number of signals in the minimum amplitude level error region is larger than the number of signals in the maximum amplitude level error region by a predetermined value or more.
103a is generated and output to the automatic gain control circuit 2a. At this time, since the output signal of the control point number conversion circuit 6a has the same number of signal points as the basis of gain control in the minimum amplitude level error region and the maximum amplitude level error region, the control signal generation circuit 7a
The gain control signal 103a generated and output by is balanced and optimal gain control can be performed.

As is apparent from the above description, by forcibly setting the second data signals (105a, 105b) to a high level and making them irrelevant, the device of this embodiment can be used as a 256C-QAM demodulator. .

Further, although the received signal 101 of the present embodiment is described as being based on the 256SS-QAM system, a higher-order signal such as 512SS-Q is used.
In the AM method, there are two signal point position arrays arranged outside each side of the square. In this case, the control point number conversion circuit may be configured to convert the signal at the 4th signal point position to the signal at another signal point position for convenience, depending on the outermost part of the minimum amplitude level error region and the next one. .

(Effect of the Invention) As described in detail above, according to the demodulator of the present invention, the control signal that makes the number of signal point positions belonging to the minimum amplitude level error region the same as the number of signal point positions belonging to the maximum amplitude level error region Since the conversion circuit is provided, a balanced gain control signal can be generated and optimum gain control can be achieved. Also, the second
If the data signal of is set to a predetermined fixed signal level, the device of the present invention can be used as it is for the C-QAM system.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of a demodulator according to an embodiment of the present invention, FIG. 2 is an operation explanatory diagram of a signal conversion circuit, FIG. 3 is a configuration example circuit of a control point conversion circuit, and FIG. QAM system constellation diagram and gain control signal generation diagram, 5
The figure is a signal point constellation diagram and a gain control signal generation explanatory diagram of the 256C-QAM system. FIG. 6 is a relationship diagram between signal points and A / D converter output in the 256SS-QAM system. 1 ... QAM demodulator, 2a, 2b ... Automatic gain control circuit, 3a, 3b
...... A / D converter, 4a, 4b …… Signal conversion circuit, 5a, 5b …… Error signal selection circuit, 6a, 6b …… Control point conversion circuit, 7a, 7b…
Control signal generation circuit, 8a P channel system, 8b Q channel system, 610,660 Inverter, 630,670 AND gate, 640 NOR gate, 650 OR gate Gate, 680 ... Exclusive OR circuit (EX-O
R).

Claims (1)

[Claims] 1. A square for a normal QAM (hereinafter, "C-QAM") system in which the positions of the outermost shell signal points in a signal point arrangement on a phase plane based on quadrature amplitude modulation (QAM) are square arrangements. A predetermined number of signal points near each apex in the arrangement are arranged outside each side of the square so that the outermost shell signal point positions are arranged in a stepwise manner.
-QAM ") system in a digital wireless communication system; the demodulator is for each of the P-channel and Q-channel demodulated signals obtained by quadrature detection of a received signal and having an orthogonal relationship with each other. An automatic gain control circuit that outputs a demodulated signal that is input to each of the P-channel system and the Q-channel system that performs signal processing as a signal having an appropriate amplitude level value according to the gain control signal, and outputs the output signal of the automatic gain control circuit. An A / D converter for converting into a digital signal showing the amplitude level value; a signal showing the amplitude level value of each signal at the signal point position of the SS-QAM system, which is a signal that performs signal processing on the digital signal, The amplitude level value of the signal at the signal point position in the square has the same amplitude as the signal at the corresponding signal point position in the C-QAM square arrangement. The bell value is set and the amplitude level value of the signal at the signal point position outside the square is the same as the signal at the outermost signal point position in the C-QAM square arrangement. A first data signal, a second data signal indicating whether the first data signal relates to a signal point position inside or outside the square, and the first data signal is a signal inside the square. A first error signal indicating an error about the signal state when the signal is at a point position, and an error about the signal state when the first data signal is a signal at a signal point position outside the square. A signal conversion circuit for generating and outputting a second error signal shown in the table; an error signal selection circuit for selectively outputting one of the two error signals according to the content of the second data signal; 1 data When the signal state of the second data signal of the other system indicates the inside of the square after receiving the signal and the second data signal of the other system, the first data signal of the own system is directly used as the gain control first signal. On the other hand, when the signal state of the second data signal of the other system indicates the outside of the square, the position is on the line connecting the midpoints of the opposite two sides of the square of the first data signal of the own system. A pair of signal point positions facing each other across the axis of the other system and including the signal point positions of the maximum amplitude level values at both ends of the axis of the other system, and then a predetermined number located in order toward the inside of the axis of the other system A control point number conversion circuit which outputs a signal indicating a signal point position converted to a signal indicating another signal point position as a gain control second signal; an output of the error signal selection circuit and an output of the control point number conversion circuit To generate and output the gain control signal A signal belonging to a maximum amplitude level error region set at both ends of the own system axis orthogonal to the other system axis is detected from the gain control first signal, and two rows sandwiching the other system axis are detected. Control signal generation for detecting a signal belonging to the minimum amplitude level error region set inside the signal point position from the gain control second signal, and setting the content of the gain control signal according to the magnitude relationship between the numbers of both detection signals. A demodulation device comprising: a circuit;