JPH0635986A - Electronic circuit designing device - Google Patents

Electronic circuit designing device

Info

Publication number
JPH0635986A
JPH0635986A JP4213705A JP21370592A JPH0635986A JP H0635986 A JPH0635986 A JP H0635986A JP 4213705 A JP4213705 A JP 4213705A JP 21370592 A JP21370592 A JP 21370592A JP H0635986 A JPH0635986 A JP H0635986A
Authority
JP
Japan
Prior art keywords
data
connection
signal name
connection data
electronic circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4213705A
Other languages
Japanese (ja)
Other versions
JP2867805B2 (en
Inventor
Takeshi Shimozu
猛 下津
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4213705A priority Critical patent/JP2867805B2/en
Publication of JPH0635986A publication Critical patent/JPH0635986A/en
Application granted granted Critical
Publication of JP2867805B2 publication Critical patent/JP2867805B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To shorten the time for registering and collating connection data by composing the connection data of grouped signal name data and parts terminal group data. CONSTITUTION:An operator simultaneously designates bus lines corresponding to the least significant signal name data of the bus line and the most significant signal name data by utilizing data input means 5. Then, the data are defined as grouped signal name data 6, and the connection between parts and the bus lines is simultaneously designated by the parts terminal number data connected to the least significant signal line of the bus line and the parts terminal number data connected to the most significant signal line. Further, those data are defined as the parts terminal group data, defined as the connection data together with the grouped signal name data 6 and stored in a connection data storage means 1. According to the instruction of the operator, a data output means 11 reads single connection data 10 from the connection data storage means 1, outputs these data to an output medium such as a floppy disk or a communication circuit and applies them to a wiring pattern designing device.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電子回路設計装置に関
し、特に、部品の端子間の結線データを作成し、記憶す
る手段に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic circuit design apparatus, and more particularly to a means for creating and storing connection data between terminals of parts.

【0002】[0002]

【従来の技術】従来の電子回路設計装置では、図3に示
されるように、結線データ記憶手段1に記憶した部品端
子の結線データ2が、部品端子番号データ3と信号名デ
ータ4との組合せで構成されていた。このデータは、デ
ータ入力手段を使って操作者により入力されていた。結
線データ2は、信号名データ4と部品端子番号データ3
とを一対で記憶する場合と、信号名データ4とそれに接
続する全ての部品端子番号データと3をひとまとまりで
記憶する場合があった。
2. Description of the Related Art In a conventional electronic circuit designing apparatus, as shown in FIG. 3, wiring data 2 of component terminals stored in wiring data storage means 1 is a combination of component terminal number data 3 and signal name data 4. Was composed of. This data has been input by the operator using the data input means. Connection data 2 is signal name data 4 and component terminal number data 3
In some cases, the signal name data 4 and all the component terminal number data and 3 connected to the signal name data 4 are stored as a group.

【0003】また、これらの形式の結線データ2をデー
タ出力手段11を使って配線パターン設計装置に入力
し、電子回路設計と配線パターン設計とを対応させてい
た。特に、配線パターン設計の過程において回路修正を
繰り返し修正した結線データを回路図と照合して確認す
ることも、しばしば行われてきた。
Further, the connection data 2 in these formats are input to the wiring pattern designing device by using the data output means 11, and the electronic circuit design and the wiring pattern design are associated with each other. In particular, in the process of designing a wiring pattern, it has often been practiced to check the connection data by repeatedly correcting the circuit by comparing it with the circuit diagram.

【0004】[0004]

【発明が解決しようとする課題】この従来の電子回路設
計装置では、バス線に複数の部品が接続する回路の場
合、バス線に接続する全ての部品の全ての端子と同じ数
の結線データ2が存在する。あるいは1つのバス線に接
続する全ての部品の端子の数のデータ量を必要とする結
線データ2がバスの線の数だけ存在した。
In this conventional electronic circuit designing apparatus, in the case of a circuit in which a plurality of components are connected to the bus line, the connection data 2 of the same number as all the terminals of all the components connected to the bus line are used. Exists. Alternatively, the connection data 2 that requires the data amount of the number of terminals of all the components connected to one bus line is present by the number of lines of the bus.

【0005】そのため、バス線毎にそれに接続する全て
の部品の部品端子の数に相当する多くのデータの登録が
必要であり、多大の時間を要するという欠点があった。
Therefore, it is necessary to register a large amount of data corresponding to the number of component terminals of all components connected to each bus line, which requires a great deal of time.

【0006】また、設計者が結線データ2と回路図を照
合するのに多大な時間を要するという欠点があった。
Further, there is a drawback that it takes a lot of time for the designer to check the connection data 2 and the circuit diagram.

【0007】本発明の目的は、結線データの登録及び回
路図と結線データとの照合を短時間で行う電子回路設計
装置を提供することにある。
An object of the present invention is to provide an electronic circuit designing device for registering connection data and collating circuit diagrams with connection data in a short time.

【0008】[0008]

【課題を解決するための手段】前記目的を達成するた
め、本発明に係る電子回路設計装置は、結線データ記憶
部にデータ入力手段を有する電子回路設計装置であっ
て、データ入力手段は、バス線の最下位の信号名データ
と最上位の信号名データとによりバス線を一括して指定
する群別信号名データと、バス線に接続する部品端子番
号を一括して指定する部品端子群データとを作成するも
のである。
In order to achieve the above object, an electronic circuit designing apparatus according to the present invention is an electronic circuit designing apparatus having a data inputting means in a connection data storage section, wherein the data inputting means is a bus. Signal name data for each group that collectively designates bus lines by the signal name data at the lowest level of the line and the signal name data at the highest level, and component terminal group data that collectively designates the component terminal numbers connected to the bus lines To create and.

【0009】また、単体結線データを部品端子群データ
に変換する結線データ変換手段を有するものである。
Further, it has a connection data conversion means for converting the single connection data to the component terminal group data.

【0010】[0010]

【作用】結線データは、群別信号名データと部品端子群
データとにより構成している。このように結線データ
は、群単位のものであり、個々の部品単位でないため、
その処理時間を短縮できる。
The connection data is composed of group-specific signal name data and component terminal group data. In this way, the connection data is for each group, not for each individual part,
The processing time can be shortened.

【0011】[0011]

【実施例】次に本発明について図面を参照して説明す
る。
The present invention will be described below with reference to the drawings.

【0012】(実施例1)図1は、本発明の実施例1を
示すブロック図である。
(First Embodiment) FIG. 1 is a block diagram showing a first embodiment of the present invention.

【0013】図1において、本発明の電子回路設計装置
では、データ入力手段5を利用して操作者により、バス
線の最下位の信号名データ4と最上位の信号名データ4
とによりバス線を一括して指定させる。そして、それを
群別信号名データ6とし、バス線の最下位の信号線に接
続する部品端子番号データ3と最上位の信号線に接続す
る部品端子番号データ3とにより、部品とバス線との接
続を一括して指定させる。さらに、それを部品端子群デ
ータ7とし、群別信号名データ6と合わせて結線データ
として結線データ記憶手段1に記憶する。
In FIG. 1, in the electronic circuit designing apparatus of the present invention, the operator uses the data input means 5 to allow the operator to use the lowest signal name data 4 and the highest signal name data 4 of the bus line.
Use to specify bus lines at once. Then, it is set as the signal name data 6 for each group, and the component and the bus line are identified by the component terminal number data 3 connected to the lowest signal line of the bus line and the component terminal number data 3 connected to the highest signal line. Let's specify all the connections in batch. Further, the data is stored in the connection data storage means 1 as connection data together with the component terminal group data 7 and the group-specific signal name data 6.

【0014】また、データ表示手段8は、この結線デー
タ2を結線データ記憶手段1より読み出し、データリス
トを表示し、操作者に確認させデータを修正させる。
Further, the data display means 8 reads the connection data 2 from the connection data storage means 1 and displays a data list for the operator to confirm and correct the data.

【0015】その後、結線データ変換手段9は、結線デ
ータ記憶手段1より結線データ2を読み出し、バス線の
最下位の信号名データ4から最上位の信号名データ4の
間の全ての信号名データ4を作成し、バス線に接続する
全ての部品端子番号データ3を作成し、部品の端子番号
データ3と信号名データ4との組合せの単体結成データ
10を作成する。
After that, the connection data conversion means 9 reads the connection data 2 from the connection data storage means 1 and all the signal name data between the lowest signal name data 4 and the highest signal name data 4 of the bus line. 4 is created, all the component terminal number data 3 to be connected to the bus line are created, and the single unit formation data 10 of the combination of the component terminal number data 3 and the signal name data 4 is created.

【0016】データ出力手段11は、操作者の命令に従
い結線データ記憶手段1より単体結線データ10を読み
出し、これをフロッピーディスク、通信回路等の出力媒
体に出力し、配線パターン設計装置に与える。
The data output means 11 reads the single connection data 10 from the connection data storage means 1 in accordance with an operator's instruction, outputs this to an output medium such as a floppy disk or a communication circuit, and gives it to the wiring pattern designing device.

【0017】本実施例により、16本あるいは32本の
信号線よりなるバス線を数個の結線データ2で記述で
き、バス線の結線データ2の登録時間を大幅に減らすこ
とができる。
According to this embodiment, a bus line consisting of 16 or 32 signal lines can be described by several pieces of connection data 2, and the registration time of the connection data 2 of the bus line can be greatly reduced.

【0018】(実施例2)図2は、本発明の実施例2を
示すブロック図である。
(Second Embodiment) FIG. 2 is a block diagram showing a second embodiment of the present invention.

【0019】図2において、本発明の電子回路設計装置
では、操作者がデータ入力手段5を用いて従来の電子回
路設計装置あるいは配線パターン設計装置より部品の端
子番号データ3と信号名データ4との組合せの単体結線
データ10を入力する。
In FIG. 2, in the electronic circuit designing apparatus of the present invention, the operator uses the data input means 5 to output the terminal number data 3 and the signal name data 4 of the component from the conventional electronic circuit designing apparatus or the wiring pattern designing apparatus. The single connection data 10 of the combination is input.

【0020】また、操作者はデータ入力手段5を使っ
て、バス線を一括して指定する群別信号名データ6を設
計者に入力し、これを結線データ記憶手段1に記憶す
る。
Further, the operator uses the data input means 5 to input the group-specific signal name data 6 for collectively designating the bus lines to the designer, and stores this in the connection data storage means 1.

【0021】他方、結線データ変換手段9は、単体結線
データ10を群別信号名データ6と比較し部品端子群デ
ータ7を形成し、これを結線データ記憶手段1に記憶す
る。
On the other hand, the connection data conversion means 9 compares the single connection data 10 with the group-specific signal name data 6 to form the component terminal group data 7, and stores this in the connection data storage means 1.

【0022】また、データ表示手段8は、この部品端子
群データ7を表示し、操作者に確認させる。
The data display means 8 also displays the component terminal group data 7 for the operator to confirm.

【0023】データ入力手段5は、操作者の命令に従い
バス線に接続する部品端子を一括して指定する部品端子
群データ7の修正も行う。
The data input means 5 also corrects the component terminal group data 7 which collectively designates component terminals to be connected to the bus line in accordance with a command from the operator.

【0024】また、結線データ変換手段9は、部品端子
番号データ7から単体結線データ10を作成し、これを
結線データ記憶手段1に記憶する。
Further, the connection data conversion means 9 creates single connection data 10 from the component terminal number data 7 and stores it in the connection data storage means 1.

【0025】なお、本実施例の電子回路図設計装置は、
配線パターン設計装置と一体化しその結線データ2の修
正の手段とすることが可能である。
The electronic circuit diagram designing apparatus of this embodiment is
It can be integrated with a wiring pattern designing device and used as a means for correcting the connection data 2.

【0026】本実施例は、従来の回路設計措置の出力す
る単体結線データ10を部品端子群データ7の結線デー
タ2に変換し、設計者がバス線のデータを見易く修正易
いという利点を有する。
The present embodiment has an advantage that the single connection data 10 output by the conventional circuit design measure is converted into the connection data 2 of the component terminal group data 7 so that the designer can easily see and correct the data of the bus line.

【0027】[0027]

【発明の効果】以上のように本発明によれば、結線デー
タが、群別信号名データと部品端子群データで構成され
ているため、設計者による結線データの登録及び回路図
と結線データとの照合を短時間で行えるという効果を有
する。
As described above, according to the present invention, since the wiring data is composed of the signal name data for each group and the component terminal group data, the designer can register the wiring data and can obtain the circuit diagram and the wiring data. This has the effect of making it possible to carry out the collation in a short time.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例1を示すブロック図である。FIG. 1 is a block diagram showing a first embodiment of the present invention.

【図2】本発明の実施例2を示すブロック図である。FIG. 2 is a block diagram showing a second embodiment of the present invention.

【図3】従来の電子回路設計装置を示すブロック図であ
る。
FIG. 3 is a block diagram showing a conventional electronic circuit designing device.

【符号の説明】[Explanation of symbols]

1 結線データ記憶手段 2 結線データ 3 部品端子番号データ 4 信号名データ 5 データ入力手段 6 群別信号名データ 7 部品端子群データ 8 データ表示手段 9 結線データ変換手段 10 単体結線データ 11 データ出力手段 1 connection data storage means 2 connection data 3 parts terminal number data 4 signal name data 5 data input means 6 signal name data by group 7 parts terminal group data 8 data display means 9 connection data conversion means 10 single connection data 11 data output means

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 結線データ記憶部にデータ入力手段を有
する電子回路設計装置であって、 データ入力手段は、バス線の最下位の信号名データと最
上位の信号名データとによりバス線を一括して指定する
群別信号名データと、バス線に接続する部品端子番号を
一括して指定する部品端子群データとを作成するもので
あることを特徴とする電子回路設計装置。
1. An electronic circuit designing device having data input means in a connection data storage section, wherein the data input means collectively collects bus lines by the lowest signal name data and the highest signal name data of the bus lines. 2. An electronic circuit designing device, which creates group-specific signal name data that is designated by the above, and component terminal group data that collectively designates a component terminal number connected to a bus line.
【請求項2】 単体結線データを部品端子群データに変
換する結線データ変換手段を有することを特徴とする請
求項1に記載の電子回路設計装置。
2. The electronic circuit design apparatus according to claim 1, further comprising connection data conversion means for converting individual connection data into component terminal group data.
JP4213705A 1992-07-17 1992-07-17 Electronic circuit design equipment Expired - Fee Related JP2867805B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4213705A JP2867805B2 (en) 1992-07-17 1992-07-17 Electronic circuit design equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4213705A JP2867805B2 (en) 1992-07-17 1992-07-17 Electronic circuit design equipment

Publications (2)

Publication Number Publication Date
JPH0635986A true JPH0635986A (en) 1994-02-10
JP2867805B2 JP2867805B2 (en) 1999-03-10

Family

ID=16643626

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4213705A Expired - Fee Related JP2867805B2 (en) 1992-07-17 1992-07-17 Electronic circuit design equipment

Country Status (1)

Country Link
JP (1) JP2867805B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6625789B2 (en) * 2000-04-14 2003-09-23 Hitachi, Ltd. Computer-readable medium for recording interface specifications

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6625789B2 (en) * 2000-04-14 2003-09-23 Hitachi, Ltd. Computer-readable medium for recording interface specifications

Also Published As

Publication number Publication date
JP2867805B2 (en) 1999-03-10

Similar Documents

Publication Publication Date Title
US5249134A (en) Method of layout processing including layout data verification
JPH07191840A (en) Automatic program generator
JPH0635986A (en) Electronic circuit designing device
JP3219066B2 (en) Analog part deletion information addition system
JP2942967B2 (en) Substrate CAD system
JPS59125469A (en) Automatic designing device of printed board
JP2714015B2 (en) Logic circuit synthesizer
JP2705548B2 (en) Printed circuit board design support equipment
JP2995906B2 (en) Printed wiring board layout processing equipment
JPH03147073A (en) Wiring condition designation system for circuit connection information
JP3251311B2 (en) Sorting method for data representing numerical values
JP2542784B2 (en) Automatic parts recognition device
JPS62251964A (en) Circuit diagram outputting system
JP3003340B2 (en) Substrate CAD system
JP2000187680A (en) Print circuit board design system and its method using the same
JPH05266126A (en) Test data terminal name conversion system
JPH05108745A (en) Method and device for generating test data
JP2897539B2 (en) Hardware description automatic generation method and device
JPS6246336A (en) Integrated state task generator
JPS63115273A (en) Cad system
JPH04276864A (en) Circuit wiring information converting system
JP2906830B2 (en) Printed board CAD system
JP2940124B2 (en) Substrate CAD system
JPH0916638A (en) Method for extracting terminal array data
JPH0863508A (en) High speed graphic processor

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees