JPH0630487B2 - Bidirectional serial data communication system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention is applicable to, for example, a video camera and a VTR.
The present invention relates to a system for bidirectionally communicating serial data between individual devices or between three or more devices.

[Conventional technology]

For example, a video taken with a home video camera can be used for home V
When recording in TR, it is necessary to exchange data such as mode signals and control signals with each other, for example, using the VTR as a master device and the video camera as a slave device in order to operate these two devices in synchronization. In this case, recently, it is considered that data is communicated as a digital signal by utilizing the fact that these devices are equipped with a microcomputer. In consideration of the routing of the transmission line between the two devices, the number of lines should be as small as possible, and it is desirable that digital data be transmitted as serial data and bidirectional communication be possible with one transmission line.

Conventionally, this type of one-wire bidirectional serial data communication has been realized as follows.

That is, as shown in FIG. 7, especially when performing communication between the A-machine (1) and the B-machine (2), which are equipped with system controllers (3) and (4) equipped with microcomputers (hereinafter referred to as microcomputers), respectively. It uses interfaces (5) and (6) for communication. The communication interfaces (5) and (6) have functions such as modulation and demodulation of data to a specified format, and also a time base collector, and bidirectional communication with one transmission line (7). In order to do so, it monitors the data bus all the time, and also handles priority conflicts during transmission.

Also, when the system controllers (3) and (4) must process jobs other than communication in a time-sharing manner, this interface (5) also performs processing to make communication execution independent of jobs other than communication. And (6) will take charge.

That is, for example, to perform transmission from Aircraft-A (1),
As shown in the figure, when the microcomputer of the system controller (3) prepares transmission data according to the transmission program and issues a transmission request, the transmission data is temporarily stored in the transmission buffer memory of the interface (5), and then transmitted. The data is transferred to the shift register (built into the interface (5)) and the transmission is executed.

On the other hand, in the system controller (3), after the transmission data is transferred to the buffer memory of the interface (5), jobs other than communication are performed regardless of execution of transmission.

Similarly, the reception can be performed regardless of other work, and the reception data is taken into the microcomputer by the interrupt processing.

[Problems to be solved by the invention]

However, in the case of the conventional system as described above, there is a disadvantage that the transmission line must be constantly monitored, and the LSI for communication control used as the interfaces (5) and (6) is very expensive. Yes, popular type V
There is a drawback that it cannot be used for communication between devices such as TRs and video cameras.

[Means for solving problems]

The present invention provides a communication method that does not use an expensive interface as in the prior art. In the present invention, a master device and, for example, one slave device have a plurality of bits through one transmission line. In bidirectional communication of serial data, for example, as shown in FIG. ₁ , a communication section including _two communication areas P ₁ and P ₂ that do not overlap each other in time and a pause section in which communication is not performed are cyclical. The communication areas P ₁ and P ₂ are alternately transmitted or received as viewed from the master device side, and each of the communication areas P ₁ and P ₂ is Start bit SB that is generated only from the master device at the tip of the
₁ and SB ₂ and serial data having a plurality of bits following the SB ₁ and SB _2. The length of the communication section and the pause section is fixed, and processing other than communication is performed in this pause section. .

[Action]

When two-way communication between two devices is performed as described above, one communication section includes two communication areas P as shown in FIG.
₁ and P ₂ , area P ₁ is the transmission area of the master device, and area P ₂ is the reception area of the master device (transmission area of the slave device). When the first start bit SB ₁ is generated from the master device in the transmission area P ₁ , the transmission data from the master device is taken out by the microcomputer and transmitted to the slave device through one transmission line. Next, when the second start bit SB ₂ is generated from the master device in the area P ₂ , this is detected by the slave device, and the second start bit S 2 is detected.
Data from the slave device is transmitted to the master device from the time of B _2.

Here, as shown in FIG. ₁ , the areas P ₁ and P ₂ are represented by information passing through a transmission line, each of which consists of a start bit, a data bit of transmission data, and a stop bit, and the number of bits of each bit is It is set. In the case of this example, since the number of communication areas is set to two, the length of the communication section is fixed and constant. Therefore, the length of the pause section is also constant.

Then, in this fixed pause period, the microcomputer performs other work other than communication.

Hereinafter, the communication section and the rest section are repeated.

〔Example〕

FIG. 2 shows an embodiment of the present invention in which the master device is a VT.
In this example, the R and slave devices are video cameras.

That is, in the figure, (10) is a VTR and (20) is a video camera. The VTR (10) is equipped with a microcomputer (hereinafter referred to as "microcomputer") (110), which controls the communication (11) and controls the video circuit and mechanical deck (12).
And a VTR function key section (13), a VTR mode display section (14), a remote control function key section (15) for the camera (20), and the like.

The video camera (20) has a control unit (21) equipped with a microcomputer (210) for performing communication and other control, a function key unit (22) of the camera, and a function key unit for remote control of the VTR (10). (23) and, for example, a display section (24) which can be displayed in the finder. In addition, the motors (25F) (25Z) that rotate the focus ring and zoom ring of the imaging lens, and the iris motor (25I) that controls the opening and closing degree of the diaphragm are connected via the motor drive circuits (26F) (26Z) (26I). Connected to the control unit (21).

Further, (30) is one data transmission line for transmitting a control signal between the VTR (10) and the video camera (20).

The function key part (13) of the VTR (10) records, plays,
Has function keys for pause, fast forward, rewind, stop, etc., and when any of these keys is operated,
The microcomputer (110) of the control unit (11) identifies it, displays it on the display unit (14), and sends necessary control signals to the video circuit and mechanical deck unit (1).
2), and the VTR is set to the mode corresponding to the operated key.

The function key section (23) for remote control of the VTR (10) on the video camera (20) side also has function keys such as record, play, pause, fast forward, rewind, stop, etc., and when any key is pressed As will be described later, control data is transmitted from the camera (20) side to the VTR (10) through the transmission line (30), and this is taken into the register of the microcomputer (110) of the control unit (11) and the data is stored. Content and VTR at that time
The mode of the VTR (10) is determined from the state of the key input of the function key section (13) of (10), the mode is displayed on the display section (14), and the video circuit and mechanical deck section are also displayed.
The necessary control signal is supplied to (12), and the state of that mode is set. Transmission data from camera (20) and VT
From the state of the function key section (13) of the R (10) to the VTR (1
The mode of (0) is decided to prevent erroneous operation.
For example, there is usually no fast-forward mode during camera recording, so at this time the fast-forward command is ignored and the recording state is continued. This is done by storing in the microcomputer 110 which mode the VTR 10 should be set next for the combination of the mode of the remote control signal and the function key.

Also, the VTR (10) sends back the signal data indicating that the mode has been set to the camera (20) side, and the camera (20) side receives the signal data and displays it on the display section (24) in the viewfinder. The mode display of (10) is displayed.

Also, the function key section (15) for the remote controller of the camera (20) of the VTR (10) has keys such as focus, iris, zoom, pan and tilde. For example, when the zoom key is operated, zooming data will be described later. Then, it is transmitted from the VTR (10) to the camera (20) through the transmission line (30), is taken into the register of the microcomputer (210) of the control unit (21) of the camera (20), and the zooming data is stored in the motor drive circuit (26Z). ) Is supplied to the zoom motor (25Z) for zooming operation.

When the function key section (22) is operated in the camera (20), an operation corresponding to the key operation is performed by a signal from the microcomputer (210) of the control section (21) in the camera (20). For example, if the zoom key is operated with the camera (20), the zooming operation is performed.

Bidirectional communication through one transmission line (30) is performed as follows.

That is, the microcomputer (110) of the control unit (11) of the VTR (10) and the microcomputer (210) of the video camera (20) are provided with 8-bit shift registers (111) and (211). The registers (111) and (211) respectively include a serial input terminal SI, a serial output terminal SO, and a clock terminal C.
Have K. In addition, this shift register (111) and
In (211), writing and reading are performed in parallel data with the data bus of the microcomputer.

The serial controllers 112 and 212 control the serial data loading and the serial data reading into the shift registers 111 and 211, respectively. These communication controllers (112) and (212) are input gate switches of the shift registers (111) and (211), respectively.
(113) and (213) and output gate switches (114) and (214) are generated by generating signals G ₁ and G ₂ and shift clocks for shift registers (111) and (211)
CLK (1 cycle is 104 μsec, for example) is generated.

Further, the communication controller (112) on the VTR (10) side as a master device generates a star bit based on the communication start signal DA from the microcomputer (110). The start bit is not generated in the communication controller (212) on the video camera (20) side of the slave device. This communication controller (112) and (21
2) can also be realized by a microcomputer.

(115) and (215) are input transistors, (116) and (216) are output transistors, and output transistors (116) and (216)
Is connected to the power supply terminal through resistors (117) and (217), the collector is connected to the transmission line (30), and the emitter is grounded. The output switch (114) is provided at the base of the output transistors (116) and (216).
Serial data from the shift registers (111) and (211) is supplied via the and (214).

Further, the transmission line (30) is supplied to the bases of the input transistors (115) and (215) via the resistors (118) and (218), respectively. The emitters of the transistors (115) and (215) are grounded, the collectors are connected to the power supply terminals through the resistors (119) and (219), and the collectors connect the input switches (113) and (213). It is connected to the serial input terminals of the shift registers (111) and (211) through.

In the above configuration, the VT as the master device
In this example, bidirectional communication between the R (10) and the video camera (20) as a slave device is performed by the VT as shown in FIG.
A set of a transmission area P ₁ of the data DT ₁ from the VTR (10) and a reception area P ₂ of the data DT ₂ from the video camera (20) as one block is a communication section as viewed from the R (10) side. And a rest period for one period are periodically repeated, and a start bit is added to the V bit as a master device for one bit before each data DT ₁ and DT _2.
It is obtained in TR (10), transmitted to the camera (20) side, and data is transmitted and received based on this start bit. That is, the asynchronous data transmission is performed.

In the case of this example, the first transmission area P _{1 in} one block is the data transmission period from the VTR (10), and the subsequent area P ₂ is the data transmission period from the video camera (20). However, from the communication controller (112) of the VTR (10), two start bits SB ₁ for one block
And SB ₂ are repeatedly generated at a constant cycle.

Then, the communication for each block is performed as follows.

A communication start signal DA (Fig. 3A) is generated from the microcomputer (110) of the master device and is supplied to the communication controller (112). The communication start signal DA is normally "1", and falls to "0" when making a communication start request. When the communication controller (112) issues this communication start request, for example, when the signal DA rises, the specified length 10
A start bit SB ₁ (FIG. 3B), which is “0” for one bit of 4 μsec, is obtained, and this is the output transistor.
The signal is supplied to the base of (116) and to the transmission line (30) to which its collector is connected, as a signal of "0" whose polarity is inverted.

Further, following this start bit SB ₁ , eight clock pulses CLK (FIG. 3C) having a clock cycle of 104 μsec are obtained from the communication controller (112) and are supplied to the clock terminal of the shift register (111). . Further, the control signal G ₁ of the output switch (114) becomes “1” during the period of these eight clock pulses CLK, and the output switch (114) is turned on. Shift register in microcomputer (110)
Since the transmission data DT ₁ (FIG. 3F) is set in advance in (111), 8-bit transmission data DT ₁ is read from the shift register (111) by these eight clock pulses CLK, and this is output. It is supplied to the transmission line (30) through the switch (114) and the output transistor (116). FIG. 3G shows the state of signals on this transmission line (30). When this 8-bit transmission data DT ₁ is sent out, the switch (114)
Is turned off, which causes the transmission line (30) to be pulled up to "1". Then, the period of "1" continues for 2.5 to 5 bits. This 2.5 to 5 bit period serves as a stop bit. Normally, the stop bit is about 2 bits, but in this example, all the processing is done by the software of the microcomputer.
In this way, the stop bit is extended beyond the normal one, and the processing time for fetching and storing communication data in another RAM of the microcomputer is secured.

Thus, the transmission data transmitted from the master side in this area P ₁ is supplied to the base of the input transistor (215) on the video camera (20) side of the slave device. Then, by the start bit ▲ ▼ ₁ , this input transistor (215) is turned off and its collector output is "1".
Stand up. Then, this is detected by the communication controller (212), and the control signal G ₁ ′ of the input switch (213) is detected.
(Fig. 3I) becomes "1" and 8 periods 104μs
A clock pulse CLK 'of ec (K in FIG. 3) is obtained, the switch (213) is turned on, and the clock pulse CLK' is supplied to the clock terminal of the shift register (211). Therefore, the transmission data DT ₁ from the VTR (10) is taken into the shift register (211). Then, the captured data is transferred to and stored in the RAM of the microcomputer (210) during the stop bit period, and
Data DT ₂ sent from the video camera (20) to the VTR (10) side
Are set in this shift register (211).

The communication start signal DA from the microcomputer (110) after a period of a stop bit of the area P ₁ becomes "0" again, thereby stop bits SB 2 _(FIG. 3 of the area P ₂ from the communication controller (112) B) occurs, and the data on the transmission line (30) becomes the state of "0" again for one bit period as shown in FIG. 3G. Therefore, the input transistor (215) of the video camera (20) is turned off, and its collector output becomes "1". Communication controller (212)
Then, this is detected, and the control signal G ₂ ′ (J in FIG. 3) of the output switch (214) becomes “1” this time, so that the output switch (214) is turned on and eight clocks are input. pulse CLK 'is the signal G _2' is generated in the period of "1", which is supplied to the clock terminal of the shift register (211). Therefore, the data DT ₂ is read from this shift register (211) (see FIG. 3H) and supplied to the transmission line (30) via the output transistor (216).

On the other hand, after the start bit SB ₂ is output from the communication controller (112) on the VTR (10) side, the input switch (113) is output.
Control signal G ₂ (FIG. 3E) becomes “1”, the input switch (113) is turned on, and eight clock pulses CLK (FIG. 3C) indicate that signal G ₂ is “1”. Will be obtained in a period.

Therefore, the data DT transmitted from the video camera (20)
₂ is supplied to the shift register (111) through the input transistor (115) and the switch (113), and the clock pulse CLK
Are taken into this shift register (111).

Then, it is transferred to and stored in the RAM of the microcomputer (110) during the stop bit period of the area P ₂ .

Then, when it comes to a pause section after the communication section consisting of the areas P ₁ and P ₂ , the VTR (10) and the video camera (20)
In (1), processing is performed based on the received data response, and other work is also performed by time division processing.

In the same manner, the transmission from the VTR (10) and the camera (20)
The communication section with the transmission from 1 block as one block is repeated cyclically across the pause section. That is, this is one in which the communication start signal DA from the microcomputer (110) of the VTR (10) which is the master device is periodically generated with the time points of the start bits SB ₁ and SB ₂ as one block. is there. As a result, the communication section and the idle section are surely distinguished from each other, and the master side synchronizes the communication.

The above operation is executed according to the following programs of the respective microcomputers of the VTR (10) and the video camera (20).

That is, FIG. 4 is a flowchart of the program on the VTR (10) side, and steps (101) to (109) are sequentially repeated. Here, steps (105) to (107) are steps for determining the mode of the VTR (10) by giving priority to either the instruction from the camera (20) or the key operation on the VTR (10). , To prevent malfunction.

Further, in the step (109) of generating the transmission content, V
In addition to the data corresponding to the key input operation on the TR (10) side and the remote control signal from the camera (20) side, the data indicating the mode appearing on the VTR (10) side is generated.
When there is no command or mode information to be sent to the (20) side, data having the content that "no operation is required" is generated and transmitted.

Further, FIG. 5 is a flowchart of the program on the video camera (10) side, and steps (201) to (208) are sequentially repeated.
In this case, the transmission data is generated and stored in the register in step (208), and the data is transmitted in step (204) after waiting for the start signal X ₂ .

The generation of the start bits SB ₁ and SB ₂ in the communication controller (112), the generation of the clock pulse, the detection of the start bit in the communication controller (212), and the generation of the clock pulse may be performed by microcomputer control. The hardware may be provided separately from the microcomputer as shown in the example of FIG.

In the above example, the area P _{1 at} the beginning of the transmission period of 1 block
Is set as the transmission period of the VTR (10) as the master device, and the subsequent area P ₂ is set as the transmission period of the camera (20) as the slave device. Therefore, the start bits SB ₁ and SB
₂ was to be transmitted from both periodically VTR (10) side, if the area P ₁ at the beginning transmission period of the slave device, the area P ₂ after the transmission period of the master device, the start bit is beginning It is possible to always transmit only the start bit SB _{1 of the} above, and send the _second start bit SB ₂ only when there is transmission data from the master device. Further, if the reception is performed first in this way, the buffer memory for storing data in the processing of the communication controller (212) and the microcomputer (210) on the slave side can be significantly reduced.

In the case of the above example, the stop bit is made longer than the communication, and the processing time for sending and receiving data is created, so the process of reading and writing serial data by software becomes easy and the hardware There is also an advantage in that an extra latch circuit is not required.

It also has good compatibility with RS-232C, which is an interface standard often used for this type of communication. That is,
The communication method according to the present invention can be read only by voltage conversion using the RS-232C communication channel. In addition, the above example is
This is a case where there is one slave device with respect to the master device and there are two communication areas in the communication section, but with three or more communication areas, for example, two receiving areas and two transmitting areas when viewed from the master side, You may make it provide a total of four areas. In that case, the communication start signal from the microcomputer (110) is generated four times in the communication section, and it is repeated.

Further, not one slave device but two or more slave devices can be connected to the same one transmission line. In that case, the communication area in the communication section may be provided twice the number of the slave devices, and each area may be assigned to each slave device for communication, or the communication area may be smaller than the number of slave devices. You may make it use the vacant area.

〔The invention's effect〕

As described above, according to the present invention, the communication section and the idle section are cyclically alternated so as to be cyclically repeated, and
By setting the number of data to be transmitted in one communication section as a fixed number and setting the length as a predetermined length, a pause section of a certain length is provided, and in this pause section, other jobs other than communication are communicated. The same processing program can be used. Therefore, it is not necessary to use an expensive communication interface as in the past.

Also, instead of conducting communication only when necessary,
Since it is performed periodically, even if communication is missed once or a communication error is made, the correct contents can be immediately restored.

As described above, since communication and all other work can be performed by a one-chip microcomputer without using an expensive interface, bidirectional digital data communication can be realized by a generally cheap consumer LSI and one transmission line.

Since communication is synchronized on the master device side, even when a plurality of jobs A, B, C, D have to be processed in a time-division manner in addition to communication, one job is suspended. It will not stop.

That is, when communication is not synchronized and an expensive interface is not used, communication may be performed in the middle of one work and other work cannot be processed as shown in FIG. 6A. However, in the present invention, the master side synchronizes the communication and performs the work in the pause section of a certain length, so that the management of the time division multiplexing processing becomes easy as shown in FIG. 6B. Therefore, there is an advantage that it can be processed by an inexpensive microcomputer.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram for explaining the outline of the present invention, FIG. 2 is a system diagram of an embodiment of the present invention, and FIGS. 3 to 5 are diagrams for explaining the same. , FIG. 6 is a diagram for explaining the effect of the present invention, and FIGS. 7 and 8 are diagrams for explaining an example of a conventional communication system. (10) is a VTR as a master device, (20) is a video camera as a slave device, (30) is one transmission line, P ₁ ,
P ₂ is a communication area, and SB ₁ and SB ₂ are start bits.

Continuation of the front page (72) Inventor Masahiko Machida 6-735 Kitashinagawa, Shinagawa-ku, Tokyo, Sony Corporation (56) Reference JP-A-55-147054 (JP, A)

Claims (1)

[Claims] 1. A master device and a slave device are provided with 1
In bidirectional communication of serial data having multiple bits through a book transmission line, a communication section consisting of multiple communication areas that do not overlap in time and a pause section in which communication is not performed are repeated periodically. In addition, each of the plurality of communication areas is made to be communication of either transmission or reception as seen from the master device side, and at the beginning of each of the communication areas, it is generated only from the master device. A serial data having a start bit and a plurality of bits following the start bit, and the lengths of the communication section and the pause section are constant, and bidirectional serial processing is made possible during the pause period except for the above communication. Data communication method.