JPH06284282A - Image forming device - Google Patents

Abstract

PURPOSE:To form sharply an image from code information by generating newly code information identical to extracted code information and synthesizing the new code information with read code information recording the synthesis information and the code information to a recording section and providing an output. CONSTITUTION:Code information is extracted from a picture obtained by reading a picture at a reader (a). Identical code information to the extracted code information is newly generated by a code information generating means (c) and the new code information is synthesized with the picture from which the code information is read at a synthesis means (d) and its output and the code information are stored in a page memory. After the new code information is synthesized with the picture from which the code information is read in the page memory, the synthesized picture is recorded on a recording device. Then the selection of the mode making function the code information extraction device (b) and the code information generator and the synthesis device (d) or the mode not activating them is attained. Thus, the picture is sharply shaped based on the code information.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image forming apparatus such as a copying machine.

[0002]

2. Description of the Related Art In an image forming apparatus such as a copying machine, even if a document contains imaged code information such as a barcode, a portion of the imaged code information on the document. It was copied without distinguishing the other parts.

By the way, the image obtained by copying is warped or floated on the original, is dirty on the original or the original plate, and is deteriorated due to various factors that occur during the copying process, such as smearing, chipping, blurring or distortion, and thickening or thinning of the contour. Prone to That is, it is very difficult to make a copy without any image deterioration. Moreover, when an image deteriorated by copying is copied as an original, the output image is further deteriorated.

When the generations of copying are repeated as described above, the image deteriorates, and when the image deterioration becomes remarkable, the imaged code information cannot be read and cannot be restored as the code information.

[0005]

As described above, in the conventional copying machine, when the copying generations are repeated, the deteriorated bar code as shown in FIG. 20 (a) is further deteriorated as shown in FIG. 20 (b). When the image is deteriorated and printed, and the image is significantly deteriorated, there is a problem that the imaged code information cannot be read and cannot be restored as the code information.

Further, even when it is desired to surely copy the imaged code information, the user can know whether the imaged code data on the manuscript can be correctly recognized and can be correctly recognized even after copying. Can not. For this reason, there is a risk that a copy containing unrecognizable code information may propagate.

Therefore, the present invention is intended to provide an image forming apparatus capable of clearly forming an image of code information on a document regardless of the image state of the code information.

[0008]

The invention according to claim 1 is
As shown in FIG. 1, reading means a for reading an image to which code information is added, and code information extracting means b for extracting code information from the image read by the reading means a.
A code information generating means c for newly generating the same code information as the code information extracted by the code information extracting means b; and the code information generated by the code information generating means c for the extracting means b. There is provided a synthesizing means d for synthesizing the image from which the code information is extracted, and an output means e for recording the image and the code information obtained by synthesizing by the synthesizing means d on the recording member.

The invention according to claim 2 is, as shown in FIG. 2, a reading means a for reading an image to which code information is added.
A page memory f for storing one or more pages of the image read by the reading means a; a code information extracting means b for extracting code information from the image stored in the page memory f; Extraction means b
The code information generating means c for newly generating the same code information as the code information extracted by the above, and the image in which the code information generated by the code information generating means c is extracted by the extracting means b. There is provided a combining means d for combining on the page memory f, and an output means e for recording an image and code information obtained by combining by the combining means d on a recording member.

The invention according to claim 3 is the invention according to claim 1 or 2, further comprising a mode in which the code information extracting means, the code information generating means and the synthesizing means are made to function, and a mode in which these means are not made to function. It has a selection means for selecting.

The invention according to claim 4 is the invention according to claim 1, 2 or 3, further comprising code information updating means for updating the code information extracted by the code information extracting means in accordance with a preset rule. The code information generating means is provided to generate new code information based on the code information updated by the code information updating means.

[0012]

In the present invention having such a structure, the code information is extracted from the image obtained by the reading means reading the image. Based on the extracted code information, the same code information as the code information is newly generated, and this new code information is combined with the image in which the code information is read. Then, the image obtained by combining and the code information are recorded on the recording member.

Further, the image obtained by reading the image by the reading means is stored in the page memory, the code information is extracted from the stored image, and the same code information as the extracted code information is newly generated. To be done. The new code information and the image from which the code information is extracted are combined on the page memory and then recorded on the recording member. Further, it is possible to select a mode in which the code information extracting means, the code information generating means and the synthesizing means are made to function and a mode in which these means are not made to function.

Further, the code information extracted by the code information extracting means is updated according to a preset rule, and new code information is generated based on the updated code information.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 3 is a block diagram showing the overall structure of the image forming apparatus. This apparatus is a basic unit 1 for executing a basic copying function, and temporarily stores image data when the apparatus is connected to another system. To store the image data input from the system basic unit 2 having a page memory or the like for storing the image data when the image data is edited / processed and copied, and electronically and semipermanently storing the image data. System having the optical disk device, etc., and having control means for converting the image data and the control data into the control system and the image format of the other system when the image data or the control data is exchanged with the other system. The expansion unit 3 is composed of three systems.

The basic unit 1 and the system basic unit 2 are connected by a basic system interface 4 for exchanging control data and a basic image interface 5 for exchanging image data.

The system basic unit 2 and the system expansion unit 3 are connected by an expansion system interface 6 for exchanging control data and an expansion image interface 7 for exchanging image data.

That is, the basic unit 1 and the system expansion unit 3 are not directly connected, and control data and image data are always exchanged with the system basic unit 2.
It is supposed to be done through. This image forming apparatus can take three forms depending on whether the system basic unit 2 and the system expansion unit 3 are connected.

In other words, the first mode has a configuration of only the basic unit 1, and the basic function in this configuration is a copy function, and copy processing involving simple editing processing such as enlargement / reduction processing and masking / trimming processing. Is possible.

The second mode is a mode in which the system basic unit 2 is connected to the basic unit 1. In this mode, in addition to the copying function in the basic unit 1, a page memory for temporarily storing image data is used. Editing processing such as image rotation processing and combining processing of a plurality of images is possible. In addition, the system expansion unit 3 is included in the system basic unit 2.
In addition to F, which constitutes communication line control means such as a facsimile
It is possible to connect a printer controller 9 for using the printers of the AX (facsimile) unit 8 and the basic unit 1 as a remote printer of a control device such as an external personal computer.
It is possible to transmit an image from the other system or device via the communication line from the device to the other system or device, and vice versa. And is printed out by a printer described later. The third form is a form in which the basic unit 1, the system basic unit 2, and the system expansion unit 3 are connected, and is the form shown in FIG.

In this embodiment, in addition to the functions of the first and second embodiments, image data is electronically and semi-permanently saved and a data saving / managing function for managing the saved image data, a local area network described later. (LAN) A transmission / reception function of image data by LAN for transmitting an image from the line control means to another system or device via the LAN line, and conversely receiving image data from the other system or device via the LAN line, A printer function that converts the print control code sent from a personal computer via a general-purpose interface into image data and prints out the image data from the printer of basic unit 1 via the page memory of system basic unit 2 is possible. Becomes

As shown in FIG. 4, the basic unit 1 includes a system CPU 11 constituting a main body of a control unit, a control panel 12 having an operation unit and a display unit, and an image scanner 1 as a reading means for reading an image from a document.
3. Image processing circuit 14 and printer 1 as output means
It is composed of 5. The system CPU 11 is connected via a basic system bus 16 to a control panel 12, a scanner 13, an image processing circuit 14 and a printer 15 as an output means for forming and outputting an image, and controls them. This basic system bus 16
Is connected to the basic system interface 4.

The scanner 13 has a CCD line sensor (not shown) consisting of a plurality (one line) of light receiving elements arranged in a row, and an image of an original placed on a document table (not shown). Is read line by line according to the instruction from the system CPU 11, and the grayscale of the image is digitally displayed in 8 bits.
After being converted into data, it is output to the image processing circuit 14 as time-series digital data together with the synchronization signal via the scanner interface.

The printer 15 comprises a laser optical system (not shown) and an image forming unit (not shown) in which an electrophotographic system capable of forming an image on a transfer sheet is combined, and an image is formed in accordance with an instruction from the system CPU 11. Processing circuits 14 to 4
Bit digital image data is input via a printer interface in synchronization with a synchronization signal, and an electrostatic latent image is formed on a photosensitive drum (not shown) by laser light having a pulse width corresponding to the size of the image data. After the formation, the visualization means (not shown) visualizes the electrostatic latent image, the transfer means (not shown) transfers the visualized image to a transfer sheet, and the fixing means (not shown) transfers it onto the transfer sheet. The image is fixed and the transfer paper is output.

The control panel 12 is composed of an operation section for setting operation modes and parameters of the apparatus and a display section for displaying a system state or an image image stored in the page memory of the system basic unit 2. The system CPU 11 also controls each part of the system basic unit 2 described later.

As shown in FIG. 7, the image processing circuit 14 includes a smoothing edge emphasizing circuit 141 and an editing / moving circuit 14.
2. Enlargement / reduction circuit 143 and gradation conversion circuit 144.

The smoothing edge emphasizing circuit 141 removes noise mixed in at the time of image reading by the smoothing circuit, and sharpens edges which are blurred due to smoothing by the edge emphasizing circuit. The editing / moving circuit 142 is a block that performs a simple editing process on a line-by-line basis, and performs, for example, moving processing in the line direction and masking / trimming processing. The enlarging / reducing circuit 143 performs the enlarging / reducing process by repeating the pixel according to the designated scaling ratio or by combining the thinning process and the interpolation process.

The gradation conversion circuit 144 uses the area gradation method to read one pixel of 8 bits by the scanner 13.
The image data of is converted to the specified number of gradations. The gradation-converted image data is 1 which is the bit number of the printer.
Image data of 4 bits of pixels is sent to the system basic unit 2 via the printer 15 or the scanner data bus 17 and the basic part image interface 5. The non-linearity correction of the input / output characteristics of the printer 15 is performed at the same time when the gradation processing is performed using the area gradation method.

As shown in FIG. 5, the system basic unit 2 includes a page memory 28 for temporarily storing image data, control information for the system CPU 11 in the basic unit 1 and the CPU in the system expansion unit 3. In the system basic unit 2; a system control circuit 21 for controlling the communication between the base unit 1 and the system expansion unit 3; and a page memory address control circuit 26 for generating an address of the page memory 28. An image bus 29 for performing data transfer between the respective devices, and a page memory data control circuit 27 for controlling data transfer at the time of performing data transfer between the page memory 28 and other devices via the image bus 29 are provided. .

Further, the image data I / F 210 for interfacing the image data when transferring the image data to and from the basic unit 1 via the basic part image interface 5, and the image data when transmitting the image data to a device having a different resolution. Resolution conversion Binary rotation for converting the resolution of another device, converting image data received from a device with a different resolution to the resolution of the printer 15 of the basic unit 1, and performing 90-degree rotation processing of binary image data. The circuit 212 compresses the image data input for a device for compressing and transmitting the image data such as facsimile transmission or optical disk storage, or compressing the input image data via the printer 15. A compression / expansion circuit 211 that expands for visualization is provided.

Further, an FO in which character fonts are stored
A system memory (ROM including an NT memory, a work memory for temporarily storing control information used by the system CPU 11 and a program memory for storing a processing program for performing processing using the system basic unit 2) / RAM) 24, a system D for performing high-speed data transfer between devices of the basic system bus 16
Control information is exchanged between the MA controller 23, the printer controller 9 and the system CPU 11, and
A printer controller interface 213 is provided for interfacing the control information and the image data when the image data is transferred between the printer controller 9 and the image bus 29.

Further, the system control circuit 21 is connected to the system CPU 11 and the C of the system expansion unit 3.
A communication memory 25 for storing control information when communicating control information with the PU, image data I / F 21
A multi-value rotation memory 214, which is connected to 0 and used when outputting image data from the printer 15 by rotating the image data by 90 degrees or 180 degrees, is provided. The FAX unit 8 and the printer controller 9 are optionally connected.

As shown in FIG. 6, the system expansion unit 3 connects each internal device to the expansion system bus 43.
An extended CPU 31 for controlling data transfer via the extended system bus 43, an extended DMA controller 32 for controlling data transfer on the extended system bus 43, a general-purpose ISA bus 44, an ISA bus controller 33 for interfacing the extended system bus 43 and the ISA bus 44, A storage unit connected to the extension system bus 43 for electronically storing image data, for example, a hard disk device 35, a hard disk interface 34 as an interface thereof, the ISA bus 4
4, a storage means for electronically storing image data, for example, an optical disk device 38, an optical disk interface 37 as an interface thereof, a local area network line control device (LAN) 41 for realizing a LAN function, and a printer function. A printer controller control unit 40 for realizing the above, a G4 / FAX control circuit 39 having a G4 / FAX control function, an extended SCSI interface 42 used when connecting a device of SCSI specification, and an image from the printer controller control unit 40. An extension image bus 45 for outputting data to the system basic unit 2 via the extension image interface 7, and an interface for exchanging data between the extension system bus 43 and the extension image bus 45. Bag Consisting of Amemori 36.

Incidentally, the optical disk interface 3
7, an optical disk device 38, a G4 / FAX control circuit 39,
The printer controller controller 40, the local area network line controller 41, and the extended SCSI interface 42 are optional, and the system extension unit 3
It has a removable structure.

The optical disk device 38 is connected to the ISA bus 44 through the interface 37, and the expansion C
The PU 31 uses the SCSI command to extend the system bus 43, the ISA bus controller 33, and the ISA bus 4
4 controls the optical disk device 38.

The local area network line control device 41 controls the communication of control data and image data with other devices on the network based on the protocol of the connected network system, LAN.
It is composed of a shared memory for temporarily storing communication control data and image data from the system, or control data and image data from the system expansion bus, and a system expansion bus interface.

Printer controller controller 40
Is a Centronics compliant parallel interface for exchanging control codes and image data with a personal computer, and an interface with a system expansion section image bus 45 for transferring bit image data to the page memory 28 of the system basic unit. System expansion image bus interface, image data transfer control unit for controlling transfer of image data in the apparatus, interpreting control codes from a personal computer, and expanding CP via expansion unit system bus 43 and ISA bus 44
Control means for notifying U31 of control information, interpreting a print control code from a personal computer, converting the bit information into bit information, and then storing the bit information in a memory in the apparatus, system expansion bus for interfacing with ISA bus 44 And interface. Next, a detailed description will be given of the configuration and functions of the main parts in the system basic unit 2.

As shown in FIG. 8, the system control circuit 21 has a communication memory access control circuit 401 for controlling communication of control information between the system CPU 11 and the extended CPU 31, and a communication memory for interfacing with the communication memory 25. A page memory access control circuit 4 for controlling access to the page memory 28 from the interface 402, the basic unit 1 and the system expansion unit 3.
03, the basic unit 1 via the basic system bus 16
System bus interface 405, which controls the control information and image information sent from the system CPU 11 and decodes the address sent at the same time to distribute the control information or image information to the corresponding block in the system basic unit 2. Expansion unit 3
The system expansion bus interface 406 which decodes the control information and the image information sent from the device at the same time and which is sent to the corresponding block in the circuit, and the means for accessing the page memory on the basic system bus 16 (in the basic unit) CPU 11 and DMA controller 22) and page memory access means on the system expansion bus 43 (CPU of the system expansion unit 3)
31 and the DMA controller 32) access the image information in the page memory 28 via the respective system buses, the page memory access control circuit 4
Page memory interface 4 for interfacing the exchange of image data between 03 and the page memory 28.
It is composed of 04.

The communication memory access control circuit 401 includes the CPU 11 of the basic unit 1 and the system expansion unit 3
When the CPU 31 transfers the control code to and from the communication memory 25 via the communication memory interface 402 in the system control circuit 21, it controls access to the communication memory 25.

The communication memory 25 is C of the basic unit 1.
It is mapped in the memory space of the PU 11 and the CPU 31 of the system expansion unit, and data can be read from and written to the communication memory 25 by accessing a specific area from each.

Communication memory access control circuit 401
9 is composed of an arbitration circuit 410, a communication memory access sequencer 412, a bidirectional selector 413, and an interrupt control circuit 414, as shown in FIG.

The arbitration circuit 410 is a C of the basic unit 1.
The PU 11 and the CPU 31 of the system expansion unit 3 perform priority control of communication memory access. CPU 11 of the basic unit 1 and CPU 31 of the system expansion unit 3
When access to the communication memory 25 at the same time, one of them is permitted based on the set priority,
Make the other access wait. The communication memory access sequencer 412 outputs a read or write control signal to the communication memory 25 based on the request from the authorized CPU.

The bidirectional selector 413 is used by the arbitration circuit 4
Based on the arbitration result of 10, the address for the communication memory 25 output by the permitted control unit is output to the communication memory 25 in synchronization with the timing signal output from the communication memory access sequencer 412. Then, in the write operation, the permitted CPU outputs the communication information (data) output together with the address to the communication memory 25 together with the address information. Also, the CP permitted in the read operation
The communication information read from the communication memory 25 is input according to the address from the U to the communication memory 25 and the timing signal output from the communication memory access sequencer 412, and is output to the permitted CPU.

The page memory access control circuit 403
As shown in FIG. 10, it comprises an arbitration circuit 430, data registers 431, 432, 436, 437, an address register 433, a bidirectional select 434 and a page memory access sequencer 435.

The arbitration circuit 430 controls the page memory access priority of the CPU 11 of the basic unit 1 and the CPU 31 of the system expansion unit 3. When the CPU 11 and the CPU 31 access the page memory 28 at the same time, either one of the CPUs is based on the set priority.
Access is allowed and the other CPU waits for access.

The page memory access sequencer 43
5 is a page memory 2 based on the request of the permitted CPU.
A read or write control signal for 8 is output to the address control circuit 26.

The bidirectional selector 434 has the arbitration circuit 4
Based on the arbitration result of 30, the CPU outputs the address for the page memory 28 output by the permitted CPU to the address control circuit 26 in synchronization with the timing signal output by the page memory access sequencer 435. In the write operation, the permitted CPU outputs the information (data) output together with the address to the data control circuit 27 together with the address information. Further, in the read operation, the information (data) read from the page memory 28 is input via the data control circuit 27 by the address from the permitted CPU to the page memory 28 and the timing signal output from the page memory access sequencer 435. Then, the data is output to the permitted CPU.

The data register 431 and the data register 432 are registers for temporarily storing data when the basic unit 1 accesses the page memory 28, and the address register 433 is an address of the page memory 28 output by the basic unit 1. Is a register for temporarily storing.

Here, when the basic unit 1 uses the data register 431 to access the page memory 28, the address output by the basic unit 1 is temporarily stored in the address register 433 and the address control circuit 26.
Is output to the page memory 28 via. On the other hand, when the basic unit 1 uses the data register 432 to access the page memory, the address output by the basic unit 1 is ignored, and the address generator of the address control circuit 26 pages the address based on the setting information. Output to the memory 28.

The data register 436 and the data register 437 are registers for temporarily storing data when the system expansion unit 3 accesses the page memory 28. When the system expansion unit 3 accesses the page memory 28, the data register 436 and the data register 437 are 2 registers. The address generation unit of the register common address control circuit 26 outputs the address to the page memory 28 based on the setting information.

The system DMA controller 23 of the basic unit 1 is a controller for transferring data between devices on the basic system bus 22 at high speed by hardware without the intervention of the CPU 11 of the basic unit 1.

As the processing for data transfer using the system DMA controller 23, compressed data (code data) is transferred between the page memory 28 and the FAX unit 8 in the FAX transmission / reception processing, and the image on the page memory 28 is controlled. There are transfer of image data between the page memory 28 and the control panel 12 for displaying on the panel 12, data transfer between the system memory 24 and the control panel 12 for displaying an operation screen on the control panel 12, and the like.

The address control circuit 26 for generating the address of the page memory 28 is, as shown in FIG. 11, a transfer control sequencer 610 for executing various transfer sequences in response to a request from the image bus, an image bus request and a system bus. Arbitration unit 6 that arbitrates the request of
11, an address generator 612 that generates various memory addresses of a plurality of channels in the transfer from the image bus, a selector 613 that switches an address output from the address generator 612 and a system address, a DRAM
DRAM control section 61 for generating the address and control signal of
It is composed of 4.

The address control circuit 26 receives a memory access request from two systems, an image bus and a system bus. This request is arbitrated by the arbitration unit 611, and the data transfer process on the side that has won the arbitration is performed.

When the request on the system bus side wins the arbitration, the system address selected by the selector 613 is input to the DRAM control unit 614. DRAM
The control unit 614 converts the input address into a DRAM address and generates a control signal necessary for reading and writing.

An address channel signal is input to the transfer control sequencer 610 together with a request from the image bus, and one of the plurality of address generators in the address generator 612 is selected. When the request on the image bus side wins arbitration, the memory address of the selected channel is output from the address generation unit 612, and the DRAM control unit 61
4 is input.

As shown in FIG. 12, the data control circuit 27 performs data transfer between devices on the image bus 29 in the system basic unit 2 and data transfer between devices on the image bus 29 and the page memory 28. The image data transfer control unit 701 for controlling, the image processing unit 702 for executing bit block transfer and various raster operations (logical operations), the CPU 11 of the basic unit 1 or the CPU 31 of the system expansion unit 3 are connected via the system control circuit 21. A system interface 703 that interfaces data when accessing (reading / writing) the page memory 28, and the image data transfer control unit 701 based on the page memory access arbitration result of the address control circuit 26 in the writing process to the page memory 28. To C of and or data from a device on the image bus 29 sent to, or system interface 703 is sent via the come CPU (basic unit 1 of the CPU11 or system expansion unit 3
A selector 704 for selecting whether the data is from the PU 31),
In the process of reading data from the page memory 28, data is sent to the device on the image bus 29 via the image data transfer control unit 701 or the system interface 703 based on the page memory access arbitration result of the address control circuit 26. A selector 705 for selecting whether to send data to the CPU (CPU 11 of the basic unit 1 or CPU 31 of the system expansion unit 3) via.

The image processing unit 702, as shown in FIG. 13, has data path units 710 and 711 and a selector 71.
2, a parameter register 713, an image interface 714, a memory interface 715, a control bus interface 716, and an address control circuit interface 717.

The image processing section 702 has a path (data path section 71) for reading data from the page memory 28.
0) and a write path (data path section 711) are independent, and each pipeline processing is performed, so the maximum read / write transfer cycle is the same, and parallel processing of up to 4 channels is possible. There is.

The selector circuit 712 is connected to the image bus 29.
The data output direction is switched depending on whether the page memory access from the above device is a read access or a read-modify-write access.

In read access, page memory 2
The data from 8 is output to the data path unit 710 and sent to the device on the image bus 29 via the image data transfer control unit 701.

In the read-modify-write access, the data from the page memory 28 is output to the data path 711 and sent from the device on the image bus 29 via the image data transfer control unit 701 and the selector 704. A logical operation process is performed on the data and the data path unit 711 and written in the page memory 28.

The parameter register 713 is a register for storing the operation mode of the data path units 710 and 711 for each channel. These parameters are a page memory access sequence signal and a channel selection signal output from the address control circuit 26. Is output to the data path unit 710 or 711. The data path units L710 and 711 execute various logical operation processes based on this parameter.

The image data transfer control unit 701 is shown in FIG.
4, the data buffer 740, the image bus priority control unit 741, the image bus timing control unit 742, the page memory priority control unit 743, the page memory timing control unit 744, the terminal counter 745, the interrupt control unit 746, It is composed of a control bus interface 747, a parameter register 748 and an I / O buffer 749. The data buffer 740 has data registers corresponding to the number of channels for temporarily storing the data from the source in the data transfer.

The image bus priority control unit 741 sends a data transfer request (B
DRQ) is input, a device for which data transfer is permitted is determined by a predetermined priority control, and the permitted device is notified of the start of data transfer (BDAK).

The image bus timing control section 742 is
A timing signal for data transfer between the source device and the destination device determined based on the priority control result of the image bus priority control unit 741 is generated and output to the image bus 29.

The page memory priority control unit 743
The request signal output from the data buffer 740 is input, and the data transfer channel between the page memory 28 and the data buffer 740 is determined based on a predetermined priority.

The page memory timing controller 744
Is the page memory 28 of the transfer channel determined based on the priority control result of the page memory priority control unit 743.
A timing signal for data transfer between the data buffer 740 and the data buffer 740 is generated and output to the address control circuit 26. The transfer request signal from the data buffer 740 is transmitted from the page memory 28 when the data from the device on the image bus 29 is stored in the data buffer 740 in the write processing to the page memory 28. In the read processing, when the data is not stored in the data buffer 740, it is output to the page memory priority control unit 743.

The terminal counter 745 counts the number of transfer bytes for each channel, and ends the data transfer via the image bus timing control section 742 for the transfer channel whose transfer byte number has reached the set value. The signal (BTC) is output. When the number of transfer bytes reaches the set value by the setting, it is possible to issue a transfer end interrupt from the interrupt control unit 746 to the CPU 11 of the basic unit 1 via the control bus interface 747 and the basic system bus 16. There is.

The parameter register 748 is a register for setting a transfer source, a transfer destination, the number of transfer bytes, presence / absence of interrupt processing at the end of transfer for each transfer channel. The image bus 29 has a data width of 32 bits and always transfers data of 32 bits regardless of the bit width of one pixel. For example, when writing binary data (1 bit / pixel) from the scanner 13 to the page memory 28, 32 pixel data are paged on the image bus 29 from the image data I / F 210 at a time via the image data transfer control unit 701. It is transferred to the memory 28 and multivalued (4 bits /
When writing the data of (pixel) to the page memory 28,
Data of 8 pixels is transferred on the image bus 29 at one time.
The conversion of data into 32 bits is performed in each device on the image bus 29 according to the number of bits of one pixel.

The data transfer priority control on the image bus 29 is such that a transfer request from a device such as output to the printer 15 or input from the scanner 13 cannot be stopped or kept waiting. A device that can prioritize and allow transfer requests such as compression / expansion processing and resolution conversion processing to wait for data transfer is allowed only when there is no transfer request from a device with a high priority. It is decided to decide the priority according to the property of. The scanner 13
The scanner input operation from page to page memory 28 will be described.

8 bits / read by the scanner 13
The image output data of the pixel is transmitted through the image processing circuit 14 to
It is transferred to the image data interface 210 as scanner image data of it / pixel or 4 bits / pixel or 2 bits / pixel or 1 bit / pixel, and a plurality of pixels (4, 8, 16, 32 pixels) of the scanner image data is stored in the image data interface 210. ), 32b
It is DMA-transferred to the data control circuit 27 through the image bus 29 as transfer data in units of it. Data control circuit 2
7, the page memory 2 generated in the address control circuit 26
32-bit scanner image data is written to the address of 8. Next, the printer output operation from the page memory 28 to the printer 15 will be described.

Image data is output from the page memory 28 to the printer 15. The page memory 28 is set to 3 by the address of the page memory generated by the address control circuit 26.
The image data is transferred to the data control circuit 27 in units of 2 bits, and is DMA transferred to the image data interface 210 through the image bus 29.

Inside the image data interface 210, the number of bits per pixel for outputting from the 32-bit image data to the printer 15 is 4 bits / pixel or 2 bi.
It is converted to t / pixel or 1 bit / pixel, and transferred to the printer 15 for output through the inside of the image processing.

In this apparatus, in the case of normal copying in which the barcode is not recognized, the original is read by the scanner 13 and printed out by the printer 15 via the image processing circuit 14.

Further, in the case of copying in which the bar code is recognized and the bar code is added again, the original is read by the scanner 13 and transferred to the page memory 28 via the image data interface 210 and the data control circuit 27.

The normal copy mode in which the barcode is not recognized and the copy mode in which the barcode is recognized and the barcode is re-applied can be selected by the key operation of the control panel 12 provided in the basic unit 1.

The barcode is recognized by the system CPU 11
Alternatively, the system control circuit 21 is expanded by the expansion CPU 31.
This is performed by accessing the page memory 23 via the data control circuit 27 via. (Code information recognition means)

The data in the page memory 28 is transferred to the system DMA controller 23 and the extended DMA controller 3
After transferring to each work RAM by 2, work R
It is also possible to perform barcode recognition on AM data.

Bar code generation and composition is performed by the system CP.
This is performed by accessing the page memory 28 via the data control circuit 27 via the system control circuit 21 by the U11 or the expansion CPU 31. (Code information generating means and data synthesizing means)

The system CPU 11 and expansion CPU 3
1 is after expanding the bar code on each work RAM,
It is also possible to synthesize the barcode by transferring the barcode image on the work RAM to the page memory 28 using the system DMA controller 23 and the extended DMA controller 32.

Next, in the present configuration example, with respect to the copy mode in which the barcode in the original is recognized and the internally generated barcode is re-applied based on the recognition result, the details of the processing will be described using a flowchart. Explain. 15 to 17 show a series of processes from the reading of a document to the output of a copy.

First, in step S1 of FIG. 15, the original to be copied is read by the image scanner 13 and converted into image data. The read image data is once transferred to the page memory 28. Next, in step S2, the page memory 28 is scanned in the main scanning direction line by line or every other line to detect the presence or absence of a bar code. If the barcode is detected, the content, position, size, orientation, etc. of the barcode are recorded in step S3. This is repeated for one page. When the barcode is detected in the main scanning direction, the processing is performed as shown in FIG.
The process moves to B of 6 and the bar code size is checked in step S7.

If no bar code is detected in the main scanning direction, the page memory 28 is scanned in the sub scanning direction one line at a time or every other line in step S4 to detect the presence or absence of a bar code. . If the barcode is detected, the content, position, size, orientation, etc. of the barcode are recorded in step S5. This is repeated for one page.

In this example, it is assumed that the bar code exists at an arbitrary position and posture in the original, and the bar code is detected in the main scanning direction and the sub scanning direction of all pages. If a device whose position is specified (for example, a format sheet dedicated to the device) is used, it is possible to scan only a specific position and a specific direction, and reduce the processing time for barcode detection. . If the bar code is detected in the sub-scanning direction, the bar code size is checked in step S7.

If no bar code is detected in the sub-scanning direction, a bar code non-detection error is displayed in step S6 to prompt the user to select whether to manually input the code.

If there is no code input, step S
At 14, the image data on the page memory 28 is transferred to the printer 15
To print out and complete a series of processing. That is, the original is printed without any processing. If the code and print position are entered, the bar code size is checked in step S7.

If a bar code is not detected when copying a plurality of originals using an automatic paper feeder or the like, the selection by manual input of the code is not made, and the undetected original is not printed and output to the next original. Or the undetected document is printed out as it is without performing the processing related to the bar code, or the undetected document is printed out by adding a document indicating that an error has occurred to the document image. It is also possible to perform processing such as taking an error history and outputting it as a report, and displaying the error history.

In the barcode size check, the barcode is detected within the detectable range even if the barcode size is out of the standard due to the reduction / enlargement processing performed at the time of copying.

That is, as shown in FIG. 17, when the bar code size is out of the standard, the user is warned that the size is out of the standard. At that time, the user is prompted to select whether or not to standardize the size. Then, when the user performs an operation for standardizing the size, the size information regarding the barcode is changed to standardize the size. If the size of the bar code is within the standard, this size check process ends.

Next, in step S8, the contents of the bar code are checked. If it is determined that the content of the code data is device-specific information, the content of the code data is displayed in detail in step S9. And if it is necessary to update the code data when copying,
In step S11, the code data is updated according to the rules. (Code Information Updating Means) If it is determined that the content of the code data is not the device-specific information, the code data is simply displayed in step S10. Then, in step S12, a new barcode image is generated based on the collected barcode information. (Code Information Generating Means) Subsequently, in step S13, the original barcode on the page memory 28 is replaced with the newly generated barcode.
(Data synthesizer)

After the processing for one page is completed, the image data on the page memory 28 to which the bar code is remarkably added is transferred to the printer 15 and printed out in step S14, and the series of processing is completed. Thus, the processing for one page is completed. The processing timing when copying a plurality of originals using an automatic paper feeder or the like is as follows. For example, two pages (PM
1. PM, 2) An example of continuous processing when having PM2 will be described with reference to FIG. At time 1, the first original is read by the image scanner 13 and transferred to PM1.

At time 2, the second original is read by the image scanner 13 and transferred to PM2, and at the same time,
PM1 barcode processing (processing such as barcode confirmation, barcode generation, and barcode synthesis) is performed.

At time 3, the bar code processed PM1 is printed, and at the same time, the third document is transferred from the image scanner 13 to the PM1 and, at the same time, the PM2 bar code is processed.

As described above, the PM1 and PM2 are alternately used, and the image scanner input, the bar code processing, and the printer output are simultaneously operated in parallel, whereby the continuous processing of a plurality of originals can be efficiently performed.

With such a configuration, when a document including a deteriorated bar code as shown in FIG. 20A is copied, the deteriorated bar code is once recognized as code data and the code data is converted into the code data. Since the generated bar code is printed, the printed bar code is a clear bar code without deterioration as shown in FIG.

Moreover, the read bar code is always recognized as the code data, and the bar code generated based on the code data is printed. Therefore, no matter how many times the copying is repeated, the image other than the bar code is deteriorated. The barcode is not deteriorated and the barcode can always be recognized accurately.

[0099]

As described above in detail, according to the present invention, it is possible to provide an image forming apparatus capable of forming a clear image of code information on an original regardless of the image state of the imaged code information. is there.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of the present invention.

FIG. 2 is a block diagram showing the configuration of the present invention.

FIG. 3 is a block diagram showing an embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a basic unit of the embodiment.

FIG. 5 is a block diagram showing a configuration of a system basic unit of the embodiment.

FIG. 6 is a block diagram showing the configuration of a system expansion unit of the embodiment.

7 is a block diagram showing the configuration of the image processing circuit of FIG.

8 is a block diagram showing the configuration of the system control circuit of FIG.

9 is a block diagram showing a configuration of a communication memory access control circuit of FIG.

10 is a block diagram showing a configuration of a page memory access control circuit shown in FIG.

11 is a block diagram showing the configuration of the address control circuit of FIG.

12 is a block diagram showing the configuration of the data control circuit of FIG.

13 is a block diagram showing the configuration of the image processing unit in FIG.

14 is a block diagram showing the configuration of an image data transfer control unit in FIG.

FIG. 15 is a flowchart showing a main part process of the embodiment.

FIG. 16 is a flowchart showing the main processing of the same embodiment.

17 is a flowchart showing the barcode size check processing of FIG.

FIG. 18 is a view showing an example of a continuous processing operation in the same embodiment.

FIG. 19 is a diagram showing an example of a barcode printed out in the same embodiment.

FIG. 20 is a diagram showing an example of a conventional read barcode and a print output barcode.

[Explanation of symbols]

 1 ... Basic unit 2 ... System basic unit 11 ... System CPU 12 ... Control panel 13 ... Image scanner 14 ... Image processing unit 15 ... Printer 21 ... System control circuit 24 ... System memory 26 ... Address control circuit 27 ... Data control circuit 28 ... Page memory 210 ... Image data interface

Claims (4)

[Claims] 1. A reading means for reading an image provided with code information, a code information extracting means for extracting code information from an image read by the reading means, and code information extracted by the code information extracting means. Code information generating means for newly generating the same code information as the above, a synthesizing means for synthesizing the code information generated by the code information generating means with the image from which the code information is extracted by the extracting means, and the synthesizing means. An image forming apparatus comprising: an output unit for recording an image and code information obtained by combining by means of a recording unit on a recording member. 2. A reading means for reading an image provided with code information, a page memory for storing one or more pages of the image read by the reading means, and code information from the image stored in this page memory. A code information extracting means for extracting the code information, a code information generating means for newly generating the same code information as the code information extracted by the code information extracting means, and a code information generated by the code information generating means. The image forming apparatus is provided with a synthesizing unit for synthesizing the code information extracted by the extracting unit on the page memory, and an output unit for recording the image and the code information obtained by synthesizing by the synthesizing unit on a recording member. An image forming apparatus characterized by the above. 3. A selection means for selecting a mode in which the code information extracting means, the code information generating means, and the synthesizing means function, and a mode in which these means do not function, respectively. Or the image forming apparatus according to 2. 4. Code information updating means for updating the code information extracted by the code information extracting means in accordance with a preset rule is provided, and the code information generating means is code updated by the code information updating means. The image forming apparatus according to claim 1, 2 or 3, wherein new code information is generated based on the information.