JPH06243598A - Data detection system for optical disk - Google Patents

Abstract

PURPOSE:To reduce an error in data detection as much as possible and to reproduce the recorded digital data with high density. CONSTITUTION:A reproduced signal from an optical disk is inputted to a PR (1, 2, 1) equalizer circuit 105 through a capacitor 101, an amplifier 102, a low- pass filter 103 and an AGC circuit 104, and is equalized to a PR (1, 2, 1) characteristic. The reproduced signal equalized to the PR (1, 2, 1) characteristic making a clock signal extracted by a clock extraction part 108 the sampling timing is A/D converted by an A/D converter 106. The data of the reproduced signal A/D converted are operated by a viterbi decoder 107 related to that the data approximate to an expected value extremely when the state trasition forwards through any path in a trellis diagram, and the data are decoded to the data corresponding to the maximum likelihood path.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical disc data detection system for reproducing digital data recorded on an optical disc.

[0002]

2. Description of the Related Art Conventionally, as a data detection method of a reproduction signal of an optical disc recorded at high density, a reproduction signal is equalized to a PR (1,1) characteristic by a partial response method,
There is a maximum likelihood decoding of this equalized reproduced signal by Viterbi decoding (M. Tobita, "Viterbi Detection of Parti
al Response on a Magneto Optical Recording Channe
l "; SPIE Vol.1663 Optical Data Storage (1992) p166-
p173).

[0003]

However, the above-mentioned conventional data detection method for an optical disk is subject to increase in noise in a high frequency range and mutual influence between data when reproducing digital data recorded at a higher density. There is a problem that the quality of the reproduced signal deteriorates and the error rate of data detection increases.

Therefore, an object of the present invention is to improve the characteristics of the reproduced signal by PR (1,1) in order to eliminate the increase of noise in the high frequency band which occurs when reproducing the high density recorded digital data and the mutual influence of the data. 1) a PR characteristic different from the characteristic, which is equalized to a PR characteristic such that the reproduction waveform of an isolated bit expands in the time axis direction as compared with the PR (1,1) characteristic, and this reproduction signal is An object of the present invention is to provide a data detection method for an optical disc that can detect data with few errors, especially for digital data recorded at high density by performing maximum likelihood decoding by Viterbi decoding.

[0005]

In order to achieve the above object, an optical disk data detecting method of the present invention is a data detecting method when reproducing digital data recorded on the optical disk, and is a partial response method. It is characterized in that the reproduced signal is equalized to a PR (1,2,1) characteristic by using it, and then the signal equalized to the PR (1,2,1) characteristic is subjected to maximum likelihood decoding by Viterbi decoding. There is.

[0006]

According to the above-mentioned optical disk data detection system, the reproduction signal of the digital data recorded on the optical disk is PR
Equalize to the (1,2,1) characteristic. And the above PR
Maximum likelihood decoding is performed on the signal equalized to the (1, 2, 1) characteristic by Viterbi decoding.

Therefore, compared with the conventional reproduction signal equalized to the PR (1,1) characteristic, the components of the reproduction signal equalized to the PR (1,2,1) characteristic are on the low frequency side of the frequency band. Even if the digital data is recorded at a higher density than the conventional one, the reproduced signal can be detected as a reproduced signal of digital data which is apparently not at a high density. Further, the frequency characteristic of the reproduced signal has a gentle cutoff characteristic and suppresses the signal component in the high frequency range, so that the noise that increases in the high frequency range is reduced. Further, since the damped vibrations at both ends of the waveform of the reproduction signal become small, even if the sampling points are slightly deviated, the influence between the data is reduced. Therefore, the error rate of data detection can be reduced as compared with the conventional one, and
In digital data recorded at higher density, data can be detected without deteriorating the error rate.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An optical disk data detection system of the present invention will be described in detail below with reference to an embodiment.

FIG. 1 shows the configuration of a data detection circuit according to an embodiment of the present invention. Reference numeral 101 is a capacitor to which a reproduction signal of digital data recorded on an optical disk (not shown) is input, and 102 is the capacitor 101. An amplifier connected to the other end of the amplifier for amplifying a reproduction signal input through the capacitor 101, 103 is the amplifier 102
A low-pass filter for removing a high-frequency extra signal of the reproduced signal amplified in step 104;
It is an AGC (automatic gain control) circuit that removes the amplitude fluctuation due to the reflectance fluctuation of the optical disc of the reproduction signal from which the excess signal in the high frequency band is removed. Further, 105 is the AGC circuit 1 described above.
The reproduced signal from which the amplitude fluctuation is removed in 04 is PR (1, 2,
1) PR (1,2,1) equalization circuit for equalizing characteristics, 10
Reference numeral 8 denotes a clock extraction unit for extracting a clock signal by a PLL (phase locked loop) circuit from the reproduced signal from which the amplitude fluctuation has been removed by the AGC circuit 104, and 106 denotes the PR
A / D that receives the reproduction signal from the (1,2,1) equalization circuit 105 and the clock signal from the clock extraction unit 108 and A / D converts the reproduction signal at each sampling point based on the clock signal. D converter, 107 is the above A / D
It is a Viterbi decoder that Viterbi-decodes the A / D-converted reproduced signal from the converter 106.

The PR (1,2,1) equalization circuit 105 described above.
Consists of a 3-tap transversal filter, as shown in FIG.
As shown in, the signal obtained by multiplying the input signal, which is the reproduced signal from which the amplitude variation is removed from the AGC circuit 104, by the multiplier 303 and the signal obtained by delaying the input signal by the delay circuit 301 and multiplying by the multiplier 304 Then, the input signal is delayed by the delay circuit 301 and the delay circuit 302, the signal multiplied by the multiplier 305 is added by the adder 306, and the addition result is output as an output signal. This PR (1,2,1) equalization circuit 105 allows PR
The reproduced signal equalized to the (1,2,1) characteristic has the eye pattern shown in FIG. 3, and the waveform interference of the recording bits before and after is used, so that the sampling point (phase is ...
There are five signal levels at points 1, 0, 1 ... It should be noted that the multiplication coefficient of each of the multipliers 303, 304 and 305 is calculated from the reproduced signal waveform of the isolated bit before equalization and the target reproduced signal waveform of the isolated bit after equalization and adjusted. , Adjust and set while observing the eye pattern of the playback signal. For example, when an isolated 1 bit recorded on an optical disc is reproduced, the reproduced signal has a waveform A as shown in FIG. The waveform A of the reproduced signal is a target waveform B by properly adjusting the multiplication coefficients of the multipliers 303, 304, 305. Waveform B at this time
The amplitude ratio for each sampling point (interval for 1 bit shown by the arrow in FIG. 4) has a so-called PR (1,2,1) characteristic in which the waveform center is 2, the both sides thereof are 1, and the others are 0. Therefore, the reproduction signal after equalization to the PR (1,2,1) characteristic has a frequency band shifted to the low frequency side as compared with the PR (1,1) characteristic, while the frequency characteristic has a gentle cutoff characteristic. In addition, the damping vibration at both ends of the waveform becomes smaller.

Equalized to the above PR (1,2,1) characteristic,
The data A / D converted by the A / D converter 106 is
As shown in the trellis diagram of FIG. 6, four states S ₀₀ , S
It can be regarded as equivalent to the convolutional codes of ₁₀ , S ₀₁ and S ₁₁ . In FIG. 6, arrows represent state transitions, subscripts sandwiching / between 0 and 1 on the left side of / are recorded digital data corresponding to the state transition, and on the right side of / when the state transition occurs. The expected values d ₀ , d ₁ , d ₂ , d ₃ , d ₄ that the signal equalized to the ideal PR ( ₁ , ₂ , ₁ ) characteristic should have are given.

The Viterbi decoder 107 is configured as shown in FIG. 5, and has the four states S ₀₀ , S ₁₀ and
The following operations are performed on S ₁₁ and S ₀₁ , and maximum likelihood decoding is performed using each operation result, and the decoded data that has been decoded is output.

[0013] First, in the state S _00, receives input data which is A / D converted digital data by the A / D converter 106, the branch metric calculator 501A shown in FIG. 5, from the state S ₀₀ Probability of transition to state S ₀₀ (hereinafter referred to as branch metric) is calculated. In addition, receiving the input data, the branch metric calculator 501H calculates the branch metric of the transition from the state S ₀₁ to the state S ₀₀ . A signal indicating a branch metric from the branch metric calculator 501A and a signal indicating a certainty (hereinafter, referred to as a path metric) of a past state transition path (hereinafter, referred to as a path) from a path metric memory 505A described later. In response, the adder 502A adds the branch metric and the path metric to calculate the path metric from the past to the present. Upon receiving a signal indicating the branch metric from the branch metric calculator 501H and a signal indicating a past path metric from a path metric memory 505D described later, the adder 502H adds the branch metric and the path metric, Calculate the path metric from the past to the present. Then, the signals representing the path metrics from the past to the present are received from the adder 502A and the adder 502H,
The comparator 503A compares the magnitude of which of these path metrics is more likely, and determines that the larger one is more likely, and outputs a signal representing this comparison result. Upon receiving the signal indicating the path metric from the adder 502A and the adder 502H and the signal indicating the comparison result from the comparator 503A, the selector 504A selects and selects one of these path metrics that is likely. And outputs a signal representing the path metric. In this way, the adder 502A,
502H, the comparator 503A, and the selector 504A constitute an addition / comparison / selection unit (hereinafter referred to as ACS unit). Further, it receives a signal representing the selected path metric from the selector 504A and receives the path metric memory 505A.
Stores the selected path metric and outputs a signal representing this path metric. Note that this path metric, when you enter the next input data, a transition or state S ₀₀ from the state S ₀₀ to state S ₀₀ and past path metrics to the transition to state S _10. On the other hand, in response to the signal indicating the comparison result from the comparator 503A, the path selector 506A outputs a signal indicating what state transition the path metric is likely to have.

In the state S ₁₀ , the branch metric calculators 501B and 501C receive the input data, and the branch metric calculator 501B calculates the branch metric of the transition from the state S ₀₀ to the state S ₁₀ . ,
The branch metric calculator 501C calculates the branch metric of the transition from the state S ₀₁ to the state S ₁₀ . A signal representing the branch metric from the branch metric calculator 501B and the path metric memory 505.
Upon receiving the signal indicating the past path metric from A, the adder 502B adds the branch metric and the path metric to calculate the path metric from the past to the present. The branch metric calculator 501
Upon receiving the signal indicating the branch metric from C and the signal indicating the past path metric from the path metric memory 505D, which will be described later, the adder 502C adds the branch metric and the path metric to obtain the past to the present. Calculate the path metric up to. Then, receiving signals representing the path metrics from the past to the present from the adder 502B and the adder 502C, the comparator 503B compares the magnitude of which path metric is likely, and the greater one is more reliable. As it seems,
A signal representing this comparison result is output. The adder 502
B and the signal representing the path metric from the adder 502C and the signal representing the comparison result from the comparator 503B, the selector 504B selects the path metric that is likely to be the selected path metric. Output a signal that represents. In this way, the adders 502B and 50
2C, the comparator 503B, and the selector 504B form an ACS unit. Further, receiving the signal representing the selected path metric from the selector 504B, the path metric memory 505B stores the selected path metric and outputs the signal representing the path metric. This path metric becomes a past path metric for the transition from the state S ₁₀ to the state S ₀₁ or the transition from the state S ₁₀ to the state S ₁₁ when the next input data is input. On the other hand, in response to the signal indicating the comparison result from the comparator 503B, the path selector 506B outputs a signal indicating what state transition the path metric is likely to have.

In the state S ₁₁ , the branch metric calculators 501D and 501E receive the input data, and the branch metric calculator 501D calculates the branch metric of the transition from the state S ₁₀ to the state S ₁₁ . ,
Branch metric calculator 501E calculates a branch metric of transition from the state S ₁₁ to state S _11. A signal representing the branch metric from the branch metric calculator 501D and the path metric memory 505.
Upon receiving the signal indicating the past path metric from B, the adder 502D adds the branch metric and the path metric to calculate the path metric from the past to the present. The branch metric calculator 501
Upon receiving the signal indicating the branch metric from E and the signal indicating the past path metric from the path metric memory 505C described later, the adder 502E adds the branch metric and the path metric to obtain the past to the present. Calculate the path metric up to. Then, receiving signals representing the path metrics from the past to the present from the adder 502D and the adder 502E, the comparator 503C compares the magnitude of which of these path metrics is likely, and the larger one is more reliable. As it seems,
A signal representing this comparison result is output. The adder 502
Upon receiving the signal indicating the path metric from the D and the adder 502E and the signal indicating the comparison result from the comparator 503C, the selector 504C selects the path metric that is likely to be the selected path metric. Output a signal that represents. Thus, the adders 502D, 50
The 2E, the comparator 503C, and the selector 504C form an ACS unit. Further, upon receiving the signal representing the selected path metric from the selector 504C, the path metric memory 505C stores the selected path metric and outputs the signal representing the path metric. In addition,
This path metric is a past path metric for the transition from the transition or the state S ₁₁ from the state S ₁₁ when you enter the next input data to the state S ₀₁ to the state S _11. On the other hand, in response to the signal indicating the comparison result from the comparator 503C, the path selector 506C outputs a signal indicating what state transition the path metric is likely to have.

In the state S ₀₁ , the branch metric calculators 501F and 501G receive the input data, and the branch metric calculator 501F calculates the branch metric of the transition from the state S ₁₁ to the state S ₀₁ . ,
The branch metric calculator 501G calculates the branch metric of the transition from the state S ₁₀ to the state S ₀₁ . A signal representing the branch metric from the branch metric calculator 501F and the path metric memory 505.
Upon receiving the signal indicating the past path metric from C, the adder 502F adds the branch metric and the path metric to calculate the path metric from the past to the present. The branch metric calculator 501
Upon receiving the signal indicating the branch metric from G and the signal indicating the past path metric from the path metric memory 505B, the adder 502G adds the branch metric and the path metric, and from the past to the present. Calculate the path metric of. The comparator 50 receives the signals representing the path metrics from the past to the present from the adders 502F and 502G.
The 3D compares the magnitude of which of these path metrics is likely, and determines that the larger one is likely, and outputs a signal representing the comparison result. Upon receiving the signal indicating the path metric from the adder 502F and the adder 502G and the signal indicating the comparison result from the comparator 503C, the selector 504D selects and selects one of the path metric with a certain probability. And outputs a signal representing the path metric. In this way, the adders 502F and 502G, the comparator 503D, and the selector 504D form an ACS section. Furthermore, the path metric memory 5 receives the signal representing the selected path metric from the selector 504D.
05D stores the selected path metric and outputs a signal representing this path metric. It should be noted that this path metric is such that when the next input data is input, the transition from the state S ₀₁ to the state S ₀₀ or the state S ₀₁ to the state S _{10 is made.}
It becomes the past path metric for the transition to. on the other hand,
Upon receiving the signal indicating the comparison result from the comparator 503D, the path selector 506D outputs a signal indicating what kind of state transition the path metric is likely to be.

Next, the path selectors 506A and 506 described above.
Upon receiving a signal from B, 506C, 506D indicating what kind of state transition the path metric is likely to have, the path history memory 507 stores information on the state transition of the path metric having the certain path. Then, when the input data is sequentially calculated and a specific number of input data is input, a signal indicating the surviving path is received from the path history memory 507, and the surviving path selector 508 traces this signal in reverse, and A probable path is selected, the data corresponding to this most probable path is decoded, and the decoded data is output. That is, the Viterbi decoder 107 is inputted with the input data as to which path the state transition proceeds the closest to the input data and the expected value along the trellis diagram shown in FIG. The data is decoded by the surviving path that is finally determined for each.

The branch metric calculator 50 is used.
1A, 501B, 501C, 501D, 501E, 50
1F, 501G, 501H calculate the branch metric by the following formula (the larger the calculated branch metric value, the more likely it is).

501A ... 2y _k d ₀ -d ₀ ² 501B and 501H ... 2y _k d ₁ -d ₁ ² 501C and 501G ... 2y _k d _2- d ₂ ² 501D and 501F ... 2y _{kd 3} −d ₃ ² 501E ... 2y _k d ₄ −d ₄ ² y _k : data input to the Viterbi decoder d _{0 to} d ₄ : ideal PR when each state transition occurs
Expected value that the signal of (1,2,1) characteristic should take In this way, compared to the reproduced signal of the digital data recorded on the conventional optical disc, the reproduced signal equalized to the PR (1,2,1) characteristic The component is shifted to the low frequency side of the frequency band, and even if the data is recorded in high density, the reproduced signal can be treated in the same way as data not in high density by Viterbi decoding. Further, since the frequency characteristic of the reproduced signal has a gentle cutoff characteristic and suppresses the signal component in the high frequency range, noise that increases in the high frequency range is reduced. Further, since the damping vibration at both ends of the waveform of the reproduction signal becomes small, the influence between data can be reduced even if the sampling points are slightly deviated. Therefore, the error rate of data detection can be lowered as compared with the conventional case. In addition, it is possible to detect data in digital data recorded at a higher density than before, without deteriorating the error rate.

In the above embodiment, the PR (1,2,1)
The number of taps of the transversal filter forming the equalization circuit 105 is 3, but the number of taps is not limited to this, and may be an appropriate number of taps. Further, it goes without saying that the configuration of the PR (1,2,1) equalization circuit is not limited to this.

In the above embodiment, in the configuration shown in FIG. 1, the A / D converter 106 is PR (1,2,1).
Although it is placed after the equalization circuit 105, the A / D converter is placed in front of the PR (1,2,1) equalization circuit to
The (1,2,1) equalization circuit may be composed of a digital filter.

[0022]

As is apparent from the above, according to the data detecting method of the optical disc of the present invention, when the digital data recorded on the optical disc is reproduced, the reproduction signal of the optical disc is PR by utilizing the partial response system.
After equalizing to the (1,2,1) characteristic, this PR (1,2,1)
1) Maximum likelihood decoding is performed on a signal equalized in characteristics by Viterbi decoding.

Therefore, according to the present invention, since the components of the reproduced signal are shifted to the lower frequency side of the frequency characteristic, the reproduced signal appears to be comparatively apparent even if the digital data is recorded at a higher density than in the past. It can be detected as a reproduction signal of digital data which is not high density recording. Further, since the frequency characteristic of the reproduced signal has a more gradual cutoff characteristic than that equalized by the PR (1,1) characteristic, a noise component which suppresses the signal component in the high frequency range and increases in the high frequency range. Can be reduced. Further, since the damping vibration at both ends of the waveform of the reproduction signal is small, the influence between data can be reduced even if the sampling points are slightly deviated. Therefore, it is possible to lower the error rate of data detection as compared with the related art, and it is possible to detect data without deteriorating the error rate even when reproducing high density recorded digital data.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a configuration diagram of a PR (1,2,1) equalization circuit of the above embodiment.

FIG. 3 is a diagram showing an eye pattern of a signal equalized to the PR (1,2,1) characteristic of the above embodiment.

FIG. 4 is a diagram showing a waveform of a 1-bit reproduction signal of the above embodiment.

FIG. 5 is a block diagram of a Viterbi decoder of the above embodiment.

FIG. 6 is a trellis diagram of the above embodiment.

[Explanation of symbols]

101 ... Capacitor, 102 ... Amplifier, 103 ... Low pass filter, 104 ... AGC circuit, 105 ... PR (1,
2, 1) Equalization circuit, 106 ... A / D converter, 107 ... Viterbi decoder, 108 ... Clock extraction unit.

Claims (1)

[Claims] 1. A data detection method for reproducing digital data recorded on an optical disc, wherein a reproduction signal is PR by using a partial response method.
A data detection method for an optical disk, which is characterized by performing maximum likelihood decoding by Viterbi decoding on the signal equalized to the PR (1,2,1) characteristic after equalizing the (1,2,1) characteristic.